JPS63198883A - System for testing logic circuit package - Google Patents

Abstract

PURPOSE:To conduct an accurate logic test by interrupting testing operation with a wait signal while an output signal is unstable and conducting the test only in a stable period. CONSTITUTION:A circuit to be tested has integral elements R and C which make an output signal unstable to an input signal. A monostable multivibrator 7 provided in a tester outputs the wait signal when the output becomes unstable after the input is applied to the circuit to be tested, thereby interrupting the testing operation. When the output signal becomes unstable, the transmission of said wait signal is stopped. Consequently, the tester begins to operate to test the object circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for testing a logic circuit package, and more particularly to a method for testing a logic circuit package containing an unstable circuit such as an integrating circuit.

When testing a logic circuit, a synchronizing signal is applied from the tester side, and the tester determines the output signal from the package under test at a certain input.

Logic circuits are generally made up of elements that have a fixed logic, but recently they have come to include elements that cause an unstable output, such as integration circuits. In this type of circuit, the output signal of the package under test is no longer synchronized with the tester, making judgment impossible.

FIG. 1 is a diagram showing a test method for a package including an integrating circuit and waveforms at various parts. In the circuit diagram shown in (a), when an input signal as shown in (b) is applied from the tester to the integrating circuit formed by resistor R and capacitor C, the waveform at both ends of capacitor C will be (b). As shown in the waveform in the figure, the waveform is a repetitive charge/discharge waveform. However,
Since the resistance value of the resistor R and the capacitance of the capacitor C are not constant for each tested package, the respective charging and discharging times are not uniform, and the waveform at the time of comparison is also not constant. Therefore, partly because the subsequent inverter 2 has a threshold voltage of a certain value, the output signal e is "0", as shown by the shaded part X in the waveform of the output signal e in the figure (W). It is impossible to determine whether it is "°°l°" or "°°l°" as it differs depending on the package under test.

In this way, with conventional test methods, it is impossible to determine the logic of a logic package under test that has an unstable circuit whose output operates asynchronously with the tester.The present invention solves this problem. This is an effective solution.

In order to solve this technical problem, the technical means according to the present invention is a logic circuit package that tests a logic circuit package that includes a built-in circuit whose output signal is unstable with respect to an input signal, making logic judgment impossible. In the test method, a monostable multivibrator is triggered at a change point of the input signal of the logic circuit package, a wait signal is output to the tester, and the test operation is stopped during a period in which logic cannot be determined. The structure is adopted.

Next, how the logic circuit package testing method according to the present invention is actually implemented will be explained using an example. 1st
The figure shows a test circuit for a package including an integrating circuit and waveforms at various parts. In this case, as shown in the shaded area x-x' in the inverter output waveform e in Figure (b), a period T-T in which the rising and falling timings are not constant.
'', the operation of the tester is stopped.In other words, a monostable multi-vibration break 7 is provided in the tester, and (c)
At timing T1 when the input waveform switches in the figure, an input pattern switching signal is applied from the tester side to trigger the monostable multi-bi break 7, and its output signal is used as a wait signal.

A test stop time is set in the monostable multi-by-break 7 so that the wait signal is canceled after the unstable period T of the output signal e has elapsed. And the first strobe after lifting weights! The test judgment is made according to the following. Similarly, at timing T1° when the input signal switches from "0" to "1'", the monostable multivibrator 7 is triggered at the rising edge of the input signal, and only during the unstable period T'. A wait signal is output to the tester to stop the logic test.Therefore, the tester operates and tests are performed only while the output of the package under test is stable, making accurate testing possible.

As described above, according to the present invention, even if the logic package under test includes an unstable element such as an integrating circuit that causes an unstable state to appear in the output signal in response to a human input signal, the output may be unstable. During the stabilization period, the test operation is stopped with a wait signal, and
Since the test is performed only in a stable state, accurate logic testing is possible. Moreover, since the start and release of weights are automatically repeated, it appears as if a test is always being performed.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a logic package test circuit including an integrating circuit and waveforms of each part thereof. In the figure, 2 is an inverter, 7 is a monostable multi-by-break, and X is an undeterminable period. Patent Applicant: Fujitsu Limited Sub-Agent Patent Attorney: Yasushi Fukushima Figure 1

Claims (1)

[Scope of Claim] In a logic circuit package testing method for testing a logic circuit package including a circuit in which an output signal is unstable with respect to an input signal and logic judgment is impossible, the input signal of the logic circuit package is A logic circuit package testing method characterized in that a monostable multivibrator is triggered at a change point of , a wait signal is output to a tester, and test operation is stopped during a period in which logic cannot be determined.