JPS6319836A - Semiconductor wafer transfer system - Google Patents
Semiconductor wafer transfer systemInfo
- Publication number
- JPS6319836A JPS6319836A JP61163828A JP16382886A JPS6319836A JP S6319836 A JPS6319836 A JP S6319836A JP 61163828 A JP61163828 A JP 61163828A JP 16382886 A JP16382886 A JP 16382886A JP S6319836 A JPS6319836 A JP S6319836A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- carrier
- semiconductor wafers
- rod
- piller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 38
- 235000012431 wafers Nutrition 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 abstract description 11
- 229920003002 synthetic resin Polymers 0.000 abstract description 3
- 239000000057 synthetic resin Substances 0.000 abstract description 3
- 230000008021 deposition Effects 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000969 carrier Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000012050 conventional carrier Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
(産業上の利用分野)
本発明は半導体製造設備へ手心体ウェー゛ハを搬送する
方式の改良に関する。DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Industrial Field of Application) The present invention relates to an improvement in the method of transporting hand-centered wafers to semiconductor manufacturing equipment.
(従来の技術)
最近の半導体産業では他の技術分野と同様に自動化が促
進されており、一方ではIMD −RAMにみられるよ
うに高集積化ならびに高機能化の傾向にあす、これを加
速するためには半導体製造技術として不可欠な微細化の
限界が段々と小さくなっていることが与っているところ
が大きい。その微細化手段の1つには反応性イオンエツ
チング(ReactiνCIon Etching)法
が挙げられ、その特徴である異方性エツチングは従来よ
り利用してきた等方性エツチングに代って広く応用され
ている。(Conventional technology) Recently, automation has been promoted in the semiconductor industry as in other technical fields, and on the other hand, as seen in IMD-RAM, there is a trend towards higher integration and higher functionality, and this will be accelerated. This is largely due to the fact that the limits of miniaturization, which is essential for semiconductor manufacturing technology, are becoming smaller and smaller. One of the means for miniaturization is the reactive ion etching method, whose characteristic anisotropic etching is widely applied in place of the conventionally used isotropic etching.
一方、これらの半導体プロセス技術を駆使する設備なら
びに設備間の半導体ウェーハ搬送について、自動化が促
進されているのは前述の通りであり、後者については放
棄式ならびにバッチ式が併用されているのが現状である
。このバッチ式にあっては従来より利用されてきたいわ
ゆるキャリアによる移動が一般的であり、これを第3図
a、bにより説明する。On the other hand, as mentioned above, automation is being promoted in the equipment that makes full use of these semiconductor process technologies and the transportation of semiconductor wafers between the equipment, and the current situation is that both the abandoned method and the batch method are used for the latter. It is. In this batch type, movement by a so-called carrier, which has been used conventionally, is common, and this will be explained with reference to FIGS. 3a and 3b.
このキャリアとしては第3図に示すように合成樹脂製の
筒状容器20を用意しその開口面に廻転可能な柱状ロッ
ド21を設け、この柱状ロッド21に被処理半導体ウェ
ーハ22・・・を係止する。この柱状ロッド21はモー
タ23等に回転軸24を介して接続され、半導体ウェー
ハ22・・・を係止するに当っては、そのオリエンテー
ションフラット部25を当接することにより同一方向に
設定し、このキャリアを利用するが一般的である。As this carrier, as shown in FIG. 3, a cylindrical container 20 made of synthetic resin is prepared, and a rotatable columnar rod 21 is provided on the opening surface of the container, and semiconductor wafers 22 to be processed are attached to this columnar rod 21. Stop. This columnar rod 21 is connected to a motor 23 etc. via a rotating shaft 24, and when securing a semiconductor wafer 22, it is set in the same direction by abutting the orientation flat portion 25 of the semiconductor wafer 22. It is common to use a carrier.
(発明が解決しようとする問題点)
このようにキャリア内でオリエンテーションフラット(
以後直線部と記載する)部を同一方向に合せた半導体ウ
ェーハを製造設備にセットする場合を記述する。(Problem to be solved by the invention) In this way, orientation flat (
A case will be described in which semiconductor wafers with their straight portions (hereinafter referred to as straight portions) aligned in the same direction are set in manufacturing equipment.
前述のRIE装置では下部電極として機能する板状サセ
プタ下面に冷却水通路を設け、上面に被処理半導体ウェ
ーハを環状に配置して反応性イオンエツチングを施す。In the above-mentioned RIE apparatus, a cooling water passage is provided on the lower surface of a plate-shaped susceptor that functions as a lower electrode, and the semiconductor wafers to be processed are arranged in a ring shape on the upper surface to perform reactive ion etching.
この被処理半導体ウェーハはこのRIE装置にキャリア
毎セットされ、同一方向に配置したそれをロボット機構
によって把持しサセプタ上に転送載置するので、直線部
が概ね揃った配置となる。The semiconductor wafers to be processed are set in this RIE apparatus with their carriers, and the wafers arranged in the same direction are gripped by a robot mechanism and transferred and placed on the susceptor, so that the straight portions are generally aligned.
この状態で反応性イオンエツチングを行うと、被処理半
導体ウェーハ以外のサセプタ表面には、エツチング残渣
が堆積され直線部付近も凸状態になる。When reactive ion etching is performed in this state, etching residue is deposited on the surface of the susceptor other than the semiconductor wafer to be processed, and the vicinity of the linear portion also becomes convex.
次の処理に当ってはこの凸状態のサセプタに被処理半導
体ウェーハが転送配置されると、その直線部はこの凸状
態に重ねられるので半導体ウェーハ内に温度傾斜を生じ
てエツチングが不均一になる難点を生じる。During the next process, when a semiconductor wafer to be processed is transferred to and placed on this convex susceptor, its straight portion is superimposed on this convex susceptor, creating a temperature gradient within the semiconductor wafer and causing non-uniform etching. This creates difficulties.
しかも、この凸状態を除くにはこのサセプタの修理が必
要となる外に寿命が短くなることは否めない。Moreover, in order to eliminate this convex condition, the susceptor must be repaired, and it is undeniable that the life of the susceptor will be shortened.
本発明は上記難点を除去した新規な半導体ウェーハの搬
送方法を提供することを目的とする。An object of the present invention is to provide a novel semiconductor wafer transport method that eliminates the above-mentioned difficulties.
(問題点を解決するための手段)
従来より使用していたキャリアに設置する廻転可能な柱
状ロッドの柱面にテーパ部を設け、こメに係止する直線
部をもつ複数の半導体ウェーハは柱状ロンドの廻転によ
って、接触する円周長の相違により生ずる廻転数差から
次第にキャリア内における各直線部位置が異なる結果を
もたらす。このような無秩序な直線部位置によってキャ
リア内に収納する半導体ウェーハを必要な製造装置に転
送する方式を本発明では採用した。(Means for solving the problem) A tapered part is provided on the columnar surface of a rotatable columnar rod that is installed in a conventionally used carrier, and multiple semiconductor wafers having a straight part that is locked in a columnar rod are arranged in a columnar rod. Due to the rotation of the rond, the position of each linear portion within the carrier gradually differs due to the difference in rotation speed caused by the difference in the contacting circumference length. The present invention employs a method in which semiconductor wafers housed in carriers are transferred to necessary manufacturing equipment using such disordered linear portion positions.
(作 用)
このような搬送方式により所望位置に転送された半導体
ウェーハは各々の直線部位置が相違するので、反応性イ
オンエツチング装置のサセプタではエツチング残渣の堆
積図形として半導体ウェーハの直径に応じた半円形状を
残し、次に転送された半導体ウェーハはこのサセプタ表
面に傾斜なく接触載置され、従って各半導体ウェーハに
温度傾斜は起らず所望のエツチングが可能となる。(Function) Since each semiconductor wafer transferred to a desired position by such a transfer method has a different linear part position, the susceptor of a reactive ion etching apparatus has a pattern of deposited etching residue that corresponds to the diameter of the semiconductor wafer. Leaving a semicircular shape, the next transferred semiconductor wafer is placed in contact with the surface of this susceptor without tilting, so that no temperature gradient occurs in each semiconductor wafer, and desired etching can be performed.
(実施例)
第1図a、b及び第2図a、b、Qにより本発明を詳述
するが、従来の技術と多少重複する部分が都合上あるが
、新番号により説明する。(Example) The present invention will be explained in detail with reference to FIGS. 1 a, b and 2 a, b, and Q. Although there are some parts that overlap with the conventional technology for convenience, new numbers will be used to explain them.
反応性イオンエツチング装置を利用する例により本発明
を述べるが、第1図a、bは利用するキャリア構造を示
す断面図及び側面第2図a、b。The present invention will be described by way of example utilizing a reactive ion etching device, in which FIGS. 1a and 1b are cross-sectional views and side views of the carrier structure utilized, and FIGS. 2a and 2b are side views.
Cはその要部を示す断面図である。このキャリア上は合
成樹脂製の筒状容器2を用意し、その開口面には廻転可
能な柱状ロッド3を配置するが、これはモータ4に回転
軸5を介して接続し、明示しないが軸受機構6を付設す
る。このキャリア上に収容する複数の被処理半導体ウェ
ーハ7・・・ははゾ等しい円形に成形され、その一部の
円弧には直線部8が設置されており、この柱状ロッド3
との接触位置に何等制限はない。C is a sectional view showing the main part thereof. A cylindrical container 2 made of synthetic resin is prepared on this carrier, and a rotatable columnar rod 3 is placed on the opening surface of the container, which is connected to a motor 4 via a rotating shaft 5, and is connected to a bearing (not shown). A mechanism 6 is attached. A plurality of semiconductor wafers 7 to be processed accommodated on this carrier are formed into equal circular shapes, and a straight portion 8 is installed in a part of the circular arc, and this columnar rod 3
There are no restrictions on the position of contact.
柱状ロッド3の柱面にはテーパ部9を設けるが。A tapered portion 9 is provided on the columnar surface of the columnar rod 3.
その例として第2図a、bを示す。二\に明示したよう
にテーパ部9としてはa及びbに示すように階段10・
・・状に形成するがあるいはCのように■溝を設け、更
にその柱面にテーパをつけた柱状ロッドを適用する。被
処理半導体ウニ−ハフ・・・はこの階段部もしくは■溝
11に載置する。As an example, FIGS. 2a and 2b are shown. As shown in 2\, the tapered part 9 includes steps 10 and 10 as shown in a and b.
. . . Or, as shown in C, a groove is provided and a columnar rod with a tapered surface is applied. The semiconductor to be processed is placed on this step portion or groove 11.
このようなキャリアに収納された被処理半導体ウェーハ
7・・・はモータ4の稼動によって回転力が与えられた
柱状ロッド3によって回転を始め、このテーパ部9に接
触するロッド径の相違によって回転数差を生じ、この結
果半導体ウェーハの直線部位置を無秩序にする。The semiconductor wafers 7 to be processed stored in such a carrier begin to rotate by the columnar rods 3 to which rotational force is applied by the operation of the motor 4, and the number of revolutions varies depending on the diameter of the rods in contact with the tapered portions 9. This causes a difference in the positions of the straight portions of the semiconductor wafer, thereby making the straight portion positions of the semiconductor wafer disordered.
このキャリアを反応性イオンエツチング装置にセントし
、ロボット機構によってサセプタに直線部が無秩序に収
納した被処理半導体ウェーハを転送して、その直線部位
置を相違させてしかも環状に配置する。This carrier is placed in a reactive ion etching apparatus, and a semiconductor wafer to be processed, which has linear portions arranged in a disorderly manner, is transferred to a susceptor by a robot mechanism, and the linear portions are arranged in different positions in a ring shape.
尚、前述のV溝形成は半導体ウェーハの横すベリを防い
で、円滑な回転を得るように配慮したものである。It should be noted that the V-groove formation described above is designed to prevent the semiconductor wafer from flopping horizontally and to ensure smooth rotation.
このように本発明方法ではキャリアに収納する半導体ウ
ェーハの直線部を無秩序としたので、これを反応性イオ
ンエツチング装置にセット後下部電極であるサセプタに
自動的に転送して必要なエツチングを施すサイクルを繰
返して、転送された半導体ウェーハ直線部位置は毎回異
なりエツチングによって生ずる堆積物による影響が防止
でき、最適なエツチング条件を満すことになる。In this way, in the method of the present invention, the straight parts of the semiconductor wafer stored in the carrier are disordered, so after setting it in the reactive ion etching device, it is automatically transferred to the susceptor, which is the lower electrode, and the necessary etching cycle is performed. By repeating this process, the position of the straight portion of the transferred semiconductor wafer differs each time, thereby preventing the influence of deposits caused by etching and satisfying the optimum etching conditions.
又、サセプタのオーバホールは必要であるが、従来に比
べて頻度を減少できるので碍命が長くなるほかに、装置
の稼動率を高めることができる。Further, although overhauling of the susceptor is necessary, the frequency can be reduced compared to the conventional method, which not only prolongs the life of the susceptor but also increases the operating rate of the device.
第1図a、bは本発明に利用するキャリア側面、C
図及び断面図、第2図a、bはその要部断面図、△
第3図a、bは従来キャリアの側面図ならびに断面図で
ある。
代理人 弁理士 井 上 −力
筒 2 図Figures 1 a and b are side views of the carrier used in the present invention, C diagrams and cross-sectional views, Figures 2 a and b are cross-sectional views of the main parts thereof, △ Figures 3 a and b are side views and cross-sectional views of conventional carriers. It is. Agent Patent Attorney Inoue - Rikitsutsu 2 Figure
Claims (1)
の柱状ロッド柱面に形成するテーパ部に係止するほゞ円
形に成形し、その一部の円弧に直線部を設ける複数の半
導体ウェーハを、前記ロッドの廻転により異なる廻転数
で廻転して、前記直線部位置を不定としてから所定位置
に転送することを特徴とする半導体ウェーハの搬送方式
。A plurality of semiconductor wafers in which a rotatable columnar rod is arranged on the opening surface of a cylindrical container, and the semiconductor wafers are formed into a substantially circular shape that is engaged with a tapered portion formed on the columnar surface of the columnar rod, and a straight portion is provided on a part of the arc. A method for transporting a semiconductor wafer, characterized in that the rod rotates at different rotation speeds to make the position of the straight line part indefinite, and then transferred to a predetermined position.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61163828A JPS6319836A (en) | 1986-07-14 | 1986-07-14 | Semiconductor wafer transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61163828A JPS6319836A (en) | 1986-07-14 | 1986-07-14 | Semiconductor wafer transfer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6319836A true JPS6319836A (en) | 1988-01-27 |
Family
ID=15781515
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61163828A Pending JPS6319836A (en) | 1986-07-14 | 1986-07-14 | Semiconductor wafer transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6319836A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6010258A (en) * | 1996-04-10 | 2000-01-04 | Sony Corporation | Display system, display method, ink ribbon, printer and image formation apparatus |
US6392257B1 (en) | 2000-02-10 | 2002-05-21 | Motorola Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
US7046719B2 (en) | 2001-03-08 | 2006-05-16 | Motorola, Inc. | Soft handoff between cellular systems employing different encoding rates |
-
1986
- 1986-07-14 JP JP61163828A patent/JPS6319836A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6010258A (en) * | 1996-04-10 | 2000-01-04 | Sony Corporation | Display system, display method, ink ribbon, printer and image formation apparatus |
US6392257B1 (en) | 2000-02-10 | 2002-05-21 | Motorola Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
US7046719B2 (en) | 2001-03-08 | 2006-05-16 | Motorola, Inc. | Soft handoff between cellular systems employing different encoding rates |
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