JPS63198212U - - Google Patents
Info
- Publication number
- JPS63198212U JPS63198212U JP8983487U JP8983487U JPS63198212U JP S63198212 U JPS63198212 U JP S63198212U JP 8983487 U JP8983487 U JP 8983487U JP 8983487 U JP8983487 U JP 8983487U JP S63198212 U JPS63198212 U JP S63198212U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- amplifier
- operational amplifier
- bias voltage
- inverting input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 230000003321 amplification Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Amplifiers (AREA)
Description
第１図はこの考案に係る増幅回路のバイアス電
圧調整回路を表す図、第２図はバイアス電圧調整
回路とともに増幅回路の具体例を表す図である。
１―バイアス電圧調整回路、２―増幅回路、Ｏ
Ｐ―オペアンプ、Ｒ１，Ｒ２―抵抗。
FIG. 1 is a diagram showing a bias voltage adjustment circuit of an amplifier circuit according to this invention, and FIG. 2 is a diagram showing a specific example of the amplifier circuit together with the bias voltage adjustment circuit. 1-bias voltage adjustment circuit, 2-amplification circuit, O
P - operational amplifier, R1, R2 - resistor.
Claims (1)
を変えることによつて増幅率を可変する帰還量制
御回路からなる増幅回路に対して、その前段に挿
入して被増幅信号に直流バイアス電圧を付与する
回路であつて、 この回路を、オペアンプと、このオペアンプの
出力端子と反転入力端子間に、および／または非
反転入力端子とアース間に接続した抵抗から構成
したことを特徴とする増幅回路のバイアス電圧調
整回路。[Claim for Utility Model Registration] For an amplifier circuit consisting of an operational amplifier, a feedback resistor, and a feedback amount control circuit that varies the amplification factor by changing the value of the feedback resistor, the signal to be amplified is inserted before the amplifier circuit. A circuit that applies a DC bias voltage to the circuit, and is composed of an operational amplifier and a resistor connected between the operational amplifier's output terminal and an inverting input terminal, and/or between the non-inverting input terminal and ground. Bias voltage adjustment circuit for amplifier circuit featuring features.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8983487U JPS63198212U (en) | 1987-06-10 | 1987-06-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8983487U JPS63198212U (en) | 1987-06-10 | 1987-06-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63198212U true JPS63198212U (en) | 1988-12-20 |
Family
ID=30949173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8983487U Pending JPS63198212U (en) | 1987-06-10 | 1987-06-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63198212U (en) |
-
1987
- 1987-06-10 JP JP8983487U patent/JPS63198212U/ja active Pending