JPS6319713U - - Google Patents
Info
- Publication number
- JPS6319713U JPS6319713U JP11050386U JP11050386U JPS6319713U JP S6319713 U JPS6319713 U JP S6319713U JP 11050386 U JP11050386 U JP 11050386U JP 11050386 U JP11050386 U JP 11050386U JP S6319713 U JPS6319713 U JP S6319713U
- Authority
- JP
- Japan
- Prior art keywords
- input circuits
- output terminal
- transistors
- switch means
- bases
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Keying Circuit Devices (AREA)
Description
第1図は本考案の一実施例を示す回路図である
。第2図イ,ロは本考案の他の実施例を示す回路
図である。
1,2……入力端子、3,4……スイツチング
トランジスタ、5,6,16……負荷抵抗、11
……出力端子、12,14,15……スイツチ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. FIGS. 2A and 2B are circuit diagrams showing other embodiments of the present invention. 1, 2... Input terminal, 3, 4... Switching transistor, 5, 6, 16... Load resistance, 11
...Output terminal, 12, 14, 15...Switch.
Claims (1)
の入力回路のうちの任意の一方を選択して出力端
子に接続する第1のスイツチ手段と、上記2つの
入力回路のうちの他方の入力回路に負荷抵抗を接
続する第2のスイツチ手段とを有することを特徴
とする信号切換器。 (2) 上記第1のスイツチ手段は上記各入力回路
と出力端子との間にそれぞれ接続された2つのダ
イオードと上記一方の入力回路に接続されたダイ
オードに順方向バイアスを供給する手段とからな
り、第2のスイツチ手段はエミツタに負荷抵抗が
接続されコレクタが上記各入力回路にそれぞれ接
続された2つのトランジスタと上記他方の入力回
路に接続されたトランジスタのベースに該トラン
ジスタを導通させるバイアスを供給する手段とか
らなる実用新案登録請求の範囲第1項記載の信号
切換器。 (3) 上記第1及び第2のスイツチ手段は互いに
連動になされた2極単頭スイツチである実用新案
登録請求の範囲第1項記載の信号切換器。[Claims for Utility Model Registration] (1) Two input circuits, an output terminal, a first switch means for selecting any one of the two input circuits and connecting it to the output terminal, and second switch means for connecting a load resistor to the other of the two input circuits. (2) The first switching means includes two diodes connected between each of the input circuits and the output terminal, and means for applying a forward bias to the diode connected to one of the input circuits. , the second switching means supplies a bias that makes the transistors conductive to the bases of two transistors whose emitters are connected to load resistors and whose collectors are connected to each of the above input circuits, and to the bases of the transistors that are connected to the other input circuit. 2. A signal switching device according to claim 1, comprising means for: (3) The signal switching device according to claim 1, wherein the first and second switch means are two-pole single-head switches that are interlocked with each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11050386U JPS6319713U (en) | 1986-07-18 | 1986-07-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11050386U JPS6319713U (en) | 1986-07-18 | 1986-07-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6319713U true JPS6319713U (en) | 1988-02-09 |
Family
ID=30989564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11050386U Pending JPS6319713U (en) | 1986-07-18 | 1986-07-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6319713U (en) |
-
1986
- 1986-07-18 JP JP11050386U patent/JPS6319713U/ja active Pending