JPS63196135U - - Google Patents

Info

Publication number
JPS63196135U
JPS63196135U JP8757287U JP8757287U JPS63196135U JP S63196135 U JPS63196135 U JP S63196135U JP 8757287 U JP8757287 U JP 8757287U JP 8757287 U JP8757287 U JP 8757287U JP S63196135 U JPS63196135 U JP S63196135U
Authority
JP
Japan
Prior art keywords
circuit
synchronization
frame
clock
protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8757287U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8757287U priority Critical patent/JPS63196135U/ja
Publication of JPS63196135U publication Critical patent/JPS63196135U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP8757287U 1987-06-08 1987-06-08 Pending JPS63196135U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8757287U JPS63196135U (enrdf_load_stackoverflow) 1987-06-08 1987-06-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8757287U JPS63196135U (enrdf_load_stackoverflow) 1987-06-08 1987-06-08

Publications (1)

Publication Number Publication Date
JPS63196135U true JPS63196135U (enrdf_load_stackoverflow) 1988-12-16

Family

ID=30944911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8757287U Pending JPS63196135U (enrdf_load_stackoverflow) 1987-06-08 1987-06-08

Country Status (1)

Country Link
JP (1) JPS63196135U (enrdf_load_stackoverflow)

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