JPS63195759U - - Google Patents
Info
- Publication number
- JPS63195759U JPS63195759U JP8768087U JP8768087U JPS63195759U JP S63195759 U JPS63195759 U JP S63195759U JP 8768087 U JP8768087 U JP 8768087U JP 8768087 U JP8768087 U JP 8768087U JP S63195759 U JPS63195759 U JP S63195759U
- Authority
- JP
- Japan
- Prior art keywords
- rom
- flush
- instruction
- integrated circuit
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
第１図は本考案の実施例の構成図である。 １，２……ＲＯＭ。 FIG. 1 is a block diagram of an embodiment of the present invention. 1, 2...ROM.
Claims (1)
第１のＲＯＭを掃き出す命令を最後の番地に有す
る第２のＲＯＭとを具備することを特徴とする半
導体集積回路。 1. A semiconductor integrated circuit comprising: a first ROM; and a second ROM having at its last address an instruction to flush out the first ROM in a flush test mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8768087U JPS63195759U (en) | 1987-06-05 | 1987-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8768087U JPS63195759U (en) | 1987-06-05 | 1987-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63195759U true JPS63195759U (en) | 1988-12-16 |
Family
ID=30945111
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8768087U Pending JPS63195759U (en) | 1987-06-05 | 1987-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63195759U (en) |
-
1987
- 1987-06-05 JP JP8768087U patent/JPS63195759U/ja active Pending
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