JPS63194545U - - Google Patents
Info
- Publication number
- JPS63194545U JPS63194545U JP8502387U JP8502387U JPS63194545U JP S63194545 U JPS63194545 U JP S63194545U JP 8502387 U JP8502387 U JP 8502387U JP 8502387 U JP8502387 U JP 8502387U JP S63194545 U JPS63194545 U JP S63194545U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- power supply
- emitter
- base
- supply terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Landscapes
- Stand-By Power Supply Arrangements (AREA)
Description
第１図は本考案の一実施例のバツテリバツクア
ツプ回路及びその周辺の回路図、第２図は第１図
の回路の変形例を示す回路図、第３図は別の実施
例の同回路図である。
４…バツテリバツクアツプ回路。
Fig. 1 is a circuit diagram of a battery backup circuit and its surroundings according to one embodiment of the present invention, Fig. 2 is a circuit diagram showing a modification of the circuit of Fig. 1, and Fig. 3 is the same circuit of another embodiment. It is a diagram. 4...Battery backup circuit.
Claims (1)
となるように負荷と電源端子との間にシリーズに
ＰＮＰトランジスタを接続し、該トランジスタの
エミツタ側と接地間にバツテリを接続し、且つ該
トランジスタのベースを上記電源端子に接続して
構成したバツテリバツクアツプ回路。 (2) 上記トランジスタのベースとエミツタ間に
抵抗を接続したことを特徴とする実用新案登録請
求の範囲第１項記載のバツテリバツクアツプ回路
。 (3) 上記トランジスタのベースを抵抗を介して
接地したことを特徴とする実用新案登録請求の範
囲第１項記載のバツテリバツクアツプ回路。[Claims for Utility Model Registration] (1) A PNP transistor is connected in series between the load and a power supply terminal so that the load side is the collector and the power supply terminal side is the emitter, and a battery is connected between the emitter side of the transistor and ground. and the base of the transistor is connected to the power supply terminal. (2) The battery backup circuit according to claim 1, wherein a resistor is connected between the base and emitter of the transistor. (3) The battery backup circuit according to claim 1, wherein the base of the transistor is grounded via a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8502387U JPS63194545U (en) | 1987-05-30 | 1987-05-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8502387U JPS63194545U (en) | 1987-05-30 | 1987-05-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63194545U true JPS63194545U (en) | 1988-12-14 |
Family
ID=30940050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8502387U Pending JPS63194545U (en) | 1987-05-30 | 1987-05-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63194545U (en) |
-
1987
- 1987-05-30 JP JP8502387U patent/JPS63194545U/ja active Pending
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