JPS6318907B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transmitting/receiving device that causes a plurality of receiving devices to selectively receive data signals transmitted from a transmitting device via a signal line.

This type of conventional device has a configuration in which a transmitting device transmits an assigned address signal to a plurality of receiving devices, and then transmits a data signal to the receiving device corresponding to the address signal, and the address signal consists of a large number of pulses. It is coded by temporally combining presence/absence. Therefore, the transmitting device must be equipped with a special address signal generating device that generates a plurality of address signals, and each of the plurality of receiving devices must be equipped with a special device for determining the address signal assigned to it. It requires a separate address signal discrimination device, which has the drawback of making the configuration complicated and expensive.Furthermore, when noise is added to the address signal, the address signal apparently changes and does not correspond to the regular address signal. There was a drawback that other receivers received the signal.

The present invention has been made in view of the above-mentioned circumstances.The purpose of the present invention is to provide a simple and inexpensive configuration without the need to provide a special address signal generating device and address signal discriminating device, and to prevent erroneous reception by a receiving device due to noise. An object of the present invention is to provide a transmitting/receiving device that can prevent such problems as much as possible.

An embodiment of the present invention will be described below with reference to the drawings.

Figure 1 shows the overall configuration, where 1 is a power line such as a light line or power line, 2 is a transmitter, 3 ₀ ,
3 ₁ , . . . 3 _o are a plurality of receiving devices, and 4 is a pair of signal lines.

First, the transmitting device 2 will be described according to FIG. 5 is a waveform shaping circuit consisting of a Schmitt circuit or the like, in which the AC power waveform A of the power line 1 is applied to the input terminal, and the output terminal synchronizes with the positive (+) polarity half wave of the AC power waveform A. to generate positive count pulses B ₀ , B ₁ , ...B _o . Reference numeral 6 denotes a counter, which is configured such that the count pulses B ₀ , B _{1 ,} . 0”,
Counter output signals C corresponding to numerical values of "1", . . . "n" are generated. This counter output signal C is applied to the input terminal Ia of the data signal generation circuit 7 and the input terminal of the control circuit 8. The control circuit 8 is configured to generate a control signal D, which is selected and set in advance in accordance with the numerical content of the applied counter output signal C, from its output terminal and supplies it to the input terminal Ib of the data signal generation circuit 7. Further, the data signal generation circuit 7 includes:
The count pulses B ₀ , B ₁ ,...B _o are applied to the input terminal Ic.
AC power waveform A is given at the beginning or end of a predetermined cycle of operation.
A count pulse synchronized to a half-wave of positive polarity which is a half-wave of one polarity of output terminal Oa based on e.g. B ₀
A positive rectangular wave reset pulse E is generated from the counter, and this reset pulse E is transmitted to the signal line 4 and also applied to the reset terminal R of the counter 6. The counter 6 is reset by the rise of the reset pulse E. Furthermore, the data signal generation circuit 7 generates positive data during the negative (-) half wave of the other polarity of the AC power supply waveform A, depending on the numerical content of the counter output signal C and the setting content of the control signal D. Signal F ₁ ,
F ₃ , F ₅ , F ₇ and negative data signals symmetrical to these
Output the appropriate signal from F ₂ , F ₄ , F ₆ , F ₈ to the output terminal Ob
These signals are generated from the input terminal Ia of the modulation circuit 9. This modulation circuit 9 has a rectangular wave modulation pulse G which is the oscillation output from the oscillation circuit 10 at its input terminal Ib.
is now given, and the data signal F ₁ ,
F ₃ , F ₅ , F ₇ and F ₂ , F ₄ , F ₆ , F ₈ are alternately extracted and sent as time-division data signals F' ₁ , F' ₂ ,...F' ₈ from the output terminal O to the signal line. It is set to send on 4th.

Now, regarding the receiving devices 3 ₀ , 3 ₁ ,...3 _o , the third
This will be explained according to the diagram. 11 ₀ , 11 ₁ , ... 11 _o are waveform shaping circuits similar to the waveform shaping circuit 5,
The count pulses B ₀ , B ₁ , . . . B _o are applied to input _terminals I of counters _{12 0 , 12 1 ,} . ...12 _o reset terminal R
The above-mentioned reset pulse E is applied to. Furthermore, counters 12 ₀ , 12 ₁ ,...12
The counter output signal _C from _the output terminal _O of the comparator circuit _{13 0} , 13 _{1 ,} . Reference value setting circuit 14 ₀ , 14 ₁ ,...
14 _o output signal is provided.
These reference value setting circuits 14 ₀ , 14 ₁ , . . . , 14 _o are respectively assigned numerical values “0”, “1”, .
Setting signals H ₀ , H ₁ , . . . H _o corresponding to “n” are generated as output signals. and,
Comparison circuits 13 ₀ , 13 ₁ , ... 13 _o receive self-assigned setting signals H ₀ , H ₁ , ... whose numerical content (count value) of counter output signal C given to input terminal Ia is given to input terminal Ib. When the numerical contents of H _o match, a permission signal I is generated from each output terminal O. 15 ₀ , 15 ₁ , . . . 15 _o are receiving circuits, each input terminal Ia of which is supplied with the time-division data signals F _{' 1} , F' ₂ , . When the signal I is applied to the input terminal Ib, when the permission signal I is applied to the input terminal Ib, the time-sharing data signals F' ₁ , F' ₂ ,...F' ₈ applied to the input terminal Ia at that time are received. When the receiving operation is performed in this way, these time-division data signals F′ ₁ , F′ ₂ ,
...The load provided corresponding to F′ ₈ is operated. In addition, the receiving circuits 15 ₀ , 15 ₁ ,...
_15o each has a synchronization pulse generation circuit that generates a synchronization pulse in one-to-one synchronization with all of the data signals F ₁ , F ₂ , ...F ₈ , and a time-sharing pulse generator corresponding to the synchronization pulse. The receiving operation is completed when the data signal is applied to the input terminal Ia and the AND condition for both is satisfied.

Next, the operation of this embodiment having the above configuration will be explained with reference to FIG. 4. Now, for example, when the power switch is turned on, the waveform shaping circuit 5 of the transmitting device 2 generates, for example, a count pulse as shown in FIG. 4b in synchronization with the positive half wave of the AC power waveform A shown in FIG. Based on _this , the data signal generating circuit 7 generates a reset pulse E as shown in FIG. 4c.
is generated and applied to the reset terminal R of the counter 6, and is also sent to the receiving device ₃₀ , via the signal line 4.
3 ₁ , . . . 3 _o to the reset terminals R of counters 12 ₀ , 12 ₁ , . . . _{12 o} , and each counter 6, 12 ₀ , 12 ₁ , . Therefore, the comparison circuit ₁₃₀ of the receiving device ₃₀ generates the permission signal I when the count value "0" of the counter ₁₂₀ matches the numerical content " ₀ " of the setting signal H0 assigned to itself. Receiving circuit 1
₅₀ , and the receiving circuit ₁₅₀ becomes ready for receiving operation. On the other hand, in the transmitting device 2, when the counter 6 reaches "0", the numerical content of the counter output signal C becomes "0", so that the control circuit 8 controls the transmitting device 3 according to the numerical content "0". ₀ , and the data signal generating circuit 7 generates positive data signals F ₁ , F ₃ , F ₅ , F ₇ as shown in FIG. Negative data signals F ₂ , F ₄ , as indicated by e
F ₆ and F ₈ are generated during the negative half-wave of the AC power supply waveform A and are applied to the modulation circuit 9. In this case, when it is not necessary to operate all the loads of the receiving device ₃₀ , it is sufficient to selectively generate only the data signals corresponding to the loads that need to be operated under the control of the control signal D. be. Furthermore, the data signals F ₁ , F ₃ , F ₅ , F ₇ and F ₂ , F ₄ ,
F ₆ and F ₈ are alternately extracted by the modulation pulse G to produce time-division data signals F′ 1 and F′ ₁ as shown in FIG.
The signals are output as F' ₂ ,...F' ₈ to the signal line 4 and transmitted to the receiving devices 3 ₀ , 3 ₁ ,... 3 _o . At this time, only the receiving circuit 15 ₀ of the receiving device 3 ₀ is ready for receiving, so this receiving circuit 15 ₀ operates to receive the time-division data signals F' ₁ , F' ₂ , . . . F' ₈ . Thus, for example, all loads of the receiving device ₃₀ are activated. Note that this time-division data signal F′ ₁ ,
F' ₂ ,...F' ₈ are output only during the negative half-wave of AC power waveform A. Thereafter, when the AC power supply waveform A becomes a positive half wave, the waveform shaping circuits 5, _{11 0} , 11 ₁ , ... 11 _o start generating count pulses B ₁ in synchronization with this, and the counter 6,
The count values of 12 ₀ , 12 ₁ , . . . 12 _o become “1”. Therefore, the comparison circuit ₁₃₀ of the receiving device ₃₀ stops generating the permission signal I, and the receiving device 30 also stops generating the permission signal I.
The comparator circuit _{13 1 generates} a permission signal I when the count value "1" of the counter 12 ₁ matches the numerical content "1" of the setting signal H ₁ assigned to itself, and sends it to the receiving circuit 15 _1. As a result, the receiving circuit 15 ₁ becomes ready for receiving operation. Further, the control circuit 8 of the transmitting device 2 generates a control signal D according to the numerical content "1" of the counter output signal C, and in response to this, the data signal generating circuit 7 generates an AC power waveform A.
Data signals F ₁ , F ₃ , F ₅ , F ₇ during the next negative half-wave of
and a data signal appropriately selected from among F ₂ , F ₄ , F ₆ , and F ₈ is generated, and therefore the modulation circuit 9
transmits an appropriately selected time-division data signal from among the time-division data signals F' ₁ , F' ₂ , . . . F' ₈ to the signal line 4 . Then, the time-division data signal transmitted to the signal line 4 is received by the receiving circuit 15 ₁ which is in a reception ready state at this time. Thereafter, in the same manner, each time the AC power supply waveform A becomes a half wave of positive polarity, the waveform shaping circuits 5, 11 ₀ , 11
₁ ,... _11o generates a count pulse, and the counters 6, ₁₂₀ , ₁₂₁ ,... _12o start counting operations, and the receiving circuits sequentially become ready for reception according to the count values. The data signal generation circuit 7 selectively generates a data signal according to the settings of the control signal D based on the counter output signal C during the negative half-wave of the AC power supply waveform A, and when based on this data signal. The receiving circuits that are ready to receive the divided data signals at that time sequentially receive the divided data signals. When the receiving circuits 15 ₀ , 15 ₁ , . . . , 15 _o complete one cycle of receiving operations, the data signal generating circuit 7 generates the reset pulse E again to perform the next cycle of operation. let

According to this embodiment, the data signal generation circuit 7 sends the reset pulse E to the signal line based on the fact that the counter 6 of the transmitter 2 performs a counting operation in synchronization with the positive half wave of the AC power waveform A. Based on the count value, the data signal is transmitted to the signal line 4 as a time-division data signal during the negative half wave of the AC power supply waveform A, and the data signal is transmitted to the signal line 4 as a time _- division data signal.
The counters 12 ₀ , 12 ₁ , ... 12 _o of 3 _{1 ,} . At the time, the receiving device 3 ₀ , 3 ₁ ,...3
Since _the receiving devices _{30 and} 30 are arranged to receive sequentially, a special address signal generating device like the conventional one is installed in the transmitting device 2, and a special address signal discriminating device like the conventional one is installed in the receiving devices 30, ₃₁ ,... _3o, respectively. The configuration is simple and can be manufactured at low cost. Also, unlike conventional methods, there is no need to transmit a temporally encoded address signal from the transmitting device 2, so the receiving device 3 is less affected by noise. _{0,3 1} ,...3 _o
It is possible to prevent erroneous reception as much as possible. Moreover,
According to this embodiment, positive and negative data signals are alternately extracted from the transmitter 2 based on the oscillation output of the oscillation circuit 10 and transmitted as time-division data signals, so the amount of data is twice as large as that of the conventional one. data signals can be transmitted.

In addition, in the above embodiment, from the transmitting device 2 to the receiving device 3
₀ , 3 ₁ ,...3 _o are time-division data signals F' ₁ , F' ₂ ,...
Although we have described the case of transmitting F′ ₈ , for example, a time-division response signal indicating that a reception operation has been performed for the time-division data signal transmitted from the transmitter 2 to the receivers 3 ₀ , 3 ₁ , ... 3 _o The receiving device 3 ₀ , 3 ₁ ... 3 _o
In this case, F' ₁ , F' ₂ , F' ₃ , F' ₄ are time-division data signals, and F' ₅ , F' ₃ , F′ ₇ and F′ ⁸ may be time-division response signals corresponding to these.

In addition, the present invention is not limited to the embodiments described above and shown in the drawings; for example, the configurations of the transmitting device and the receiving device are not limited to the configurations shown in FIGS. 2 and 3. Of course, modifications may be made as appropriate without departing from the scope of the invention.

As explained above, the present invention includes a transmitting device that includes a counter that sequentially performs a counting operation in synchronization with half waves of one polarity of an AC power waveform from a power line, and a plurality of receiving devices based on the count value. Corresponding to this, positive and negative data signals are alternately extracted based on the oscillation output of the oscillation circuit during half-waves of the other polarity of the AC power waveform and are transmitted as time-division data signals to the signal line. , a plurality of receiving devices each have a counter that sequentially performs a counting operation in synchronization with a half wave of one polarity of the AC power waveform from the power line, and the count value becomes the count value assigned to itself. Since the structure is configured so that the data signal reception operation is performed when the data signal is received, there is no need to provide a special address signal generation device and address signal discrimination device, and the structure is simple and inexpensive, and malfunctions of the reception device due to noise are prevented as much as possible. It is possible to provide a transceiver device that can do this.

[Brief explanation of the drawing]

The drawings show an embodiment of the present invention, in which FIG. 1 is a block diagram of the overall configuration, FIG. 2 is a block diagram of the transmitter, FIG. 3 is a block diagram of the receiver, and FIGS. f is a waveform diagram of each part for explaining the action. In the drawing, 1 is a power line, 2 is a transmitter, 3 ₀ , 3
₁ ,...3 _o is a receiving device, 4 is a signal line, 6 is a counter, 7 is a data signal generation circuit, 10 is an oscillation circuit,
12 ₀ , 12 ₁ , ...12 _o is a counter, 15 ₀ , 15
₁ ,... _15o indicates a receiving circuit.

Claims (1)

[Claims] 1. The transmitting device has a counter that sequentially performs a counting operation in synchronization with half waves of one polarity of the AC power waveform from the power line, and supports a plurality of receiving devices based on the count value. and is configured to alternately extract positive and negative data signals based on the oscillation output of the oscillation circuit during half waves of the other polarity of the AC power waveform and transmit them to the signal line as time-division data signals, Each of the receiving devices has a counter that performs counting sequentially in synchronization with half waves of one polarity of the AC power waveform from the power line, and when the count value reaches the count value assigned to itself, the A transmitting/receiving device configured to perform a data signal receiving operation. 2. A reset pulse is applied to the counter of the transmitting device in synchronization with a half wave of one polarity of the AC power supply waveform at the start or end of one cycle operation in which the transmitting device transmits data signals to a plurality of receiving devices. 2. The transmitting/receiving device according to claim 1, wherein the reset pulse is also applied to the counters of the plurality of receiving devices via a signal line.