JPS6318779B2 - - Google Patents

Info

Publication number
JPS6318779B2
JPS6318779B2 JP55179214A JP17921480A JPS6318779B2 JP S6318779 B2 JPS6318779 B2 JP S6318779B2 JP 55179214 A JP55179214 A JP 55179214A JP 17921480 A JP17921480 A JP 17921480A JP S6318779 B2 JPS6318779 B2 JP S6318779B2
Authority
JP
Japan
Prior art keywords
access
bit
service processor
register
status
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55179214A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57101924A (en
Inventor
Tadashi Oohashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55179214A priority Critical patent/JPS57101924A/ja
Publication of JPS57101924A publication Critical patent/JPS57101924A/ja
Publication of JPS6318779B2 publication Critical patent/JPS6318779B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
JP55179214A 1980-12-18 1980-12-18 Contention controlling system Granted JPS57101924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55179214A JPS57101924A (en) 1980-12-18 1980-12-18 Contention controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55179214A JPS57101924A (en) 1980-12-18 1980-12-18 Contention controlling system

Publications (2)

Publication Number Publication Date
JPS57101924A JPS57101924A (en) 1982-06-24
JPS6318779B2 true JPS6318779B2 (enrdf_load_stackoverflow) 1988-04-20

Family

ID=16061923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55179214A Granted JPS57101924A (en) 1980-12-18 1980-12-18 Contention controlling system

Country Status (1)

Country Link
JP (1) JPS57101924A (enrdf_load_stackoverflow)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5834856B2 (ja) * 1975-03-17 1983-07-29 株式会社日立製作所 キオクセイギヨソウチ
JPS53110440A (en) * 1977-03-09 1978-09-27 Hitachi Ltd Prevention system for competition between processors
JPS5447440A (en) * 1977-09-21 1979-04-14 Hitachi Ltd Control system for input/output device

Also Published As

Publication number Publication date
JPS57101924A (en) 1982-06-24

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