JPS63186343A - Memory control system - Google Patents

Abstract

PURPOSE:To control in parallel a memory means via >=two memory control means and to ensure the flexible application of a memory control system, by performing the input/output control of the data on the memory means via each memory control means with reference to the indication signal applied to another memory control means. CONSTITUTION:When both memory controllers 221A and 221B try to give accesses to the same memory at a time, the higher priorities are given to the requests of channel processors 243 and 247 than those of CPU 241 has the higher priority than that given from the controller 221B and is given to both memories 211 and 213. This relationship is reversed for the assesses given to both memories 215 and 217. For instance, the memories 211 and 213 are used as the memories set at the local side of the controller 221A; while the memories 215 and 217 are used as the memories set at the local side of the controller 221B respectively. Otherwise these memories are used as those set at the remote side. Under such conditions, the priorities are given to the memories of the local side. In such a way, two memory controllers can control a single memory in parallel with each other. Thus the flexible application is possible with a memory control system.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Conventional Technology Problems to be Solved by the Invention Means for Solving the Problems Action Examples! , Correspondence between the embodiment and FIG. 1■, Structure of the embodiment■, Operation of the embodiment (i) Control operation by inputting an instruction signal from the local side (ii) Control operation by inputting control information from the remote side■ , Summary of Examples ■0 Modifications of the Invention Effects of the Invention [Summary] In the storage control system, when controlling the input/output of data to the storage means, each storage control means controls the input/output of data to the other storage control means. By referring to the instruction signal and controlling the human output of data according to the input instruction signal, the storage means can be stored in two ways.
Can be controlled in parallel by two or more memory control means,
It is possible to provide flexibility in how the system is used.

[Industrial application field]

The present invention relates to a storage control system, and more particularly, to a storage control system that inputs and outputs data from a storage means shared by a plurality of storage control units.

[Conventional technology]

2. Description of the Related Art In computer systems and the like, when data is manually output between a central processing unit or channel processor and a storage device, there is a method in which data is outputted via a storage control device.

In particular, combining a plurality of storage control devices and storage devices is effective in terms of shortening wiring and increasing flexibility in system configuration. An example thereof is shown in FIG. Here, the central processing unit is shown as CPU, the channel processor as CHP, the storage device as MSU, and the storage control device as MCU.

In the system shown in FIG. 5, instruction signals from the central processing unit 541 and the channel processor 543 are input to the storage controller 521, and the storage controller 521 controls the storage device 511 and the storage device 513. Do the following.

Similarly, central processing unit 545 and channel processor 5
The instruction signal from 47 is input to the other storage control device 521B. This storage control device 521B is a storage device 5
15. Control the storage device 517. Further, the storage control device 521A and the storage control device 521B are connected to each other, and the central processing unit 541 and the channel processor 54
When the data in the storage device 515 or the storage device 517 is needed from the storage device 3, it sends an instruction signal to the storage control device 521B via the storage control device 521A.

[Problem that the invention seeks to solve]

By the way, in the above-mentioned conventional method, when attempting to read data from the storage device 517 from the central processing unit 541, for example, the storage control device 521A and the storage control device 521
Since the data must go through both B and B, input/output from other storage devices is restricted during that time. Moreover, if a failure occurs in either the storage control device 521 or the storage control device 521B, the storage devices connected to it will become unusable.

As described above, the storage control device 521A and the storage control device 5
Because both 21B and 21B were controlling separate storage devices,
There was a problem in that the system lacked flexibility in how it was used.

The present invention was created in view of these points, and provides a storage device that allows multiple storage control devices to control the same storage device, thereby providing flexibility in how the system is used. The purpose is to provide a control method.

[Means for solving problems]

FIG. 1 is a diagram showing the principle of the storage control system of the present invention.

In the figure, storage means 111 stores data.

at least two storage control means 121A, 121B,
. . . controls input/output of data in the storage means 111.

Overall, an instruction signal 131A input to each storage control means while referring to instruction signals to other storage control means,
131B, . . . is configured to perform data input/output control according to the data.

[For production]

Storage means 111 stores data.

An instruction signal 131'A is introduced into the storage control means 121A, and an instruction signal 131B is sent to the other storage control means 121B.
The output of the data in the storage means 111 is controlled while referring to . Similarly, an instruction signal 131B is introduced into the storage control means 121B, and the data input/output of the storage means 111 is controlled while referring to the instruction signal 131A sent to the other storage control means 121A.

In the present invention, since each of the at least two storage control means can control the data input/output of the storage means 111 while referring to the instruction signal to the other storage control means, the storage means 111 can be controlled in parallel by two or more storage control means, giving flexibility to the system configuration.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 2 shows the overall configuration of a storage control system in an embodiment to which the present invention is applied.

(2) Pair I between -II and 1'' Here, the correspondence between the embodiment of the present invention and FIG. 1 will be shown.

The storage means 111 is a storage device 211. storage device 213,
Storage device 215. This corresponds to the storage device 217.

The storage control means (121A, 121B, ...) is
This corresponds to the storage control device 221A and the storage control device 221B.

Instruction signal (131"A, 131'B, ...)
is the central processing unit 241. An instruction signal from the channel processor 243 to the storage controller 221A, and a central processing unit 245. This corresponds to an instruction signal from the channel processor 247 to the storage control device 221B.

Examples of the present invention will be described below on the assumption that there is a correspondence relationship as shown below.

In Figure 2, the central processing unit is CPU, the channel processor is CHP, the storage device is MSU, and the storage control device is M
Let it be CU.

A storage control device 22°IA is connected to the central processing unit W241-1, the Janel processor 243, and the central processing unit 245. A storage control device 221B is connected to the channel processor 247. The storage control device 221A and the storage control device 221B are connected to each other, and further,
Each of the storage control device 221A and the storage control means 221B includes a storage device 211. Storage device 213. A storage device 215 and a storage device 217 are connected.・Third
The figure shows the detailed configuration of the storage control means 221A shown in FIG. 2.6 It is assumed that the storage control device 221B has a similar configuration.

An instruction signal from the central processing unit 241 is received and register a
At (Ra in the figure) 311, an instruction signal from the channel processor 243 is stored in the reception register b (Rb in the figure) 313. Receive register a311, receive register b313
The outputs from the two are input to the selector 315, and one of them is selected. The output of the selector 315 is transferred to the transfer register (TR in the figure).
) 317, and the output of the transfer register 317 is input to the local request register (LR in the figure) 319 and the storage controller 221B. Local request register 319
The output from local request boat a (LPa in the figure)
321 or local request boat b (LPb in the figure) 3
23 and further selected by the selector 325,
It is input to a register (L in the figure) 327. register 3
The output from 27 is input to a busy control section 339.

The busy control unit 339 has internal busy latches corresponding to the storage devices 211 to 217.

A storage device whose busy latch is "1" indicates that it is being accessed, and a storage device whose busy latch is "0" indicates that it can be accessed.

In addition, the signal input from the transfer register 317 of the storage control device 221B to the storage control device 221A is input to the remote request register (RR in the figure) 329, and furthermore, the signal is input to the remote request register (RR in the figure) 329, and furthermore, the signal is input to the remote request register (RR in the figure) 329. RPb) 333 in the figure, is selected by a selector 335, and is input to a register 337 (R in the figure).The output from the register 337 is input to a busy control section 339.

The output from the busy control section 339 is the remote timing latch a (R'l'Ra in the figure) 345. The signal is input again to the busy control unit 339 via the remote timing latch b (RTRb in the figure) 347.

Other outputs from the busy control unit 339 are the storage device 211
, storage device 213. Storage device 215. At the same time as being input to the storage device 217, the local timing latch a (LTRa in the figure) 341. local timing latch b
(LTRb in the figure) 343, the busy control unit 33
It will be remanufactured on September 9th.

In the advanced embodiment, when both the storage control device 221A and the storage control device 221B attempt to access the same control device at the same time, the channel processor 243. Channel processor 247 requests are sent to central processing unit 241 . The request from the central processing unit 245 shall be given priority. Similarly, access to the storage device 211° and the storage device 213 is from the storage control device 221A to the storage control device 221B.
Priority is given to access from storage device 215. Access to the storage device 217 is the opposite (storage device 211
．． If the storage device 213 is the local storage device of the storage control device 221A, the storage device 215 is the local storage device of the storage control device 221B, and the others are remote storage devices, then the local side is Prioritize).

Memory control bag now! Focusing on the control operation in 22xA, the central processing unit 241. Channel processor 243 (
The control operation when an instruction signal is input from the local side) and the control operation when control information is input from the storage control device 221B will be considered separately.

FIG. 4 is an explanatory diagram of the operation of the embodiment. Figure 4 (a) shows the operating procedure when an instruction signal from the local side is input.
FIG. 4(b) shows the operating procedure when control information from the remote side is input.

In the embodiment, a control instruction signal from the remote side is used as control information.

Hereinafter, reference will be made to FIGS. 2 to 4.

Central processing unit 241 or channel processor 243
When the central processing unit 241 receives an instruction to input/output data (for example, read data) from the storage devices 211 to 217, the central processing unit 241
The instruction signal from the channel processor 243 is sent to the reception register a311, and the instruction signal from the channel processor 243 is sent to the reception register b313.
(step 411).

Receive register a311. The instruction signal of the reception register b313 is input to the selector 315. The selector 315 selects the receiving register a311. If the instruction signal is input to only one of the receiving registers b313, that instruction signal is output, and the instruction signal is input to only one of the receiving registers a311. receive register b
313, the one with higher priority is output. In this embodiment, requests from the channel processor 243 are given priority over requests from the central processing unit 241.

The instruction signal output from selector 315 is stored in transfer register 317. Then, the transfer register 317
The instruction signal stored in is transferred to the storage control device 221B as control information (step 412).

At the same time, the instruction signal stored in the transfer register 317 is
It is input to the local request register 319, and is further input to the local request board a321 or local request board b3.
23. When it is an instruction signal issued from the central processing unit 241, it is stored in the local request boat a321,
If it is an instruction signal issued from the channel processor 243, it is stored in the local request baud)b3.23.

Local request port 1-a 321. The output from the local request port) b323 is input to the selector 325,
Similar to the selector 315, select the one with higher priority (
Step 413). - The instruction signal output from the selector 325 is the register 3
27, and is further input to the busy control unit 339.

The busy control unit 339 first receives the input instruction signal from the control device (for example, the storage device 2) that the input instruction signal is trying to access.
11) is busy (step 41).
4). When the storage control device 221A is currently accessing the storage device 211 or the storage control device 221B is accessing the storage device 211, the storage device 211 is busy, and the busy latch corresponding to the storage device 211 inside the busy control unit 339 is The busy control unit 339 makes an affirmative determination in step 414 when the busy latch is "1" and repeats the determination in step 414 until the busy latch is reset.

If the storage device 211 is not busy, step 414
A negative determination is made in step 415, and then it is determined whether an access instruction for the same storage device has been issued from the storage control device 221B (step 415).

If the storage control device 221B also issues an instruction to access the storage device 211, an affirmative determination is made in step 415, and then the busy control section 339 sends an instruction to access the storage device 211 (the storage control device 211).
21A) is given priority (step 416).

Storage controller 221 people are on the remote side (storage device 215,
When attempting to access the storage device 217),
Since the instruction from the storage control device 221B has priority, a negative determination is made in step 416, and the steps from step 414, in which the determination is made as to whether or not it is busy, are repeated. Note that the storage control device 22
When the instruction of 1B is given priority, access from the storage control device 221B is executed, and at this time the busy latch in the busy control unit 339 becomes "1".

When accessing the storage device 211, the storage device 211
Since it is on the local side of the storage control device 221A, an affirmative determination is made in step 416 as to whether or not the access instruction for itself (storage control device 221A) is given priority, and then an instruction to the storage device 211 is made. is sent and activated (step 417).

If the storage control device 221B does not issue an instruction to access the same storage device, a negative determination is made in step 415, and the process proceeds to step 417, where the storage device 211 is activated.

Next, set the busy latch of the activated storage device 211 to “l”.
(step 418).

The activation instruction to the storage device 211 is also input to the local timing latch a'341, and then input again to the busy control unit 339 via the local timing latch b343. In the busy control unit 339, when an instruction is input from the local timing latch b343, the busy latch of the storage device 211 is reset to 0'' (step 419).The storage device of the embodiment is accessed every two cycles. is possible, so local timing latch a 341. local timing latch b
After delaying the instruction signal by two cycles at step 343, the busy latch was reset.

Then, the storage device 211 is accessed and the storage device 21
1 is input to the storage control device 221A (step 420), and the storage control device 221A transfers the data to the central processing unit 241 or channel processor 243 that sent the instruction signal to the storage control device 221A (step 421). The processing of the storage control device 221A ends.

When an instruction signal from the central processing unit 245 or channel processor 247 is input to the storage control device 221B, the instruction signal transferred from the storage control device 221B and output from the register 317 is input to the remote request register 329 as control information. (step 431).

The control information input to the remote request register 329 is
Furthermore, it is manually input to the remote request port a331 or the remote request port b333.

For example, an instruction signal issued from the central processing unit 245 is stored in the remote request port a331, and an instruction signal issued from the channel processor 247 is stored in the remote request port b333.

remote request boat a331. The output from the remote request port b333 is input to the selector 335, and the one with the higher priority is selected (step 432).

The control information output from the selector 335 is sent to the register 3.
37, and is further input to the busy control unit 339.

The busy control unit 339 determines whether the control device to which the input control information (access instruction from the storage control device 221B) attempts to access is busy (step 433).

When the busy latch is "1", an affirmative determination is made and step 433 is repeated until the busy latch is reset.

The control that the storage control device 221B is trying to access
If the 4Ba location is not busy, a negative determination is made in step 433, and then it is determined whether or not the storage control device 221A itself has issued an access instruction for the same storage device (step 434).

If the storage control device 221A has also issued an access instruction to the same control device, an affirmative determination is made in step 434, and then it is determined whether priority is given to the access instruction from the storage control device 221B. (Step 435).

When the storage control device 221B attempts to access the local side of the storage control device 221A (storage device 211, storage device 213), the instruction from the storage control device 221A takes priority, so a negative determination is made in step 435, and step The process from step 433 of determining whether or not it is busy is repeated.

When the storage control device 221B is attempting to access the remote side of the storage control device 221A (storage device 215, storage device 217), an affirmative determination is made in step 435, and then the busy latch of the storage device to be accessed is set to “. 1 (step 436).

If the control information from the storage control device 221B and the instruction to access the storage device are not issued from the storage control device 221A, a negative determination is made in step 434, and the process proceeds to step 43.
Move to step 6 and perform the busy latch cent.

Next, an instruction from the busy control unit 339 (storage control device 2
control information from 21B) is remote timing latch a
345, and furthermore, remote timing latch b
347 and is again input to the busy control unit 339. In the busy control unit 339, the remote timing latch b3
When an instruction is input from step 47, the busy latch set in step 436 is reset (step 437).
Finish the process.

■ Summary of the male side In this way, the two storage control devices 221A and 22.1B
When an access instruction is input to one of the storage control devices, the instruction is also transferred to the other storage control device. Based on these instructions, these two storage control devices
Same judgment (busy judgment).

(determination of whether there is an access request for the same storage device, priority determination).

Therefore, one storage device 211 can be controlled in parallel by the two storage control devices 22.1A and 221B.
It is possible to provide flexibility in how the system is used.

Further, as long as the access requests of the two storage control devices 221A and 221B do not overlap, the storage control device 221A or 221B can access the storage devices separately, so that processing efficiency can be improved.

■0. Further, in the embodiment of the present invention described above, it was considered that the storage device is accessed by two storage control devices, but the number of storage control devices may be three or more, and in that case, All storage control devices need to be connected so that control information can be transferred.

Further, in the embodiment, an example is shown in which two storage devices are connected to one storage control device, but it goes without saying that three or more storage devices may be connected.

Furthermore, in the embodiment, the local and remote instruction signals are transmitted and received between the storage control devices, but the same instruction signal may be simultaneously input from the central processing unit and the channel processor to each storage control device. .

Further, in the embodiment, the instruction signal to be transferred to another storage control device is used as control information, but it is also possible to perform processing according to the input instruction signal and transfer the processing result as control information.

Although the correspondence between FIG. 1 and the present invention has been explained in "1. Correspondence between the embodiment and FIG. 1," it is not limited to this, and there may be various modifications. Those skilled in the art will be able to easily guess this.

〔Effect of the invention〕

As described above, according to the present invention, each storage control means:
By controlling data input/output according to instruction signals input to each storage control means while referring to control information from other storage control means, a certain storage means can be controlled in parallel by two or more storage control means. This is extremely useful in practice.

[Brief explanation of the drawing]

Figure 1 is a principle block diagram of the storage control system of the present invention, Figure 2
5 is an overall configuration diagram of a storage control system according to an embodiment of the present invention; FIG. 3 is a detailed configuration diagram of a storage control device according to an embodiment of the present invention; FIG. 4 is an explanatory diagram of the operation of the embodiment; The figure is a configuration diagram of a conventional example. In the figure, 111 is a storage means, 121A, 121B, . . . are storage control means, 13
1A, 131B, ... are instruction signals, 211.21
3,215,217,511,513.515.517
is a storage device, 221A, 221B, 521A, 521B is a storage control device, 24i, 245, 541, 545 is a central processing unit, 31
1 is reception register a1 313 is reception register b. 315, 325, 335 selector, 317 transfer register, 319 local request register, 321 local request port a1, 323- local request port b. 327, 337 is a register, 329 is a remote request register, 331 is a remote request port a1, 333 is a remote request port b1, 339 is a busy control unit, 341 is a local timing latch a1343 is a local timing latch b1345 is a remote timing latch A1347 is a remote timing latch It is b. vinegar. 1'71 Honwaki Hat G Kakuan Arowa Diagram 1 Figure 1 Schematic diagram of Mukuro full's structure Figure 2 Figure 3 Figure 4 4 Yu1==z Yusaka■ Figure 5

Claims (3)

[Claims] (1) A storage means (111) for storing data, and at least two for controlling data input/output of the storage means (111).
storage control means (121A, 121B, . . . );
...) are configured to be applied to each storage control means. (2) The storage control system according to claim 1, wherein each of the at least two storage control means simultaneously recognizes the state of the storage means (111). (3) The storage control system according to claim 1, wherein each of the at least two storage control means holds control information for the storage means (111).