JPS63185250A - Data transmission system - Google Patents

Abstract

PURPOSE:To transmit subcommutation data fast by performing conventional subcommutation transmission normally and sending the subcommutation data regarding a selection control signal preferentially when the signal is received. CONSTITUTION:Normal-time transmission data and subcommutation data which are decided by a decision circuit 11 are stored in a normal. time transmission data buffer 12 and a subcommutation data buffer 13 respectively. Output call control over those data buffers is performed by calling either buffer output with commands from a transmission counter 19 and a subcommutation counter 17, perform. ing OR operation by an OR device 14 and conversion to serial data by a parallel-series converter 15, and sending data to a master station by a converter 18. The selection control signal, on the other hand, is demodulated by a demodulator 20 and decoded into a selection signal by a decoder 23. Consequently, the subcommutation data regarding the selection signal is sent fast.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a data transmission system, in which sub-commutation transmission words are transmitted in fast forward mode in accordance with selected control signals, and even when a large amount of data is transmitted, confirmation at the time of control response is achieved. It can be applied to remote monitoring and control equipment that performs control while

[Conventional technology]

Sub-commutation according to the present invention means transmitting multiple pieces of information by temporally switching them using a certain information word within one cycle.As a similar method, when preferentially fast-forwarding measurement data, etc., the frame is shortened. Do you, 1
Examples include supercommutation, in which specific information is always transmitted multiple times within a cycle. There is a method of fast forwarding using a selection signal in Japanese Patent No. 781,634, but priority transmission of subcommutation data is not taken into consideration.

[Problems to be Solved by the Invention] Conventionally, subcommutation transmission has been adopted as a means of transmitting large amounts of data for which word addresses cannot be specified.

However, data subject to subcommutation has a slow data update cycle, and subcommutation cannot be used when a response during control or when a fast transmission time is required.
Method of dividing the transmission line % method % Dividing the transmission line doubles the running cost and dividing the equipment is also expensive.
Solving conventional problems.

[Means for solving problems]

For sub-community data, two words were always used for transmission, and one sub-community data word was transmitted in one cycle.

In this method, n cycles are required to transmit n pieces of sub-community data, and the sub-community data update cycle is n.
It was every cycle.

The present invention focuses on the difference in transmission time between the normal data transmission cycle and the control data transmission cycle, and focuses on the difference in transmission time between the normal data transmission cycle and the control data transmission cycle. ', 1 are conventional sub-commutation transmissions, and when receiving a selection control signal, fast-forward transmission of sub-commutation data is performed by preferentially transmitting sub-commutation data related to that signal.

[Effect]

Subcommutation data is transmitted using a combination of two types of addresses: constant transmission and subcommutation transmission.

The subcommission data is stored in a buffer, from which the corresponding word is extracted from the selection control code for the counter control that is transmitted sequentially, and the rest are short-circuited and fast-forwarded.

〔Example〕

Examples of the present invention will be described below.

FIG. 1 shows an example of this, in which the data related to the selection control signal is S as the subcommission words 81 to Sn. Conventionally, different subcommission data is transmitted for one cycle,
81 data had been updated after n cycles. According to the present invention, the S1 data is repeatedly transmitted while the selection signal is present.

According to this, although the sub-commission data after the S2 data is delayed, there is no problem because it is not directly related to control.

This data transmission method is applied in the configuration shown in FIG. 1 is a selection signal command switch, 2 is a data transmission device (master station), 3 is a cable connecting between data transmission devices, 4 is a data transmission device (slave station), 5 is a device to be selectively controlled, 6 is a data detector , 7 are data monitoring equipment.

If there is no command from the selection signal command switch 1, 6
Of the data detected in , it is imported into data transmission device No. 4 (slave station) so as to select and distinguish between constant transmission and subcommittal transmission, and is transferred to data transmission device No. 2 (master station) using a 1 time division multiplexing cyclic transmission code. 7 data monitoring equipment.

Therefore, as many monitoring devices as the number of data items are installed in parallel or in a switched manner.

Like the subcomi data, the command from the selection signal command switch 1 is transmitted to the data transmission device 4 using a time division multiplex cyclic transmission code, and a control signal is given to the controlled device 5, and the control result is transmitted to 6. Detected by the detector, the data is transmitted as described above.

FIG. 3 shows a subcommutation transmission code of such a transmission system.

It is a time division multiplex code, and is a sub-commission transmission in 44-bit inversion continuous transmission, and one cycle indicates from the synchronization word of SYC to the final data word Wn.

In this word structure, the words related to subcommission transmission are Ws and 5At (i=1 to n) shown by hatching, and the subcommission data is SAi.

Ws defines the word address for constant transmission and the word address for subcomi data, and the subcomi data is SAi
The method is specified in .

FIG. 4 shows the transmission timing of constant transmission and sub-commission transmission.

The constant transmission data update period of W1 to Wn is a time interval of t1 to t2. If there are n subcomi data, the subcomi data SAt is updated after n cycles.

Conventionally, SAi data is updated at the time tz and t6, but in the present invention, it is updated at the time interval from t to t2, resulting in a significant time reduction.

However, subcommission data other than SAi subcommission data will be delayed by that amount, but as shown in FIG. 6, this does not pose a practical problem.

Hereinafter, an embodiment of the apparatus will be described based on FIG. 5.

6 a detector, 8 an input circuit for converting a signal from the detector, 9 an input scanning circuit, 10 an A/D converter, 11 an A/D converter;
/D import, scanning import address determination unit, 12 is a constant transmission data buffer, 13 is a subcomi data buffer, 1
4 is an output signal ORer from both buffers, 15 is a parallel -
A serial converter, 16 a modulator, 17 a subcomm counter,
18 is a subcomm address setter, 19 is a transmission counter, 20 is a demodulator, 21 is a serial-parallel converter, 22 is a sign verification section, 23 is a decoder, 24 is a selection control output section, 25
26 is a selection signal coincidence detection section, 27 is a subcommission word reduction processing section, 28 is a transmission word reduction processing section, and 29 is an input counter.

The data detected by the detector 6 is electrically converted into a signal level by an input circuit 8, and then passed through an input scanning circuit 9.
Input to A/D converter 10.

The A/D converter 10 converts in units of quantity, and determines which address data to A/D out of the large amount of data input to the input circuit 8 based on a command from the address determination unit 11. , the A/D converter 10, and the input signal address of the input scanning circuit 9 are determined.

Therefore, as a judgment input of the address judgment circuit 11,
There is an input counter 29, which provides a distinction between constantly transmitted words and sub-commissioned transmitted words. The regular transmission data and sub-commission data determined by the determination circuit 11 are stored in the regular transmission data buffer 12 and the sub-commission transmission data buffer 13, respectively.

This data buffer output calling control calls one of the buffer outputs in response to commands from the transmission counter (constant transmission word definition) 19 and the subcommitment counter (subcommission transmission word definition) 17, and ORs it with the OR unit 14. A parallel-to-serial converter 15 serializes the data, and a converter 16 transmits the data to the master station.

- The force selection control signal is demodulated by a demodulator 20, parallelized by a serial-parallel converter 21, checked for transmission errors by a code verification circuit 22, and then decoded into a selection signal by a decoder 23.

The decoded signal is replaced by an output contact in the selection output circuit 24 and inputted to the other selection signal coincidence detection unit 26 to be applied to the controlled device 6 . Here, the word address to be fast-forwarded with respect to the selection signal is detected to match the word address set by the setting device 25 in advance, and if they match, a match signal is given to the frame shortening processing units 27 and 28, and the transmission counter 29 , or shorten the subcomi counter by frames. It is assumed that the address for frame shortening is set in advance using the setting device 18.

An address for frame shortening is outputted by a subcommission word frame control 27 and inputted to a subcommission counter 17, a fast forward subcommitment address is given to a subcommission data buffer 13, and only fast forward data is output from the buffer.

This allows fast-forwarding of subcomi data related to the selection signal.

FIG. 7 shows a modification of the present invention. In addition to fast-forwarding only the sub-commission data S1, it is also possible to easily fast-forward multiple sub-commission data (here, S-work to Ss) every few cycles. It is.

〔Effect of the invention〕

According to the present invention, it is possible to quickly transmit a large amount of data within a limited number of address words.

If the conventional subcomi data is, for example, 30 words and the constant transmission word length is 20 words, the transmission time for one cycle is about 5 seconds (signal transmission speed 200 bPS, 44 bit inversion continuous transmission). Since the subcomi data is updated after 30 cycles, it will be updated after 150 seconds.

According to the present invention, under the same conditions, the update cycle of the subcomi data is about 5 times, which is the same as that of constant transmission for data related to selection control.
seconds.

Subcommission data not related to selection control is delayed by the number of cycles transmitted under selection control.

However, as shown in FIG. 6, it is sufficient for the sub-commission data to be within the observation period of one hour, so this delay does not pose a problem. Therefore, selection control of a large amount of sub-commission data becomes possible.

[Brief explanation of the drawing]

Fig. 1 is a subcommission transmission diagram of an embodiment of the present invention, Fig. 2 is a diagram of facilities related to the present invention, Fig. 3 is a conventional transmission code diagram, and Fig. 4 is an explanatory diagram of the operation of the present invention. , FIG. 5 is a block diagram of the present invention, FIG. 6 is a detailed explanatory diagram of the present invention, and FIG. 7 is a detailed explanatory diagram of the present invention. 4... Data transmitting/receiving device (slave station), 9... Input scanning circuit, 11... Address determination section, 12... Constant transmission data buffer, 13... Subcomi data buffer,
15... Parallel-serial converter, 25... Selection signal setter, 26... Selection signal coincidence detection section, 27... Subcommission word reduction processing section, 28... Transmission word reduction processing section, 29...Input counter, 18...Subcomi address setter, 19...Transmission counter.

Claims (1)

[Claims] 1. In a method that has a data transmitting device and a data receiving device and transmits data between them by cyclic time division multiplexing using a combination of word address and data, when transmitting data by subcommutation, combination with selection signal A data transmission method characterized by speeding up the update cycle of the data itself transmitted by subcommutation.