JPS63183658U - - Google Patents
Info
- Publication number
- JPS63183658U JPS63183658U JP7407587U JP7407587U JPS63183658U JP S63183658 U JPS63183658 U JP S63183658U JP 7407587 U JP7407587 U JP 7407587U JP 7407587 U JP7407587 U JP 7407587U JP S63183658 U JPS63183658 U JP S63183658U
- Authority
- JP
- Japan
- Prior art keywords
- official
- memory
- variable
- data
- key
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
Description
図面はこの考案の一実施例を示すもので、第１
図は外観構成を示す平面図、第２図は回路構成を
示すブロツク図、第３図はキー操作とそれに対応
する表示状態を示す図、第４図は処理内容を示す
フローチヤートである。
１……本体ケース、２……表示部、３……電源
スイツチ、４……キー入力部、４ａ……置数キー
、４ｂ……フアンクシヨンキー、４ｃ……アルフ
アベツトキー、４ｄ……公式（ＦＭＬＡ）キー、
４ｅ……実行（ＥＸＥ）キー、１１……制御部、
１２……公式メモリ部、１３……固定変数メモリ
部、１４……非固定変数メモリ部、１５……デー
タメモリ部、１５ａ……表示バツフア、１５ｂ…
…数式バツフア、１５ｃ……ポインタ、１６……
演算部、１７……データバス。
The drawing shows one embodiment of this invention.
2 is a block diagram showing the circuit structure, FIG. 3 is a diagram showing key operations and corresponding display states, and FIG. 4 is a flowchart showing processing contents. 1...Main body case, 2...Display section, 3...Power switch, 4...Key input section, 4a...Number key, 4b...Function key, 4c...Alphabet key, 4d...Official (FMLA) key,
4e...Execution (EXE) key, 11...Control unit,
12...Official memory section, 13...Fixed variable memory section, 14...Non-fixed variable memory section, 15...Data memory section, 15a...Display buffer, 15b...
...Formula buffer, 15c...Pointer, 16...
Arithmetic unit, 17...data bus.
Claims (1)
値及びこれらが入力済であるか否かを示すフラグ
を組にして一時的に記憶する非固定変数メモリと
、 この非固定変数メモリに記憶された変数データ
を用いて上記公式メモリから読出した公式データ
による演算を実行する演算手段と を具備したことを特徴とする小型電子式計算機。[Scope of Claim for Utility Model Registration] An official memory that stores official data, variable names and numerical values corresponding to the variables in the official data, and a flag indicating whether these have been input or not are temporarily combined. A small electronic calculator characterized by comprising: a non-fixed variable memory for storing; and an arithmetic means for executing an operation based on the official data read from the official memory using the variable data stored in the non-fixed variable memory. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7407587U JPS63183658U (en) | 1987-05-18 | 1987-05-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7407587U JPS63183658U (en) | 1987-05-18 | 1987-05-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63183658U true JPS63183658U (en) | 1988-11-25 |
Family
ID=30918969
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7407587U Pending JPS63183658U (en) | 1987-05-18 | 1987-05-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63183658U (en) |
-
1987
- 1987-05-18 JP JP7407587U patent/JPS63183658U/ja active Pending
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