JPS63179712U - - Google Patents
Info
- Publication number
- JPS63179712U JPS63179712U JP7033687U JP7033687U JPS63179712U JP S63179712 U JPS63179712 U JP S63179712U JP 7033687 U JP7033687 U JP 7033687U JP 7033687 U JP7033687 U JP 7033687U JP S63179712 U JPS63179712 U JP S63179712U
- Authority
- JP
- Japan
- Prior art keywords
- base
- main surface
- mosaic
- display
- display panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011159 matrix material Substances 0.000 claims 1
- 210000000078 claw Anatomy 0.000 description 2
- 238000005192 partition Methods 0.000 description 1
Landscapes
- Casings For Electric Apparatus (AREA)
Description
第1図は本考案の一実施例であるモザイク表示
盤を示す斜視図、第2図はこの実施例におけるデ
イスプレイユニツトおよび回路ユニツトの取付状
態を示す断面図、第3図は従来の表示盤の一例を
示す斜視図である。
1……モザイク表示盤、2……ベース、3……
デイスプレイユニツト、4……回路ユニツト、5
……通孔、6……連結手段、7……ランプモジユ
ール、8……フイルター、9……キヤツプ(標準
仕様)、9a……キヤツプ(特殊仕様)、10…
…発光源、11a,11b……係合爪、11c,
11d……突起部、12……プラグ部、13……
端子ピン、14……セパレート板、15……逆耐
圧ダイオード、16……回路基板、17……端子
ピン、18a,18b……係合爪、18c,18
d……突起部、19……抵抗、21……ソケツト
端子、22……コネクタ、24……基板、31…
…表示盤、32……仕切壁、33……枠体、34
……回路基板、35……デイスプレイユニツト、
36,36a……キヤツプ、P……通孔間の単位
ピツチ間隔。
Fig. 1 is a perspective view showing a mosaic display panel which is an embodiment of the present invention, Fig. 2 is a sectional view showing the mounting state of the display unit and circuit unit in this embodiment, and Fig. 3 is a conventional display panel. It is a perspective view showing an example. 1...Mosaic display board, 2...Base, 3...
Display unit, 4...Circuit unit, 5
...Through hole, 6...Connection means, 7...Lamp module, 8...Filter, 9...Cap (standard specification), 9a...Cap (special specification), 10...
...Light emission source, 11a, 11b...Engagement claw, 11c,
11d...Protrusion part, 12...Plug part, 13...
Terminal pin, 14... Separate plate, 15... Reverse voltage diode, 16... Circuit board, 17... Terminal pin, 18a, 18b... Engaging claw, 18c, 18
d... Protrusion, 19... Resistor, 21... Socket terminal, 22... Connector, 24... Board, 31...
... Display panel, 32 ... Partition wall, 33 ... Frame, 34
...Circuit board, 35...Display unit,
36, 36a...Cap, P...Unit pitch interval between through holes.
Claims (1)
チ間隔で通孔が開設されたパネル状のベースと、
このベースの前記通孔に対して係止手段によつて
装着されるモザイク表示体とを有しており、当該
モザイク表示体はその主面に角形の表示面を有し
ており当該表示面はその縦横寸法がそれぞれ前記
ベースのピツチ間隔の整数倍となるよう構成され
ていることを特徴とするモザイク表示盤。 (2) 前記モザイク表示体が、前記ベースの主面
側に装着されたデイスプレイユニツトと、該デイ
スプレイユニツトを覆うようにして前記ベースの
主面側に装着されその外方主面に前記角形主面の
形成されたキヤツプと、前記ベースの他面側の前
記デイスプレイユニツトの対応部位において装着
された回路ユニツトとからなることを特徴とする
実用新案登録請求の範囲第1項記載のモザイク表
示盤。 (3) 前記回路ユニツトが前記ベースの他面側よ
り通孔に入り込んでベースに対して係合される係
合爪を有しており、この係合爪は主面側より通孔
に挿入されるデイスプレイユニツトの一部により
弾性変形を防止されてベースに対して固定される
ことを特徴とする実用新案登録請求の範囲第2項
に記載のモザイク表示盤。[Scope of Claim for Utility Model Registration] (1) A panel-shaped base with through holes formed at regular intervals in a matrix over the entire surface;
The mosaic display body is attached to the through hole of the base by a locking means, and the mosaic display body has a rectangular display surface on its main surface, and the display surface is A mosaic display panel characterized in that its vertical and horizontal dimensions are each an integral multiple of the pitch interval of the base. (2) The mosaic display body includes a display unit mounted on the main surface side of the base, and a display unit mounted on the main surface side of the base so as to cover the display unit, and the square main surface on the outer main surface thereof. The mosaic display panel according to claim 1, characterized in that the mosaic display panel comprises a cap having a cap formed thereon, and a circuit unit mounted at a corresponding portion of the display unit on the other side of the base. (3) The circuit unit has an engaging pawl that enters the through hole from the other side of the base and engages with the base, and the engaging pawl is inserted into the through hole from the main surface side. The mosaic display panel according to claim 2, wherein the mosaic display panel is fixed to the base while being prevented from being elastically deformed by a part of the display unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987070336U JPH0416561Y2 (en) | 1987-05-12 | 1987-05-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987070336U JPH0416561Y2 (en) | 1987-05-12 | 1987-05-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63179712U true JPS63179712U (en) | 1988-11-21 |
JPH0416561Y2 JPH0416561Y2 (en) | 1992-04-14 |
Family
ID=30911883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987070336U Expired JPH0416561Y2 (en) | 1987-05-12 | 1987-05-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0416561Y2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5379320U (en) * | 1976-12-03 | 1978-07-01 | ||
JPS55153815U (en) * | 1979-04-23 | 1980-11-06 |
-
1987
- 1987-05-12 JP JP1987070336U patent/JPH0416561Y2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5379320U (en) * | 1976-12-03 | 1978-07-01 | ||
JPS55153815U (en) * | 1979-04-23 | 1980-11-06 |
Also Published As
Publication number | Publication date |
---|---|
JPH0416561Y2 (en) | 1992-04-14 |
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