JPS63178339A - Method for controlling microcomputer - Google Patents

Abstract

PURPOSE:To prevent a microcomputer from an abnormal operation control by comparing a control signal outputted from an arithmetic processing part and obtained before being outputted from an output-only port with a control signal inputted to a monitoring input port, and resetting plural input/out ports when these control signals are different from each other. CONSTITUTION:A control signal obtained before being outputted from the output-only port 11 is compared with a control signal inputted from the output- only port 11 to the monitoring input port by a CPU 6a, and when a difference between these control signals is detected by the CPU 6a, a reset circuit is driven. Since the difference between the control signals is generated at the time of generating abnormality in the output-only port 11 and the reset circuit is driven, an input/out port 6d is reset and the abnormality of the output-only port 11 is self-restored. Consequently, the control of a peripheral equipment can be prevented from the generation of abnormality due to the abnormality of the output-only port 11 and the reliability of microcomputer products can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a microcomputer control method for preventing the microcomputer, which is the core of the control device, from operating abnormally due to electrical noise generated by microcomputer peripheral equipment. It is.

BACKGROUND OF THE INVENTION In recent years, microcomputers have been widely used as the core of control devices, and abnormal operation of the microcomputer will lead to abnormal operation of the control device and the devices controlled by this control device. has become an important issue.

A conventional microcomputer abnormal operation prevention device will be described below with reference to the drawings. FIG. 2 is a block diagram showing the configuration of a conventional microcomputer abnormal operation prevention device.

In FIGS. 3 and 3, reference numeral 1 denotes a microcomputer (hereinafter referred to as microcomputer), which is composed of a CPU, a RAM, a ROM, and a plurality of input/output capacitors 1a. An input circuit 2, an output circuit 3, a watchdog timer 4, and a reset circuit 5 are connected to the input/output ports of the microcomputer 1. The input circuit 2 transmits signals output from a plurality of control switches and the like to the input/output port 11L. The output circuit 3 transmits signals that are processed by the microcomputer 1 and output from the input/output port 1a to a motor, a light emitting element, etc. Further, the watchdog timer 4 is triggered by a clock pulse of the microcomputer 1, and inputs a reset signal from the reset circuit 5 to the microcomputer 1 when this clock pulse is not detected for a predetermined period of time or more.

In the above configuration, when an abnormality occurs in the input/output port 1a, the clock pulse of the microcomputer 1 is not continuously input to the watchdog timer 4, and when this clock pulse is not continuously input for a predetermined period of time or more, the watchdog timer 4 is reset. A reset signal from circuit 6 is transmitted to microcomputer 1 . Then, by this reset signal, the input/output port 1a
Initial processing such as changing the setting of the port as an input-only port or an output-only port is performed.

Problems to be Solved by the Invention However, in the conventional configuration described above, when an abnormality occurs in the microcomputer 1 mainly at the input/output port 1a due to noise from peripheral equipment, the clock pulse from the microcomputer 1 is sent to the watchdog timer 4. Not communicated. However, at this time, when pulse noise from a peripheral device connected to the microcomputer 1 is applied to the input/output port 1&, the watchdog timer 4 determines this pulse noise as a clock pulse from the microcomputer, and as a result, the microcomputer 1 No abnormal operation was detected.

The present invention solves the above-mentioned conventional problems, and aims to provide a method for controlling a microcomputer that prevents abnormal operation of the microcomputer and improves product reliability of the microcomputer.

Means for Solving the Problems In order to achieve the above object, the microcomputer control method of the present invention sets a plurality of input/output ports as either an input-only port, an output-only port, or a monitoring input port, A control signal output from the arithmetic processing unit via the output-only port is input to the monitoring input port, and a control signal output from the arithmetic processing unit and before being output from the output-only port; The control signals input to the monitoring input ports are compared, and when these control signals are different, the settings of the plurality of input/output ports are re-executed.

Effect According to the above configuration, when some abnormality occurs in a port set as an output-only port among the plurality of input/output ports, the control signal output from the arithmetic processing section changes at the output-only port. , is input to the monitoring input port. By comparing and detecting changes in the control signals, the settings of the output-only port, input-only port, and monitoring input port of the input/output port are re-implemented, and the abnormal state of the input/output port is restored.

Embodiment Hereinafter, a microcomputer control method according to an embodiment of the present invention will be explained with reference to FIG.

FIG. 1 is a block diagram of a microcomputer abnormal operation prevention device used in a control method according to an embodiment of the present invention. In FIG. 1, 6 is a microcomputer (hereinafter referred to as microcomputer), and this microcomputer 6 includes an arithmetic processing unit such as cptrea, a storage unit RAM 6b, and a ROM 6.
An input circuit 7, an output circuit 8, and a reset circuit 9 are connected to this input/output capo d. Previous input/output capotro d
has a function as an input port and an output port, and is set as an input port 14 or an output port by a signal from cPUea of the microcomputer 6. The input circuit 7 is an input-only port 1o of the input/output port d.
A plurality of input devices such as switches are connected to the input side. In addition, the output circuit is an output-only port 1 of the input/output capo (AD).
It is connected to the port set as 1, and a motor, a light emitting element, etc. are connected to the output side. :.

In addition, the input/output ports of the plurality of input/output ports 6 (1) having the same number as the output-only ports 11 are set as monitoring input ports 12, and the output-only ports 11 and the monitoring input ports 12 are respectively set as monitoring input ports 12. The control signal for controlling the drive of the motor, etc. output from the CPU 6a is output from the output-only port 11.
is output from and stored in the RAMeb,
Then, it is compared with the control signal input from the output-only port 11 to the monitoring input port 12 at cpvst.

The reset circuit 9 is operated by a user or driven by a drive signal from the CPUea of the microcomputer 6, and applies a reset signal to the microcomputer 6. In response to this reset signal, the CPUea of the microcomputer 6 reconfigures the input-only port 1o, the output-only port 11, and the monitoring input port 12 of the input/output capo (ad).

The operation of the above configuration will be explained below.

A control signal S for controlling a motor, for example, connected to the output circuit 8. is outputted from the CPUea to the output-only port 11, transmitted to the output circuit 8, and also stored in the RAM.
5b, and is also input from the output-only port 11 to the monitoring input port 12.

Here, the control signal transmitted to the output circuit is the control signal s1,
The control signal stored in the RAM 6b will be described below as a control signal S2, and the control signal and control signal S3 input to the monitoring input port 12.

Both the control signal S2 and the control signal S5 are sent to the CPU 61.
input into L and compared. If no abnormality has occurred in the output-only port 11, the control signal S2
and the control signal S5 match, and the motor is controlled by the control signal S1.
The drive is controlled based on

All control signals are the same. Further, when an abnormality occurs in the output-only port 11, the control signal S4. S3 is a control signal S. Based on the reset signal of the reset circuit 9, the CPU 6a drives the reset circuit 9 based on the difference between the control signal S2 and the control signal S3. Ideku capo-1
- Re-implement the ea settings.

After re-implementing this setting, the cpUe2L outputs a control signal again, but if the abnormality in the output-only port 11 is recovered, control by the CPU 61L is continued. Further, if the abnormality is not recovered and the reset signal is repeatedly input to the CPU 6a for a predetermined period of time, the CPU 6a
2L is for stopping the power supply to the microcomputer 6.

According to the above embodiment, the CPU 6a compares the previous control signal outputted from the output-only port 11 and the control signal inputted from the output-only port 11 to the monitoring input port, and the control signal is sent to the CPUe&. Due to the configuration in which the reset circuit is operated when a difference is detected, when an abnormality occurs in the output-only port 11, a difference occurs in the control signal and the reset circuit is driven.
The settings of the input/output capo (AD) are re-executed, and self-recovery of the abnormality of the output-only port 11 is performed. In addition, Kapo-)
If recovery is not performed for a predetermined time by re-implementing the settings 6d, the power supply to the microcomputer 6 is stopped. As a result, abnormalities in peripheral device control due to abnormalities in the output-only port 11 are prevented, and product reliability of the microcomputer is improved.

Effects of the Invention According to the present invention, a previous control signal outputted from the arithmetic processing unit and outputted from the output-only port is compared with a control signal outputted from the output-only port and inputted to the monitoring input port. By using a method that re-executes the settings of input-only ports, output-only ports, and monitoring input ports of multiple input/output ports when these control signals are different, abnormal operation control of the microcomputer due to an abnormality of the output-only ports can be prevented. can be prevented, and as a result,
This increases the reliability of control by a microcomputer.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a microcomputer abnormal operation prevention device according to an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional microcomputer abnormal operation prevention device. 6...Microcomputer, 6a...
・CPU. 6d...Input/output port, 1o...Output-only port, 11...Input-only port, 12.
...Input port for monitoring. Name of agent: Patent attorney Toshio Nakao and 1 other person6-
Microcomputer 6d - Hitodakata port 10 - Single-person power use port 11 - Output only port 12 - Monitoring input port Fig. 1

Claims (1)

[Claims] A plurality of input/output ports are set as either an input-only port, an output-only port, or a monitoring input port, and a control signal output from the arithmetic processing unit via the output-only port is input to the monitoring input port. , and compares the previous control signal outputted from the arithmetic processing unit and outputted from the output-only port with the control signal inputted to the monitoring input port, and when these control signals are different, the plurality of A microcomputer control method for resetting input/output ports.