JPS63174456U - - Google Patents
Info
- Publication number
- JPS63174456U JPS63174456U JP1986196178U JP19617886U JPS63174456U JP S63174456 U JPS63174456 U JP S63174456U JP 1986196178 U JP1986196178 U JP 1986196178U JP 19617886 U JP19617886 U JP 19617886U JP S63174456 U JPS63174456 U JP S63174456U
- Authority
- JP
- Japan
- Prior art keywords
- lead terminal
- insulating substrate
- circuit element
- hybrid integrated
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 3
- 230000017525 heat dissipation Effects 0.000 claims 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986196178U JPS63174456U (US20030220297A1-20031127-C00033.png) | 1986-12-19 | 1986-12-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986196178U JPS63174456U (US20030220297A1-20031127-C00033.png) | 1986-12-19 | 1986-12-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63174456U true JPS63174456U (US20030220297A1-20031127-C00033.png) | 1988-11-11 |
Family
ID=31154759
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986196178U Pending JPS63174456U (US20030220297A1-20031127-C00033.png) | 1986-12-19 | 1986-12-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63174456U (US20030220297A1-20031127-C00033.png) |
-
1986
- 1986-12-19 JP JP1986196178U patent/JPS63174456U/ja active Pending