JPS63173979U - - Google Patents
Info
- Publication number
- JPS63173979U JPS63173979U JP6490787U JP6490787U JPS63173979U JP S63173979 U JPS63173979 U JP S63173979U JP 6490787 U JP6490787 U JP 6490787U JP 6490787 U JP6490787 U JP 6490787U JP S63173979 U JPS63173979 U JP S63173979U
- Authority
- JP
- Japan
- Prior art keywords
- switch
- request
- recontrol
- switching device
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Studio Circuits (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例の回路構成図、第２
図は第１図に示す一実施例の制御におけるタイミ
ングチヤート、第３図は従来の切替装置の回路構
成図、第４図は第３図に示す切替装置の制御にお
けるタイミングチヤートである。
Ａ：第１の切替装置、Ｂ：第２の切替装置、１
ａ，１ｂ：第１の切替器、２ａ，２ｂ：第２の切
替器、３ａ，３ｂ：制御回路、４ａ，４ｂ：再制
御要求回路、５ａ，５ｂ：再制御ゲート信号の入
力端子、６ａ，６ｂ：再制御要求信号の出力端子
、７ａ，７ｂ：スイツチ。
Figure 1 is a circuit configuration diagram of an embodiment of the present invention;
The figures are a timing chart for controlling the embodiment shown in FIG. 1, FIG. 3 is a circuit configuration diagram of a conventional switching device, and FIG. 4 is a timing chart for controlling the switching device shown in FIG. 3. A: first switching device, B: second switching device, 1
a, 1b: first switch, 2a, 2b: second switch, 3a, 3b: control circuit, 4a, 4b: recontrol request circuit, 5a, 5b: input terminal for recontrol gate signal, 6a, 6b: Output terminal for recontrol request signal; 7a, 7b: switch.
Claims (1)
と、前記第１の切替器の出力を入力端子にうける
第２の切替器と、前記第１の切替器及び第２の切
替器のクロスポイントを切替える制御回路を備え
る切替装置において、前記制御回路に対し再制御
を行う場合に、外部ゲート信号により再制御要求
を禁止可能な再制御要求回路を有することを特徴
とする切替装置。 A first switch consisting of a plurality of cross points, a second switch whose input terminal receives the output of the first switch, and a cross point between the first switch and the second switch. A switching device including a control circuit for switching, characterized in that the switching device includes a recontrol request circuit that can prohibit a recontrol request by an external gate signal when recontrolling the control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6490787U JPH057820Y2 (en) | 1987-04-28 | 1987-04-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6490787U JPH057820Y2 (en) | 1987-04-28 | 1987-04-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63173979U true JPS63173979U (en) | 1988-11-11 |
| JPH057820Y2 JPH057820Y2 (en) | 1993-02-26 |
Family
ID=30901495
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6490787U Expired - Lifetime JPH057820Y2 (en) | 1987-04-28 | 1987-04-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH057820Y2 (en) |
-
1987
- 1987-04-28 JP JP6490787U patent/JPH057820Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH057820Y2 (en) | 1993-02-26 |