JPS63173945U - - Google Patents

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Publication number
JPS63173945U
JPS63173945U JP1987064282U JP6428287U JPS63173945U JP S63173945 U JPS63173945 U JP S63173945U JP 1987064282 U JP1987064282 U JP 1987064282U JP 6428287 U JP6428287 U JP 6428287U JP S63173945 U JPS63173945 U JP S63173945U
Authority
JP
Japan
Prior art keywords
circuit
low
output
signal
multipath
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987064282U
Other languages
Japanese (ja)
Other versions
JPH0422586Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987064282U priority Critical patent/JPH0422586Y2/ja
Publication of JPS63173945U publication Critical patent/JPS63173945U/ja
Application granted granted Critical
Publication of JPH0422586Y2 publication Critical patent/JPH0422586Y2/ja
Expired legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示すブロツク図、第
2図はマルチパス検出回路5の一例を示す回路図
、第3図は第2図の各部の波形図、第4図はマル
チパス検出回路5の変形例を示す回路図、第5図
は第4図の各部の波形図、第6図は信号処理回路
6の一例を示す回路図である。 図において、1はアンテナ、2はフロントエン
ド部、3は中間周波増幅及び検波部、4は左右分
離回路、5はマルチパス検出回路、6は信号処理
回路、7,8はローパスフイルタ、9,10は切
換回路、11,12,13,14はスピーカであ
る。
Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing an example of a multipath detection circuit 5, Fig. 3 is a waveform diagram of each part of Fig. 2, and Fig. 4 is a multipath detection circuit. FIG. 5 is a circuit diagram showing a modification of the circuit 5, FIG. 5 is a waveform diagram of each part of FIG. 4, and FIG. 6 is a circuit diagram showing an example of the signal processing circuit 6. In the figure, 1 is an antenna, 2 is a front end section, 3 is an intermediate frequency amplification and detection section, 4 is a left/right separation circuit, 5 is a multipath detection circuit, 6 is a signal processing circuit, 7 and 8 are low pass filters, 9, 10 is a switching circuit, and 11, 12, 13, and 14 are speakers.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] FM電波のマルチパスの有無を検出するマルチ
パス検出回路と、左右チヤンネル信号を入力して
左右チヤンネル信号の差信号を出力する信号処理
回路と、前記信号処理回路の出力信号のうち低域
成分を通過させるローパスフイルタと、前記マル
チパス検出回路の出力状態により前記差信号と前
記ローパスフイルタの出力とを選択的に切換えて
出力する切換回路とを備えたことを特徴とするF
Mステレオ受信機。
a multipath detection circuit that detects the presence or absence of multipath of FM radio waves; a signal processing circuit that inputs left and right channel signals and outputs a difference signal between the left and right channel signals; and a low frequency component of the output signal of the signal processing circuit. F characterized by comprising: a low-pass filter for passing through; and a switching circuit for selectively switching and outputting the difference signal and the output of the low-pass filter depending on the output state of the multi-pass detection circuit.
M stereo receiver.
JP1987064282U 1987-04-29 1987-04-29 Expired JPH0422586Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987064282U JPH0422586Y2 (en) 1987-04-29 1987-04-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987064282U JPH0422586Y2 (en) 1987-04-29 1987-04-29

Publications (2)

Publication Number Publication Date
JPS63173945U true JPS63173945U (en) 1988-11-11
JPH0422586Y2 JPH0422586Y2 (en) 1992-05-25

Family

ID=30900301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987064282U Expired JPH0422586Y2 (en) 1987-04-29 1987-04-29

Country Status (1)

Country Link
JP (1) JPH0422586Y2 (en)

Also Published As

Publication number Publication date
JPH0422586Y2 (en) 1992-05-25

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