JPS62173843U - - Google Patents

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Publication number
JPS62173843U
JPS62173843U JP1986061347U JP6134786U JPS62173843U JP S62173843 U JPS62173843 U JP S62173843U JP 1986061347 U JP1986061347 U JP 1986061347U JP 6134786 U JP6134786 U JP 6134786U JP S62173843 U JPS62173843 U JP S62173843U
Authority
JP
Japan
Prior art keywords
circuit
detection
separation
channel signal
detection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1986061347U
Other languages
Japanese (ja)
Other versions
JPH0418263Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986061347U priority Critical patent/JPH0418263Y2/ja
Priority to US07/008,622 priority patent/US4727580A/en
Publication of JPS62173843U publication Critical patent/JPS62173843U/ja
Application granted granted Critical
Publication of JPH0418263Y2 publication Critical patent/JPH0418263Y2/ja
Expired legal-status Critical Current

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  • Stereo-Broadcasting Methods (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例であるラジオ受信機の
ブロツク図、第2図は第1図における切替回路及
び切替レベル制御回路の回路図、第3図は切替レ
ベル説明図、第4図はステレオ復調回路とセパレ
ーシヨン/ハイカツト制御部のブロツク図、第5
図はアンテナ入力とS/N比の特性図、第6図は
アンテナ入力と歪率の特性図である。 3……中間周波増幅器、15……切替回路、1
6……切替レベル制御回路、18……ステレオ復
調回路、20……セパレーシヨン/ハイカツト制
御部、25……受信電界強度を検出する検出回路
、26……パルスカウント検波回路、27……レ
シオ検波回路。
Fig. 1 is a block diagram of a radio receiver that is an embodiment of the present invention, Fig. 2 is a circuit diagram of the switching circuit and switching level control circuit in Fig. 1, Fig. 3 is a switching level explanatory diagram, and Fig. 4 is Block diagram of stereo demodulation circuit and separation/high cut control section, No. 5
The figure is a characteristic diagram of antenna input and S/N ratio, and FIG. 6 is a characteristic diagram of antenna input and distortion factor. 3...Intermediate frequency amplifier, 15...Switching circuit, 1
6...Switching level control circuit, 18...Stereo demodulation circuit, 20...Separation/high cut control section, 25...Detection circuit for detecting received electric field strength, 26...Pulse count detection circuit, 27...Ratio detection circuit.

Claims (1)

【実用新案登録請求の範囲】 中間周波増幅器の後段にそれぞれ設けられたパ
ルスカウント検波回路である第1の検波回路及び
パルスカウント検波回路以外の第2の検波回路と
、 受信電界強度を検出する検出回路と、 第1の検波回路からの検波信号と第2の検波回
路からの検波信号を受信電界強度に基づいて選択
的に出力する切替回路と、 切替回路から出力される検波信号であるステレ
オ複合信号からL―チヤンネル信号及びR―チヤ
ンネル信号を再生するステレオ回路と、 受信電界強度に基づいてステレオ復調回路にお
けるチヤンネルセパレーシヨンの度合を制御する
セパレーシヨン回路と、 受信電界強度に応じてステレオ復調回路から出
力されるL―チヤンネル信号及びR―チヤンネル
信号の高域成分を減衰させるハイカツト回路と、 パルスカウント検波信号が切替回路からステレ
オ復調信号として選択出力されている場合にハイ
カツト回路とセパレーシヨン回路の動作を停止あ
るいは最小限にするセパレーシヨン/ハイカツト
制御部とを有することを特徴とするラジオ受信機
[Scope of Claim for Utility Model Registration] A first detection circuit which is a pulse count detection circuit provided after the intermediate frequency amplifier, a second detection circuit other than the pulse count detection circuit, and a detection circuit which detects received electric field strength. a switching circuit that selectively outputs the detection signal from the first detection circuit and the detection signal from the second detection circuit based on the received electric field strength; and a stereo composite that is the detection signal output from the switching circuit. A stereo circuit that reproduces an L-channel signal and an R-channel signal from a signal, a separation circuit that controls the degree of channel separation in the stereo demodulation circuit based on the received electric field strength, and a stereo demodulation circuit that reproduces the channel separation according to the received electric field strength. A high-cut circuit that attenuates the high-frequency components of the L-channel signal and R-channel signal output from the switching circuit, and a high-cut circuit and a separation circuit that attenuate the high frequency components of the L-channel signal and R-channel signal output from the switching circuit. 1. A radio receiver comprising a separation/high-cut control section that stops or minimizes operation.
JP1986061347U 1986-04-23 1986-04-23 Expired JPH0418263Y2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1986061347U JPH0418263Y2 (en) 1986-04-23 1986-04-23
US07/008,622 US4727580A (en) 1986-04-23 1987-01-29 Radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986061347U JPH0418263Y2 (en) 1986-04-23 1986-04-23

Publications (2)

Publication Number Publication Date
JPS62173843U true JPS62173843U (en) 1987-11-05
JPH0418263Y2 JPH0418263Y2 (en) 1992-04-23

Family

ID=30894600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986061347U Expired JPH0418263Y2 (en) 1986-04-23 1986-04-23

Country Status (1)

Country Link
JP (1) JPH0418263Y2 (en)

Also Published As

Publication number Publication date
JPH0418263Y2 (en) 1992-04-23

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