JPS63170917A - Formation of fine pattern - Google Patents
Formation of fine patternInfo
- Publication number
- JPS63170917A JPS63170917A JP62002776A JP277687A JPS63170917A JP S63170917 A JPS63170917 A JP S63170917A JP 62002776 A JP62002776 A JP 62002776A JP 277687 A JP277687 A JP 277687A JP S63170917 A JPS63170917 A JP S63170917A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- period
- layer
- mask
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 24
- 239000011347 resin Substances 0.000 claims description 12
- 229920005989 resin Polymers 0.000 claims description 12
- 238000001020 plasma etching Methods 0.000 abstract description 5
- 238000001259 photo etching Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 description 5
- 239000000758 substrate Substances 0.000 description 4
- 230000000737 periodic effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特に写真蝕刻工
程での路光方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a light path method in a photolithography process.
従来性なわれている写真蝕刻工程における露光方法は例
えば刊行物ジャーナル・オプ・バキューム・サイエンス
・アンド・テクノロジー(J、Vac。Conventional exposure methods in photolithographic processes are described, for example, in the publication Journal of Vacuum Science and Technology (J, Vac.
Sci、Technol、)第17巻第5号1147頁
〜(1980)に示されているよりな縮小投影露光法に
よシ、1つのパターンを感光性樹脂に転写する際には、
光源から出射した光をレンズで集束し、1枚のマスクに
照射し、このマスクを選択的に透過した光をレンズで集
光してウェハ上に結像する。この際、ウェハにあらかじ
め塗布してあった感光性樹脂が露光され、その後の現像
処理によってパターンがこの感光性樹脂に転写されるも
のである。When a single pattern is transferred to a photosensitive resin using the reduction projection exposure method shown in Sci. Technol, Vol. 17, No. 5, p.
The light emitted from the light source is focused by a lens and irradiated onto a single mask, and the light that selectively passes through this mask is focused by the lens and imaged onto the wafer. At this time, a photosensitive resin that has been applied on the wafer in advance is exposed to light, and a pattern is transferred to this photosensitive resin through a subsequent development process.
上述した従来の写真蝕刻工程における露光方法は、微細
なパターン転写を行なう際には様々な問題点をかかえて
いる。その一つは露光光学系の解像限界である。一般に
縮小投影露光系の解像限界は凡=1((λ/NA )で
表わされる。ここでλは露光波長、NAはレンズの開口
数で、またkはプロセスによって決まる比例定数で0.
6程度が限界とされている。The exposure method in the conventional photolithography process described above has various problems when transferring fine patterns. One of them is the resolution limit of the exposure optical system. In general, the resolution limit of a reduction projection exposure system is expressed as approximately = 1 ((λ/NA). Here, λ is the exposure wavelength, NA is the numerical aperture of the lens, and k is a proportionality constant determined by the process and is 0.
The limit is said to be around 6.
例えばNA=α35のレンズを使用し、λ=0.435
8μmの元によりm光する場合、解像限界凡は0.8μ
mという値となる。この解像限界Rは、レンズの高開口
数化、露光波長の短波長化によって年々、除徐には向上
しているものの急速な向上はレンズの製造技術上困難で
あシ、したがって0.8μm以下のパターンを得ること
は極めて困難であるという欠点があった。For example, using a lens with NA=α35, λ=0.435
If m light is emitted from a source of 8 μm, the resolution limit is approximately 0.8 μm.
The value is m. This resolution limit R has gradually improved year by year due to higher numerical apertures of lenses and shorter exposure wavelengths, but rapid improvement is difficult due to lens manufacturing technology, so it is 0.8 μm. There was a drawback that it was extremely difficult to obtain the following pattern.
本発明の微細パターン形成方法は、被エツチング物上に
塗布された感光性樹脂層にマスクのパターンを露光・現
像処理によって転写する微細パターンの形成方法におい
て、所定のパターンの周期の2倍の周期パターンを有す
る第1のマスクを用いて、感光性樹脂層にこの2倍の周
期を有する第1のパターンを形成する工程と、2倍の周
期パターンを有する第2のマスクを用いて、感光性樹脂
層に、第1のパターンとは、所定の周期分平行移動した
状態に、2倍の周期を有する第2のパターンを形成する
工程とを有している。The fine pattern forming method of the present invention is a fine pattern forming method in which a mask pattern is transferred to a photosensitive resin layer coated on an object to be etched by exposure and development processing, and the fine pattern forming method is a method of forming a fine pattern with a period twice the period of a predetermined pattern. A step of forming a first pattern having twice the period on the photosensitive resin layer using a first mask having a pattern, and a step of forming a photosensitive resin layer using a second mask having twice the period. The first pattern includes a step of forming a second pattern having twice the period in a state parallel to the first pattern by a predetermined period.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第3図は本発明の原理を示すものである。第3図(aJ
に示す周期りなるライン・アンド・スペースパターン2
1を形成する場合、まず第3図(b)に示すように周期
2Lのパターン22を有するマスクを用いて露光・現像
を行ないパターン22を形成する。ここで、細いライン
パターンは容易に形成される。何故なら、一般にポジ型
フォトレジストを使用してパターンを形成する場合、解
像限界はスペース寸法によって決まシ、スペース幅を大
きくライン幅を小さく形成することは容易であるからで
ある。FIG. 3 illustrates the principle of the invention. Figure 3 (aJ
Periodic line and space pattern 2 shown in
1, first, as shown in FIG. 3(b), exposure and development are performed using a mask having a pattern 22 with a period of 2L to form a pattern 22. Here, thin line patterns are easily formed. This is because, in general, when forming a pattern using a positive photoresist, the resolution limit is determined by the space dimension, and it is easy to form the space width to be large and the line width to be small.
次に第3図(C)に示すようにパターン23を有するマ
スクを用いて露光・現像処理を行ない、パターン22の
間にパターン23を形成することによって、周期りのパ
ターン12を形成することが可能となる。Next, as shown in FIG. 3(C), exposure and development are performed using a mask having patterns 23 to form patterns 23 between patterns 22, thereby forming patterns 12 at regular intervals. It becomes possible.
第1図は本発明の第1の実施例の主たる工程を示す断面
図である。第1図(a)に示すように、半導体基板15
上の被エツチング物14に三層レジスト16を塗布する
。三層レジスト16は下層レジスト13.中間層12.
上層レジスト11から成る。この中間層12はスピン−
オンーグラス吟により形成される。次に第1図(blに
示すように希望するパターンの周期りの2倍の周期2L
のパターンを有する第1のマスクを用いて、上層レジス
トにパターンを形成した後、中間層12にリアクティブ
・イオン・エツチング法(以下、R,IEという)を用
いて転写する。この後、第1図(C)に示すように、再
び中間層18および上層レジスト17を塗布し、次に第
1図(d)に示すように周期2Lのパターンを有する第
2のマスクを用いて露光・現像処理を行ない、上層レジ
スト17をパターニングした後、中間層18にHIEを
用いて転写する。FIG. 1 is a sectional view showing the main steps of the first embodiment of the present invention. As shown in FIG. 1(a), a semiconductor substrate 15
A three-layer resist 16 is applied to the upper object 14 to be etched. The three-layer resist 16 is the lower resist 13. Middle layer 12.
It consists of an upper layer resist 11. This intermediate layer 12 is made of spin-
Formed by On-Glass Gin. Next, as shown in Figure 1 (bl), the period 2L is twice the period of the desired pattern.
A pattern is formed on the upper layer resist using a first mask having a pattern, and then transferred to the intermediate layer 12 using a reactive ion etching method (hereinafter referred to as R and IE). After this, as shown in FIG. 1(C), the intermediate layer 18 and the upper resist layer 17 are applied again, and then, as shown in FIG. 1(d), a second mask having a pattern with a period of 2L is used. After performing exposure and development processing to pattern the upper resist layer 17, it is transferred to the intermediate layer 18 using HIE.
この後、第1図telに示すように、中間層12.中間
層18をマスクとして下層レジストエ3を几IEでエツ
チングし、下層レジスト13に周期りのパターンを得る
。このようにして、半導体基板15上の被エツチング物
14の上に周期りの微細パターンを得ることが可能とな
る。After this, as shown in FIG. 1, the intermediate layer 12. Using the intermediate layer 18 as a mask, the lower resist layer 3 is etched by IE to obtain a periodic pattern on the lower resist layer 13. In this way, it is possible to obtain a periodic fine pattern on the object to be etched 14 on the semiconductor substrate 15.
第2図は本発明の第2の実施例の主たる工程を示す断面
図である。中間層18及び上層レジスト17を塗布する
までの工程は、第1の実施例の第1図(C)に示した工
程と同様である。次に第2図(alに示すように半導体
基板全面に遠紫外光等を照射し、第2図(blに示すよ
うに現像処理によって下層レジスト13をバターニング
することによって、周期りからなる微細パターンを下層
レジスト13に形成することができる。FIG. 2 is a sectional view showing the main steps of a second embodiment of the present invention. The steps up to coating the intermediate layer 18 and the upper resist layer 17 are similar to the steps shown in FIG. 1(C) of the first embodiment. Next, as shown in FIG. 2 (al), the entire surface of the semiconductor substrate is irradiated with deep ultraviolet light, etc., and as shown in FIG. A pattern can be formed in the underlying resist 13.
以上、本発明の実施例を最も単純なライン・アンド・ス
ペースパターンについて説明してきたが、もちろんライ
ン・アンド・スペースパターン以外に、L字型あるいは
コの字型パターン等はとんどあらゆるパターン形状に本
発明は適用できる。また光露光について説明してきたが
、それ以外に電子ビーム露光、X線露光に対しても有効
であることは明らかである。Above, the embodiments of the present invention have been explained with respect to the simplest line and space pattern, but of course, in addition to the line and space pattern, almost any pattern shape such as an L-shape or a U-shape pattern can be used. The present invention is applicable to Further, although the explanation has been made regarding optical exposure, it is clear that the present invention is also effective for electron beam exposure and X-ray exposure.
以上説明したように本発明は、写真蝕刻工程を2つの工
程に分け、パターンを一つおきに分けて露光することに
よって従来の露光方法が有する解像限界の1/2倍の微
細パターンが形成できる効果がある。As explained above, the present invention divides the photoetching process into two steps and exposes every other pattern separately, thereby forming a fine pattern that is 1/2 times the resolution limit of the conventional exposure method. There is an effect that can be done.
第1図は本発明の第1の実施例の主たる工程を示す断面
図、第2図は本発明の第2の実施例の主たる工程を示す
断面図、第3図は本発明の詳細な説明する平面図である
。
11・・・・・・上層レジスト、12・・川・中間層、
13・・・・・・下層レジスト、14・・団・被エツチ
ング物、15・・・・・・半導体基板、16・・・・・
・三層レジスト、17・・・・・・上層レジスト、18
・・・・・・中間層、19・旧・・遠紫外光、21・・
・・・・希望のパターン、22・・・・・・第1の露光
で形成するパターン、23・・面第2の露光で形成する
パターン。
・・・−\
代理人 弁理士 内 原 晋′・・、、1人、\
1〒
条3図FIG. 1 is a sectional view showing the main steps of the first embodiment of the invention, FIG. 2 is a sectional view showing the main steps of the second embodiment of the invention, and FIG. 3 is a detailed explanation of the invention. FIG. 11...Upper layer resist, 12...River/middle layer,
13... Lower layer resist, 14... Group/object to be etched, 15... Semiconductor substrate, 16...
・Three layer resist, 17... Upper layer resist, 18
・・・・・・Middle layer, 19・old・・far ultraviolet light, 21・・
. . . desired pattern, 22 . . . pattern formed by first exposure, 23 . . . pattern formed by surface second exposure.・・・-\ Agent Patent Attorney Susumu Uchihara'..., 1 person, \
1〒 Article 3 Figure
Claims (2)
スクのパターンを露光・現像処理によって転写する微細
パターンの形成方法において、所定のパターンの周期の
2倍の周期パターンを有する第1のマスクを用いて、前
記感光性樹脂層に前記2倍の周期を有する第1のパター
ンを形成する工程と、前記2倍の周期パターンを有する
第2のマスクを用いて前記感光性樹脂層に、前記第1の
パターンとは前記周期分平行移動した状態に、前記2倍
の周期を有する第2のパターンを形成する工程とを含む
ことを特徴とする微細パターンの形成方法。(1) In a method for forming a fine pattern in which a mask pattern is transferred to a photosensitive resin layer coated on an object to be etched by exposure and development, a first pattern having a periodicity twice the period of a predetermined pattern is used. forming a first pattern having twice the period on the photosensitive resin layer using a mask; forming a first pattern on the photosensitive resin layer using a second mask having twice the period; A method for forming a fine pattern, comprising the step of forming a second pattern having a period twice as large as the period in which the first pattern is translated in parallel by the period.
下層感光性樹脂から成る3層レジストであり、前記第1
及び第2のパターンは前記中間層に形成されるパターン
であることを特徴とする特許請求の範囲第1項記載の微
細パターンの形成方法。(2) The photosensitive resin layer includes an upper layer photosensitive resin, an intermediate layer,
It is a three-layer resist consisting of a lower layer photosensitive resin, and the first
2. The method for forming a fine pattern according to claim 1, wherein the second pattern is a pattern formed on the intermediate layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62002776A JPS63170917A (en) | 1987-01-09 | 1987-01-09 | Formation of fine pattern |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62002776A JPS63170917A (en) | 1987-01-09 | 1987-01-09 | Formation of fine pattern |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63170917A true JPS63170917A (en) | 1988-07-14 |
JPH0567049B2 JPH0567049B2 (en) | 1993-09-24 |
Family
ID=11538742
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62002776A Granted JPS63170917A (en) | 1987-01-09 | 1987-01-09 | Formation of fine pattern |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63170917A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08190203A (en) * | 1994-07-14 | 1996-07-23 | Hyundai Electron Ind Co Ltd | Formation of resist pattern |
JP2002075857A (en) * | 2000-06-14 | 2002-03-15 | Tokyo Denki Univ | Resist pattern forming method |
JP2002134394A (en) * | 2000-10-25 | 2002-05-10 | Mitsubishi Materials Corp | Method and apparatus for multiple exposures |
WO2008038602A1 (en) * | 2006-09-29 | 2008-04-03 | Tokyo Ohka Kogyo Co., Ltd. | Method of forming pattern |
WO2008041468A1 (en) * | 2006-09-29 | 2008-04-10 | Tokyo Ohka Kogyo Co., Ltd. | Method of forming pattern |
JP2008257170A (en) * | 2007-03-13 | 2008-10-23 | Matsushita Electric Ind Co Ltd | Pattern formation method |
JP2009110986A (en) * | 2007-10-26 | 2009-05-21 | Tokyo Electron Ltd | Forming method of etching mask, control program, and program storage medium |
JP2009265505A (en) * | 2008-04-28 | 2009-11-12 | Jsr Corp | Pattern formation method and resin composition for fine pattern formation |
JP2010509783A (en) * | 2006-11-14 | 2010-03-25 | エヌエックスピー ビー ヴィ | Double patterning method for lithography to increase feature space integration |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55138839A (en) * | 1979-04-17 | 1980-10-30 | Nec Kyushu Ltd | Method of fabricating semiconductor device |
-
1987
- 1987-01-09 JP JP62002776A patent/JPS63170917A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55138839A (en) * | 1979-04-17 | 1980-10-30 | Nec Kyushu Ltd | Method of fabricating semiconductor device |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5989788A (en) * | 1994-07-14 | 1999-11-23 | Hyundai Electronics Industries Co., Ltd. | Method for forming resist patterns having two photoresist layers and an intermediate layer |
JPH08190203A (en) * | 1994-07-14 | 1996-07-23 | Hyundai Electron Ind Co Ltd | Formation of resist pattern |
JP4613364B2 (en) * | 2000-06-14 | 2011-01-19 | 学校法人東京電機大学 | Resist pattern formation method |
JP2002075857A (en) * | 2000-06-14 | 2002-03-15 | Tokyo Denki Univ | Resist pattern forming method |
JP2002134394A (en) * | 2000-10-25 | 2002-05-10 | Mitsubishi Materials Corp | Method and apparatus for multiple exposures |
WO2008038602A1 (en) * | 2006-09-29 | 2008-04-03 | Tokyo Ohka Kogyo Co., Ltd. | Method of forming pattern |
JP2008089711A (en) * | 2006-09-29 | 2008-04-17 | Tokyo Ohka Kogyo Co Ltd | Method of forming pattern |
JP2008089710A (en) * | 2006-09-29 | 2008-04-17 | Tokyo Ohka Kogyo Co Ltd | Method of forming pattern |
WO2008041468A1 (en) * | 2006-09-29 | 2008-04-10 | Tokyo Ohka Kogyo Co., Ltd. | Method of forming pattern |
US8178284B2 (en) | 2006-09-29 | 2012-05-15 | Tokyo Ohka Kogyo Co., Ltd. | Method of forming pattern |
JP2010509783A (en) * | 2006-11-14 | 2010-03-25 | エヌエックスピー ビー ヴィ | Double patterning method for lithography to increase feature space integration |
US8148052B2 (en) | 2006-11-14 | 2012-04-03 | Nxp B.V. | Double patterning for lithography to increase feature spatial density |
JP2008257170A (en) * | 2007-03-13 | 2008-10-23 | Matsushita Electric Ind Co Ltd | Pattern formation method |
JP2009110986A (en) * | 2007-10-26 | 2009-05-21 | Tokyo Electron Ltd | Forming method of etching mask, control program, and program storage medium |
US8198183B2 (en) | 2007-10-26 | 2012-06-12 | Tokyo Electron Limited | Forming method of etching mask, control program and program storage medium |
JP2009265505A (en) * | 2008-04-28 | 2009-11-12 | Jsr Corp | Pattern formation method and resin composition for fine pattern formation |
Also Published As
Publication number | Publication date |
---|---|
JPH0567049B2 (en) | 1993-09-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4018938A (en) | Fabrication of high aspect ratio masks | |
JP2007053403A (en) | Lithography method | |
US5902493A (en) | Method for forming micro patterns of semiconductor devices | |
US5262257A (en) | Mask for lithography | |
JPH03228053A (en) | Optical exposing reticule | |
JPS63170917A (en) | Formation of fine pattern | |
KR20010004612A (en) | Photo mask and method for forming fine pattern of semiconductor device using the same | |
JPH06163365A (en) | Manufacture of semiconductor device | |
JPS63216052A (en) | Exposing method | |
US6015640A (en) | Mask fabrication process | |
JP3475309B2 (en) | Method for manufacturing phase shift photomask | |
JPH0787174B2 (en) | Pattern formation method | |
US6548384B2 (en) | Method for performing lithographic process to a multi-layered photoresist layer | |
JPH02238457A (en) | Formation of thick-film resist pattern | |
JPH0817703A (en) | Pattern formation method | |
JP2783582B2 (en) | Photo mask | |
KR100209370B1 (en) | Mask used measuring overlap and manufacturing method of overlap mark | |
JPH0451151A (en) | Production of phase shift reticle | |
JPH09213609A (en) | Method for manufacturing semiconductor device | |
JPS62183449A (en) | Formation of pattern | |
JPS63275116A (en) | Manufacture of semiconductor device | |
JPS60217628A (en) | Formation of pattern | |
JPS6354722A (en) | Manufacture of working mask for photolithography | |
JPS646448B2 (en) | ||
JPH0659432A (en) | Mask for exposing and exposing method using the mask |