JPS63167303U - - Google Patents
Info
- Publication number
- JPS63167303U JPS63167303U JP5843787U JP5843787U JPS63167303U JP S63167303 U JPS63167303 U JP S63167303U JP 5843787 U JP5843787 U JP 5843787U JP 5843787 U JP5843787 U JP 5843787U JP S63167303 U JPS63167303 U JP S63167303U
- Authority
- JP
- Japan
- Prior art keywords
- generator
- retarder
- battery
- electric load
- field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005611 electricity Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Description
第1図は本考案の一実施例に係るリターダを構
成する発電機の回路図、第2図は同リターダの外
観斜視図、第3図は同要部拡大展開正面図、第4
図はこのリターダを備えるエンジンの正面図、第
5図は従来のリターダを構成する発電機の回路図
である。
なお図面に用いた符号において、7…誘導子磁
極、11…電機子コイル、12…界磁コイル、1
4…バツテリ、16…トランジスタ、24…全波
整流器、26…電気負荷である。
Fig. 1 is a circuit diagram of a generator constituting a retarder according to an embodiment of the present invention, Fig. 2 is an external perspective view of the retarder, Fig. 3 is an enlarged front view of the main parts, and Fig. 4
The figure is a front view of an engine equipped with this retarder, and FIG. 5 is a circuit diagram of a generator that constitutes a conventional retarder. In addition, in the symbols used in the drawings, 7...inductor magnetic pole, 11...armature coil, 12...field coil, 1
4...Battery, 16...Transistor, 24...Full-wave rectifier, 26...Electric load.
Claims (1)
電を行なう際に吸収する仕事によつて制動力を得
るとともに、前記発電機の出力によつてバツテリ
の充電と電気負荷の駆動とを行なうようにした装
置において、互いに並列に接続された複数の界磁
回路を設けるとともに、それぞれの界磁回路を別
々の制御素子によつて制御するようにしたことを
特徴とする車両用制動装置。 The retarder is constituted by a generator, and the braking force is obtained by the work absorbed by the generator when generating electricity, and the output of the generator is used to charge the battery and drive the electric load. 1. A braking device for a vehicle, characterized in that a plurality of field circuits connected in parallel are provided, and each field circuit is controlled by a separate control element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5843787U JPH0545041Y2 (en) | 1987-04-17 | 1987-04-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5843787U JPH0545041Y2 (en) | 1987-04-17 | 1987-04-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63167303U true JPS63167303U (en) | 1988-10-31 |
JPH0545041Y2 JPH0545041Y2 (en) | 1993-11-17 |
Family
ID=30889009
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5843787U Expired - Lifetime JPH0545041Y2 (en) | 1987-04-17 | 1987-04-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0545041Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5997707B2 (en) * | 2013-11-14 | 2016-09-28 | 株式会社Tbk | Electromagnetic retarder |
-
1987
- 1987-04-17 JP JP5843787U patent/JPH0545041Y2/ja not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5997707B2 (en) * | 2013-11-14 | 2016-09-28 | 株式会社Tbk | Electromagnetic retarder |
Also Published As
Publication number | Publication date |
---|---|
JPH0545041Y2 (en) | 1993-11-17 |
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