JPS63165855U - - Google Patents

Info

Publication number
JPS63165855U
JPS63165855U JP1987059805U JP5980587U JPS63165855U JP S63165855 U JPS63165855 U JP S63165855U JP 1987059805 U JP1987059805 U JP 1987059805U JP 5980587 U JP5980587 U JP 5980587U JP S63165855 U JPS63165855 U JP S63165855U
Authority
JP
Japan
Prior art keywords
flip chip
wiring board
conductor
bumps
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987059805U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0543485Y2 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987059805U priority Critical patent/JPH0543485Y2/ja
Publication of JPS63165855U publication Critical patent/JPS63165855U/ja
Application granted granted Critical
Publication of JPH0543485Y2 publication Critical patent/JPH0543485Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/247—Dispositions of multiple bumps
    • H10W72/248—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/701—Tape-automated bond [TAB] connectors

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1987059805U 1987-04-20 1987-04-20 Expired - Lifetime JPH0543485Y2 (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987059805U JPH0543485Y2 (https=) 1987-04-20 1987-04-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987059805U JPH0543485Y2 (https=) 1987-04-20 1987-04-20

Publications (2)

Publication Number Publication Date
JPS63165855U true JPS63165855U (https=) 1988-10-28
JPH0543485Y2 JPH0543485Y2 (https=) 1993-11-02

Family

ID=30891644

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987059805U Expired - Lifetime JPH0543485Y2 (https=) 1987-04-20 1987-04-20

Country Status (1)

Country Link
JP (1) JPH0543485Y2 (https=)

Also Published As

Publication number Publication date
JPH0543485Y2 (https=) 1993-11-02

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