JPS63164427A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a shallow impurity introduced region of a high impurity concentration by changing the impurity concentration of an impurity-containing layer provided on the semiconductor substrate so as to control the amount of the impurity penetrating into the semiconductor substrate, thereby preventing the damage of the semiconductor substrate surface. CONSTITUTION:On a semiconductor substrate 1, an impurity containing layer 2 is provided which contains impurity atoms acting as the acceptor or the donor, and by applying a plasma to the containing layer 2, the impurity of the containing layer 2 is caused to penetrate into the substrate 1, thereby forming an impurity introduced region 10 in the substrate 1 surface. At this time, by changing the impurity concentration of the containing layer 2 provided on the substrate 1, the amount of the impurity penetrating into the substrate 1 is controlled. With this, the damage of the substrate 1 surface is prevented, and a shallow region of a high impurity concentration is formed.

Description

[Detailed Description of the Invention] [Summary] An impurity-containing layer containing a desired impurity (dopant) is provided on a semiconductor, and the dopant in the impurity-containing layer is irradiated with plasma from above the impurity-containing layer. In a doping method of penetrating into a semiconductor to form a p-type or n-type impurity diffusion layer on the semiconductor surface, the impurity concentration of the impurity diffusion layer is controlled by changing the dopant concentration of the impurity-containing layer.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a doping method for introducing impurities (dopants) into a semiconductor.

With the significant increase in density and integration of semiconductor ICs, in order to improve the performance and yield of semiconductor ICs, it has become possible to independently control the dopant concentration and depth of the impurity introduced region, and to form shallow impurity introduced regions. There is a need for a doping method that allows selective introduction without damaging the semiconductor substrate surface.

[Conventional technology]

Conventionally, thermal diffusion methods and ion implantation methods are well known as methods for introducing dopants for forming p-type semiconductors or n-type semiconductors into semiconductors.

The thermal diffusion method heats the semiconductor to a high temperature of 600°C or more,
This is a technique in which dopants are diffused into a semiconductor from a diffusion source. In this method, the semiconductor must be heated to a high temperature as described above, so there are problems with peeling off the oxide film or nitride film, and the heat resistance of the mask, making it difficult to selectively diffuse the areas to be doped. When performing the diffusion, there is a problem that the dopant in the diffusion layer formed by the previous diffusion enters deeper and wider, resulting in a distorted profile. Further, the stress applied to the glabella of the semiconductor substrate when the temperature is raised or lowered cannot be ignored because it causes the semiconductor substrate to warp. Furthermore, since the diffusion rate of the apparatus is fundamentally slow, it is difficult to process single wafers, making it unsuitable for automation and miniaturization, and also requiring a long time to clean the reactor.

On the other hand, the ion implantation method is a technique in which a dopant is ionized, electrostatically accelerated, and implanted into a semiconductor, and is currently the mainstream. This method does not require heating the semiconductor to high temperatures, so selective diffusion can be performed using a resist as a mask, the diffusion layer does not spread laterally, multiple implants are possible, and processing speed is increased. It has many advantages. However, since ionized dopants are basically implanted into the semiconductor at high speed, the semiconductor crystal may be damaged and the implanted surface layer may lose its crystallinity and become amorphous due to the impact. In addition, since ions are naturally implanted into the mask material, the mask material can also be seriously damaged.For example, the resist that is mainly used may become carbonized, and depending on the implantation conditions, a stubborn residue that cannot be removed by normal means may be created, resulting in device characteristics. may lead to deterioration. Furthermore, the dopant ions have good directionality, so they can diffuse downward but cannot diffuse laterally. This indicates that, for example, when forming an element with a trench structure that has been proposed in recent years, it is impossible to perform the necessary injection of dopants into the side surfaces of the trench. Furthermore, with the currently used hair removal equipment, an accelerating voltage of several tens of KeV is required to stably extract the ion beam, which results in the problem of deep implantation (which makes it difficult to form a shallow diffusion layer of several tens of OA). However, this method inevitably requires a large and complicated device, resulting in frequent failures and high costs.

As another method, a plasma doping method has been proposed (Japanese Patent Laid-Open No. 138921/1983). This method creates a plasma containing a dopant, and attempts to implant the dopant ions generated in the plasma into a semiconductor substrate using an ion sheath or an extraction electrode, and can be said to be a method of lowering the acceleration voltage of the ion implantation method. . However, damage to the semiconductor surface layer due to direct contact of the substrate with plasma cannot be avoided, and lateral diffusion cannot be achieved. Another similar example is using DC discharge to generate plasma and using I'H3 and BzHb in the gas as plasma sources.
There are examples of doping with P) and boron (B) (for example, in the magazine "Surface Treatment Research" Vol. 2, No. 1, September 1983, P
, 147-153). In this case, it has been shown that doping is not simply caused by ions being accelerated and implanted by an ion sheath, and temperature increase due to ion collisions is accepted as one possibility. In other words, this suggests the existence of damage caused by direct contact of the substrate surface with plasma. Additionally, in general, if a doped area is exposed to the plasma, there is also the drawback that the constituent materials of the plasma chamber that have entered the plasma by sputtering or the like are also doped at the same time.

In order to eliminate various problems in the above conventional methods, the inventors previously disclosed in Japanese Patent Application No. 61-212733 that they provided a layer containing a desired dopant on the surface of a semiconductor substrate by coating or the like, and irradiated plasma from above this layer. A doping method (hereinafter referred to as plasma squeezing) in which a dopant is infiltrated into a semiconductor substrate by
ing) method).

However, at that time, no method had been found to accurately control the doping company.

[Problem that the invention seeks to solve]

The problem to be solved by the present invention is that in the above-mentioned plasma squeezing method, which can diffuse dopants into a semiconductor without causing damage, and also allows formation of a shallow diffusion layer, selective region nt, etc. control was not performed accurately.

[Means for solving problems]

The above problem is solved by providing an impurity-containing layer containing impurity atoms that act as acceptors or donors in the semiconductor on a semiconductor substrate, and by irradiating the impurity-containing layer with plasma, the impurities in the impurity-containing layer are removed from the semiconductor substrate. In the step of forming an impurity-introduced region on the surface of the semiconductor substrate, the amount of impurities that permeate into the semiconductor substrate is controlled by changing the impurity concentration of an impurity-containing layer provided on the semiconductor substrate. This problem is solved by a method for manufacturing a semiconductor device according to the present invention.

[For production]

That is, in the plasma squeezing method of the present invention, by changing the dopant concentration of an impurity (dopant) containing layer provided as an impurity source on a semiconductor substrate, the amount of dopant penetrating from the impurity containing layer into the semiconductor substrate by plasma irradiation can be increased. It is experimentally confirmed that the dopant concentration changes in proportion to the dopant concentration of the impurity-containing layer, and based on this result, the dopant concentration of the impurity-containing layer provided as an impurity source on the semiconductor substrate is changed. This method controls the impurity concentration of the diffusion layer, that is, the sheet resistance, to the required value. This allows selective diffusion without damaging the substrate, and allows the formation of shallow junctions.
Moreover, the depth and dopant concentration of the diffusion layer can be controlled independently.

〔Example〕

Hereinafter, one embodiment of the present invention will be specifically described with reference to process cross-sectional views of FIGS. 1 to 4.

Identical objects are indicated by the same reference numerals throughout the figures.

For example, on a p-type silicon (Si) substrate l having a (100) plane with a bulk resistance of about 100 Ω, a predetermined phosphorus (P) concentration of 0.1 g/100 cc to 0.5 g/100 cc is applied in a solution. A spin-on glass (SOG) layer 2 having
Apply to about 0 people. Here, for example, OCD (trade name, manufactured by Tokyo Ohka Chemical Co., Ltd.) is used for the S00 layer 2 as a 1(p) source.

Refer to FIG. 2. Next, the substrate is heated in air at, for example, 180° C. for about 30 minutes to volatilize and remove the solvent of the SOG layer 2, and then the substrate is placed in a plasma device (container) not shown. For example, while nitrogen (N2) is flowing into the device and the pressure inside the device is reduced to about 0.5 Torr, a frequency of 2
．． About 10 minutes of the upper surface of the SOG layer 2 is irradiated with nitrogen (N2) gas plasma 3 excited by microwaves of about 45 GHz and power IKW (injection 1.5 KW, reflection 0.5 KW). Here, on one side of the semiconductor substrate, S
Phosphorus (P) permeates through the 00 layer 2 to form an extremely shallow phosphorus (P) doped layer 4 with a depth of about several hundred layers, and the surface of the substrate 1 is inverted to n-type. Note that the temperature rise of the substrate at this time is 200° C. or less.

Refer to Figure 3. Next, the substrate is sequentially treated with, for example, a mixture of sulfuric acid (H, 504) and hydrogen peroxide (H20z), pure water, fluoride (liver), pure water, and nitric acid (IINO,). After completely peeling off the S00 layer 2, the substrate 1 is dried in N2 or the like as usual.

Refer to FIG. 4. Next, the substrate 1 is placed in N2, for example, at 950°C for 30 minutes.
The dopant is activated by annealing for 0 minutes and redistributed to a predetermined depth to form an n-type impurity diffusion layer (104).

N-type impurity diffusion layer 1 formed by this annealing
04 is SOG with phosphorus (P) concentration of 0.18/1oOcc
30 to 40 Ω/mouth using layers, 0.38/1
00cc (7) using SOG layer, approximately 20Ω/mouth, 0.5g/lo.

The sheet resistance of the impurity-containing layer, that is, SOGO2O3-
The higher the punt concentration, ie, the degree of 1(P)'lIA, the more the amount of dopant penetrated by the plasma, ie, the amount of doping, and the lower the resistance of the diffusion layer. Here, in the cases where plasma irradiation was not performed, one surface of the p-type semiconductor substrate was not inverted to n-type in any of the cases of phosphorus (P) concentration.
a CP) was not doped.

The above shows that by changing the dopant concentration of the impurity-containing layer, it is possible to control the impurity concentration of the diffusion region formed by the plasma squeegee.

Note that the above annealing conditions are the conditions when forming a diffusion layer at a depth where the sheet resistance can be accurately measured, and when forming a shallow diffusion layer of around 1000 people, it is necessary to anneal at a high temperature of about 1000°C for a few seconds. The doped R (p) may be activated by short-time annealing to reduce the width of redistribution or diffusion.

In addition, for the impurity-containing layer that serves as a source of the dopant, a polymer containing a dopant or the like can be used in addition to the spin-on glass, since it does not involve a large temperature rise during the plasma squeegeeing.

As is clear from the above examples, in the method of the present invention, the surface of the semiconductor substrate to be doped is covered with an impurity-containing layer and does not come into direct contact with plasma. You can't take damage.

Doping is then done by penetration of the dopant from the impurity-containing layer, and diffusion is done by a subsequent annealing process. Therefore, selective diffusion is possible, and at the same time, the impurity concentration and depth of the impurity diffusion layer can be controlled independently. Further, since doping is performed by penetration from the impurity-containing layer deposited on the surface of the semiconductor layer, it is also possible to diffuse the impurity laterally, such as into the inner surface of the trench.

〔Effect of the invention〕

As explained above, according to the method of the present invention, when forming an impurity diffusion layer in the manufacture of a semiconductor device, damage is not caused to the semiconductor substrate surface including the impurity diffusion region, and the dopant concentration and depth of the impurity diffusion layer are Since the depth can be controlled independently, it becomes easy to form a shallow impurity diffusion layer with a high impurity concentration.

Therefore, the present invention is effective in improving the performance and yield of semiconductor devices that are highly integrated at high density.

[Brief explanation of the drawing]

1 to 4 are process cross-sectional views showing one embodiment of the present invention. In the figure, 1 is a p-type silicon (Si) substrate, 2 is a phosphorous source spin-on glass (SOG) layer, 3 is plasma, 4 is a phosphorus (P) doped layer, and 104 is an n-type impurity diffusion layer.

Claims (1)

[Claims] An impurity-containing layer containing impurity atoms that act as acceptors or donors in the semiconductor is provided on a semiconductor substrate, and the impurities in the impurity-containing layer are removed from the semiconductor by irradiating the impurity-containing layer with plasma. In the process of forming an impurity-introduced region on the surface of the semiconductor substrate by infiltrating the impurity into the substrate, the amount of impurity infiltrating into the semiconductor substrate is controlled by changing the impurity concentration of the impurity-containing layer provided on the semiconductor substrate. A method for manufacturing a semiconductor device, characterized in that: