JPS63164319A - Formation of resist pattern - Google Patents

Abstract

PURPOSE:To form patterns without any defects giving no effect of reflecting light to the second resist layer during exposure process by a method wherein the first resist layer is wrinckled and then the second resist layer is formed on a flattening layer formed on the first resist layer while the second resist layer is exposed and developed for patterning process. CONSTITUTION:A film to be processed (high reflecting film such as Al etc.) is coated with resist 1. First, the resist 1 is wrinckled using a gas plasma device. Second, the wrinckled resist 1 is coated with a film 2 for primary flattening e.g. PMMA. Then, the film 2 is further coated with another resist 3 for forming wiring patterns. Third, the resist 3 is exposed and developed to form wiring patterns 3'. The light is irregularly reflected in the interfaces on wrinckled and naturally irregular surface of lower layer resist 1' to be attenuated while reaching the upper layer resist 3 along the flattening film 2. Resultantly, the light has no effect on patterning process. Finally, the flattening layer 2 and the lower resist film 1 are removed using the upper layer resist patterns 3' as masks to form etching masks for the film 4 to be processed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a resist pattern in the manufacture of semiconductor devices, and in particular to a method for forming a resist pattern in the manufacture of semiconductor devices, and in particular to a method for forming a resist pattern in a photolithography process. This is related to improving countermeasures against.

(Prior art) In the process of transferring a mask pattern using ultraviolet light or the like onto a resist i~ on a film to be processed (resist base film) having a high reflectivity such as 8ρ (aluminum), it is necessary to Reflection of ultraviolet light affects the resist pattern.

In order to prevent such reflection, an antireflection film made of amorphous silicon (hereinafter referred to as α-3i) or the like is formed on the surface of the processed film by vapor deposition or the like.

[Problem that the invention seeks to solve]

However, since the molecular structure of α-3i is unstable, the high wavelength light generated by the plasma during dry etching
The heat energy enters α-3i, and α-3i located under the resist pattern reacts with the film to be processed, thereby generating voids. And also α-8
: is relatively thin because it is considered to be the best film thickness for interference between incident light and reflected light, diffuse reflection of light, absorption of light, etc., and as a result, the film to be processed is There is a problem in that the resist pattern is peeled off together with the α-3i film before etching is completed, and as a result of etching, defects occur in the pattern of the workpiece 1q.

An object of the present invention is to prevent pattern defects from occurring.

[Means for solving problems]

The resist pattern forming method of the present invention includes a step of forming a first resist layer on a film to be processed, a step of creating wrinkles on the surface of the first resist layer, and a step of forming a first resist layer on the surface of the first resist layer.
forming a flattening layer on the resist I layer, forming a second resist layer on the flattening layer, and patterning the second resist layer by exposure and development; The planarization layer and the first resist layer are patterned using the patterned second resist layer as a mask.

[Effect]

During exposure for patterning the second resist film,
Light is diffusely reflected on the wrinkled surface of the first resist film. The reflected light is sufficiently attenuated before reaching the second resist film, and the reflected light does not affect the patterning of the second resist layer. Therefore, no patterning defects occur.

Further, since the first resist layer and the planarization layer are etched using the patterned second resist layer as a mask, they also become defect-free.

(Example) An example of the present invention will be described below with reference to the drawings. Figs. 1 to 4 show states in each step of a pattern forming method according to an example of the present invention. .

First, as shown in FIG. 1, a resist 1 is applied onto a film to be processed (highly reflective film such as AN) 4. As shown in FIG. The thinner the resist 1 is, the finer the wrinkles will be, and if it is less than aoooL, it will be optimal for scattering the influencing wavelengths.

Next, the resist 1 is wrinkled as shown in FIG. 2 using a gas plasma device. [11”
The register 1- where this occurs is indicated by the symbol @1'. In order to form this wrinkled resist 1', dry etching is used, and the temperature of the electrode on the side where the wafer is placed is not controlled, but the temperature is allowed to rise due to exposure to plasma. In this way, since the plasma itself has a temperature of 1000℃ or more,
When the plasma hits the resist, the resist is rapidly heated to a high temperature and shrinks, resulting in wrinkles. In addition, as a result of the plasma etching the surface randomly,
The uneven shape becomes complex, which makes it even better at scattering light.

Next, a film 2, for example PMMA, is applied for flattening the base. Then, a resist 3 for forming a wiring pattern is applied to form the state shown in FIG. 2.

Next, the resist 3 is exposed and developed to form a wiring pattern 3' as shown in FIG. In conventional manufacturing methods, patterning is affected by reflection on the surface of the film to be processed 1 during exposure, but in the above embodiment, the surface of the lower resist 1-1' has wrinkles and is therefore uneven. The light is diffusely reflected at the interface and is attenuated by the time it travels through the flattening film 2 and reaches the upper resist 3. Therefore, patterning is not affected.

Next, using the upper resist pattern 3' as a mask, the flattening layer 2, for example PMMA, is exposed to deep-UV light.
The exposed portion of the planarization layer 2 is removed by exposure and development, and the lower resist film 1' underneath is roughly removed by dry etching using 02 plasma.
The state shown in FIG. 4 is established.

With the above steps, the formation of the etching mask (resist) for the film to be processed 4 (A) is completed.

In the above embodiment, the resist film 1 is wrinkled using a gas plasma device. However, instead of using a gas plasma device, it is also possible to simply perform rapid heating. For example, it may be placed in a furnace maintained at a high temperature of several hundred degrees, or a heating device such as a microwave oven may be used.

〔Effect of the invention〕

As described above, according to the present invention, a first resist layer having wrinkles is used, a second resist layer is formed on a flattening layer formed thereon, and the second resist layer is We decided to perform patterning by exposing and developing.
During this exposure, the second resist layer is not affected by the reflected light. Therefore, a pattern without defects can be obtained. In addition, since the first resist layer and the planarization layer are etched using the etched second 9921~ layer as a mask, no defects are caused in these layers, and a good resist pattern is formed on the film to be processed as a whole. Form into 1q.

[Brief explanation of the drawing]

1 to 4 are cross-sectional views showing the state of a semiconductor device at each step of a pattern forming method according to an embodiment of the present invention. 1.3... Resist film, 1'... Resist film with wrinkles formed, 2... Flattening layer, 4... Film to be processed.

Claims (1)

[Scope of Claims] A step of forming a first resist layer on the film to be processed, a step of forming wrinkles on the surface of the first resist layer, and a step of forming a first resist layer on the wrinkled first resist layer. forming a flattening layer; forming a second resist layer on the flattening layer; patterning the second resist layer by exposure and development; A method for forming a resist pattern on a film to be processed, comprising patterning the flattening layer and the first resist layer using a second resist layer as a mask.