JPS63164224U - - Google Patents
Info
- Publication number
- JPS63164224U JPS63164224U JP5765587U JP5765587U JPS63164224U JP S63164224 U JPS63164224 U JP S63164224U JP 5765587 U JP5765587 U JP 5765587U JP 5765587 U JP5765587 U JP 5765587U JP S63164224 U JPS63164224 U JP S63164224U
- Authority
- JP
- Japan
- Prior art keywords
- clamper
- lead frame
- heater plate
- integrated circuit
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図Ａは一実施例におけるクランパを示す斜
視図、同図ＢはそのＢ−Ｂ線位置での断面図、第
２図は同実施例のヒータプレートとリードフレー
ムを示す断面図、第３図は同実施例でクランパで
リードフレームを押さえながらワイヤボンデイン
グを施した状態を示す断面図、第４図Ａはリード
フレームの一部分を示す平面図、同図ＢはそのＡ
−Ａ線位置での断面図、第５図は従来のワイヤボ
ンデイング装置のクランパを示す斜視図、第６図
は従来の装置におけるクランパ、リードフレーム
およびヒータプレートを示す断面図、第７図はボ
ンデイングが終了した状態を示す断面図である。
１……リードフレーム、２……タブ、４ａ，４
ｂ……タブを保持するリード、１６……ＩＣチツ
プ、１８，２０……ワイヤ、２２……ヒータプレ
ート、２４……クランパ、２６ａ，２６ｂ……溝
。
FIG. 1A is a perspective view showing a clamper in one embodiment, FIG. 1B is a sectional view taken along line B-B, FIG. The figure is a cross-sectional view showing a state in which wire bonding is performed while holding the lead frame with a clamper in the same embodiment, Figure 4 A is a plan view showing a part of the lead frame, and Figure B is a plan view of the lead frame.
- A cross-sectional view at line A, FIG. 5 is a perspective view showing the clamper of a conventional wire bonding device, FIG. 6 is a cross-sectional view showing the clamper, lead frame, and heater plate in the conventional device, and FIG. 7 is a perspective view showing the clamper of a conventional wire bonding device. FIG. 1...Lead frame, 2...Tab, 4a, 4
b... Lead holding the tab, 16... IC chip, 18, 20... Wire, 22... Heater plate, 24... Clamper, 26a, 26b... Groove.
Claims (1)
げリードフレームをクランパによりヒータプレー
トに押しつけた状態で半導体集積回路装置チツプ
とリードフレームとをワイヤによりボンデイング
するワイヤボンデイング装置において、前記ヒー
タプレートの表面を平坦にし、かつ、前記クラン
パにはタブを保持しているリードの折れ曲り部を
逃がす溝を設けたことを特徴とするワイヤボンデ
イング装置。 In a wire bonding apparatus for bonding a semiconductor integrated circuit device chip and a lead frame with a wire while a doub-down lead frame to which a semiconductor integrated circuit device chip is fixed is pressed against a heater plate by a clamper, the surface of the heater plate is flattened. and a wire bonding device characterized in that the clamper is provided with a groove for escaping the bent portion of the lead holding the tab.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5765587U JPS63164224U (en) | 1987-04-15 | 1987-04-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5765587U JPS63164224U (en) | 1987-04-15 | 1987-04-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164224U true JPS63164224U (en) | 1988-10-26 |
Family
ID=30887564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5765587U Pending JPS63164224U (en) | 1987-04-15 | 1987-04-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164224U (en) |
-
1987
- 1987-04-15 JP JP5765587U patent/JPS63164224U/ja active Pending