JPS63163928A - Control system for microprogram - Google Patents

Abstract

PURPOSE:To save storage capacity by storing significant parts among parts consisting a microinstruction, and assembling them into the microinstruction at the time of execution so as to execute it. CONSTITUTION:The microinstruction constituting a microprogram consists of respective parts of an arithmetic control command part, a register control command part and a branch decision control command part. The microinstruction is divided into four fields by functions and they are numbered of 0-3. At such a time, only data on a field number '1' is significant in a microinstruction 1, and data on field numbers 2 and 3 are in a microinstruction 2. At the time of storing them, sub-microinstructions consisting of significant data and their segment instruction information are generated. Namely, if a relational information storage area 1a is '1', it shows that it is the initial sub-microinstruction of one microinstruction, and data on a segment command area 1b shows in which field data on a control information storage area 1c is.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a microprogram i, lJ ill system that sequentially executes a microprogram consisting of microinstructions to execute a predetermined instruction.

(Prior Art) A microprogram control method in which normal instructions for a computer are divided into smaller microinstructions, and normal instructions for the computer are configured by a microprogram made up of these microinstructions, is a method for changing the microprogram. This has the advantage that the contents of the instructions can be easily changed, or instructions can be added by adding a microprogram.

FIG. 3 is a diagram showing the circuit configuration of a main part for executing the microprogram 1j control method, in which microinstructions from a control memory (not shown) that stores a microprogram are set in the instruction register 21.

The contents of the microinstruction set in the instruction register 21 are divided into a plurality of fields, ie, an operator control field, a register Milli field, a branch judgment t11 control field, a memory access control field, a branch destination address field, etc. are arithmetic unit 22, register memory 23, A register 24, B register 25,
It is appropriately connected to a branch determination circuit 26, a memory access control circuit 27, an address register of a control memory (not shown), and the like.

By the way, microinstructions are divided into several fields to facilitate the realization of various functions, but all of these fields are always required when executing each microinstruction. For example, in the case of a microphone[] instruction for transfer between registers, branch-related fields are not used and are unnecessary.

In addition, in the microprogram control method, in order to improve processing performance, there is a method of controlling many processes at the same time with one microinstruction, but in general, the processes that can be executed simultaneously are often limited, and the number of processes that can be executed simultaneously is often limited. There are relatively few microinstructions that use the information in all fields simultaneously for control, and even with this method, many microinstruction fields are not used and are set to specific bit patterns consisting of "0".

(Problem to be Solved by the Invention) As mentioned above, microinstructions are divided into multiple fields, but these fields are not all used at all times, but are specific depending on the function of each microinstruction. only fields are used, other fields are not used, and certain bit patterns are used, e.g. [00...
...0'', but in the conventional microprogram 1j control method, all such microinstructions are stored as they are in the control memory, and for example, a specific bit pattern that is not used depending on the function of the microinstruction is Microinstructions that have fields set to are also left unchanged! 411] memory, at least an additional control memory capacity is required to store this unused specific bit pattern field,
There is a problem that the storage capacity of the control memory becomes large.

The present invention has been made in view of the above, and an object thereof is to provide a microprogram control system that is economical by reducing the capacity of a control memory that stores microprograms. - [Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the microprogram control method of the present invention sequentially sets microinstructions constituting a microprogram in an instruction register, and stores the microinstructions in the instruction register. A microprogram control method that executes microinstructions set in a microinstruction system, which includes classification designation information that specifies each division of a microinstruction consisting of a plurality of divisions, and tIll information that is set in the division specified by the division designation information. A microinstruction is composed of submicroinstructions, and has a classification designation area and a control information storage area for respectively storing classification designation information and control information of the submicroinstruction in order to store the submicroinstruction. An association for associating at least one or more of the sub-microinstructions forming the sub-microinstruction is an association for storing information corresponding to the sub-microinstruction, and an association is for storing information in a control memory having an information storage area; Setting υ for controlling to set the control information stored in the corresponding control information storage area in the classification of the instruction register corresponding to the classification specified by the classification specification information in the microinstruction.
The gist of the present invention is to include a control means and a predetermined information setting means for setting predetermined information in a section of the instruction register that is not set by the setting control means.

(Operation) In the microprogram control method of the present invention, microinstructions are executed using submicroinstructions consisting of category designation information that specifies each category of the microinstruction, and 111 control information set in the category specified by the category designation information. configuring and storing the microinstruction as a submicroinstruction by storing the classification designation information and control information in the control memory,
When setting a microinstruction in an instruction register, the corresponding control information is set in the instruction register category corresponding to the category specified by the category specification information, and predetermined information is set in other categories that are not set. , whereby a microinstruction consisting of multiple fields is set in the instruction register.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a circuit block diagram showing the configuration of a microprogram control system according to an embodiment of the present invention, and FIG. 2 is a circuit block diagram for explaining the configuration of microinstructions used in the microprogram control system of FIG. This is a diagram.

In FIG. 1, 1 is a 1 that stores a microprogram.
In this embodiment, microprograms are stored in the control memory 1 in the form of submicroinstructions to be described later. The sub-microinstructions stored in the control memory 1 are read from the address specified by the address register 2 and set in the instruction register 4, but since they are directly set in the instruction register 4, instruction buffer register 3
The microinstruction is converted into a normal microinstruction having a plurality of fields via the microinstruction register 4, and then set in the instruction register 4. Furthermore, as will be described later, when stored in the control memory 1 in the form of sub-microinstructions, information on unused fields, for example unused information of a specific bit pattern such as "00.0", is stored in the control memory 1. Since it is not stored in the instruction buffer register 3, a default register 5 is provided, and from this default register 5, a specific bit pattern of "OO・0" is first set in the instruction buffer register 3. I have to.

Next, with reference to FIG. 2, the configuration of microinstructions and submicroinstructions used in this embodiment will be explained.

FIG. 2 <a> shows a microprogram consisting of microinstructions, and each line next to this microprogram represents one microinstruction.

As described above and shown in FIG. 2(a), each microinstruction is divided into a plurality of fields, and the microinstruction shown in FIG. 2(a) is divided into four fields as an example. Field numbers 0, 1.2 respectively
．． 3 is attached.

In the microprogram shown in FIG. 2(a), -C specifically indicates microinstructions 1 and 2. In microinstruction 1, only the control information set in field 1, that is, the bit pattern, is rlloOJ, and the bit patterns in other fields 0.2.3 are rooooJ.
is set to a specific bit pattern. Further, in microinstruction 2, the bat patterns of fields 2 and 3 are set to rlooOJ and rololJ, respectively, and the bit pattern of the other field 0.1 is set to a specific bit pattern of rooooJ. That is, in the case of these micro instructions 1 and 2, the effective bit pattern r1100J excluding the specific bit pattern roooOJ
, rlooOJ.

It is sufficient to focus only on rololJ and store only these valid bit patterns in the control memory 1. Therefore, in this embodiment, focusing on this point, instead of storing each microinstruction as it is in the control memory 1, each microinstruction is specified by a classification designation that specifies an effective bit pattern and a field of the effective bit pattern, that is, a classification. It is simplified and stored in sub-microinstructions consisting of information. Note that in the example shown in Figure 2 <a>, the fields are divided into 4 fields O to 3, so 2
Classification information can be expressed in bits.

However, the microinstruction 1 has rl in field 1.
Since it has an effective bit pattern of looJ,
This corresponds to a sub-microinstruction consisting of an h-effect bit pattern r1100J and classification designation information "01" that designates field 1 thereof.

FIG. 2(b) is a diagram showing the memory structure of the control memory 1 which stores sub-microinstructions corresponding to microinstructions to constitute the microprogram of FIG. 2(a). This control memory 1, as shown in the figure,
The association is composed of an information storage area la, a classification designation area 1b, and a control information storage area 1C. The association is used to associate the information storage area 1a with 1 m or more of the sub-microinstructions that constitute one microinstruction, thereby indicating that the associated sub-microinstructions constitute one microinstruction. The association is an area for storing information, the classification specification area 1b is an area for storing the field of the microinstruction, that is, the classification information that specifies the classification, and the control information storage area 1C is the area for storing information. This is an area for storing control information that is the effective bit pattern set to a specified yield.

In FIG. 2(b), as sub-microinstruction 1, the association is "1" in the information storage area tf+1a, "01" in the classification specification area 1b, and "1100" in the control information storage area 1C. This sub-microinstruction corresponds to the microinstruction 1 shown in FIG. 2(a). In other words, this sub-microinstruction is ro1J of the partition designation area 1b.
=2 indicates that the microinstruction has a valid bit pattern M100J, which is the control information shown in the U+ control information storage area 1C, in field 2, and the bit patterns in other fields 0.2.3 that are not particularly shown are as follows. Figure 2 (
The specific bit pattern shown in C) is [0000J. Note that the association "1" in the information storage area 1a indicates that this sub-microinstruction constitutes a microinstruction only by this one sub-microinstruction.

Next to this sub-microinstruction 1, sub-microinstruction 2-
1.2-2 is shown, and these two sub-microinstructions correspond to microinstruction 2 in FIG. 2(a). In other words, the association of the sub-microinstruction 2-1 is "O" in the information storage area 1a and "r" in the classification specification area 1b.
11 J, I control information storage area 1C is [)1014
Then, the effective bit pattern of field 3 is rolo
lJ, and the sub-microinstruction 2-2 is associated with the information storage area 1a as "1" and the classification specification area 1b.
is NOJ, the control information storage area 1C is "1000", and the valid pitch 1 to pattern of field 2 is rl 000.
C indicates J, which corresponds to the microinstruction 2, but the bit patterns of other fields 0 and 1, which are not particularly shown, are specific bit patterns "0000". Furthermore, the association of the first stored sub-microinstruction 2-1 is that rOJ in the information storage area 1a is one microinstruction 2-1.
This indicates that this is not the last sub-microinstruction for the sub-microinstruction 2-2, and that there is another sub-microinstruction 2-2 following it. Then, the association of the next sub-microinstruction 2-2 is such that the information storage area 1a becomes "1", indicating that this sub-microinstruction is the last sub-microinstruction, and thereby one microinstruction 1 is two 91 microinstructions 2
It can be seen that it is composed of -1.2-2.

Note that the association of the information stored in the information storage area 1a is not limited to this method, and there are various other methods.

By storing the microinstructions in this way, when storing the microprogram in the control memory 1, instead of storing the microinstructions as shown in FIG. ), the storage capacity M of the control memory 1 can be considerably reduced by converting and storing the sub-microinstructions.

Specifically, the size microinstruction 1.2 is shown in Figure 2(a).
In this case, 8 liters of 32-bit memory is required, but when sub-microinstructions are used, only 21 bits of memory are required, as shown in Figure 2 (1)), which reduces the memory capacity to 11 bits. You can save money.

Control memory 1 using sub-microinstructions as described above.
The circuit block shown in FIG. 1 is used to sequentially read the microprograms stored in the microprogram and set the microinstructions in the instruction register.

Next, its effect will be explained.

υ1I11] The microprogram stored in memory 1 in the form of submicroinstructions is stored in address register 2.
The sub-microinstruction at the address supplied from is specified to be read, but prior to this read operation,
[OOO...] set in default register 5
...OOJ is set in the instruction buffer register 3.

Then, the sub-microinstruction at the address specified by address register 2, for example, the sub-microinstruction 1 (
1;01;1100) is read from the control memory 1. Then, the classification specification area 1 of this sub-microinstruction 1
rol (=2)J of the classification specified report stored in b
is supplied to the instruction buffer register 3 via the lead Ii8, thereby specifying field 2 of the instruction buffer register 3, and the valid bit which is the control information stored in the control information storage order 1a1c of the sub-microinstruction 1. The pattern "1100" is supplied to the instruction buffer register 3 via the lead 7, and the valid bit pattern r1100 is stored in field 2 of the instruction buffer 7 register 3.
J is set. Also, at this time, the specific bit pattern roo00J is set in the other field 0°2.3 of the instruction buffer register 3, so the contents of the instruction buffer register 3 are roooo: 1100: 000.
0:0OOOJ, and the sub-microinstruction 1 stored in the control memory 1 is converted to the microinstruction 1 and set in the instruction buffer register 3.

The microinstruction 1 that has been converted from the submicroinstruction 1 and set in the instruction buffer 7 register 3 is associated with the υ control memory 1 (the association read from the push information storage area 1a is the information "1"). By being supplied to the instruction register 4 via the single line 9, it is set from the instruction buffer register 3 to the instruction register 4.Then, it is decoded by the analog control circuit shown in FIG. It will be executed.

As described above, after the microinstruction 1 corresponding to the submicroinstruction 1 is set in the instruction register 4 and executed, the address register 2 selects the next address in the control memory 1, that is, The address of instruction 2-1 is specified, and the sub-microinstruction 2-1 is
When 1 is read out, this sub-microinstruction 2-1 is also set in the instruction buffer register 3 in the same way. That is,
When only the sub microphone [] instruction 2-1 is set in the instruction buffer register 3, the contents of the instruction buffer 7 register 3 are roooo: 0000: 0000: 0
101J, and the valid bit pattern r0101J is set only in field 3.

On the other hand, since the association of this sub-microinstruction 2-1 stored in the information storage area 1a is "0", the sub-microinstruction 2-1 set in the instruction buffer register 3 The contents of are not immediately supplied to the instruction register 4 and remain as they are. When the next sub-microinstruction 2-2 is read in the same way, the contents of the sub-microinstruction 2-2, that is, rlooooJ of field 2, are added to the contents of the sub-microinstruction 2-1 remaining in the instruction buffer register 3. is set, and the contents of instruction buffer 7 register 3 are roooo : oooo : 1000:
0IOIJ, and the same contents as microinstruction 2 are set in instruction buffer register 3. That is, the sub-microinstructions 2-1 and 2-2 were converted into microinstructions 2 and set in the instruction buffer 7 register 3.

Microinstruction No. 2 is converted from submicroinstruction 2-1. Since information [1] is supplied to the instruction register 4 via the lead wire 9, the sub-microinstruction 2-1 for the microinstruction 1 is
．． 2-2, it is detected that all are present, and the instruction buffer 7
It is set from register 3 to instruction register 4.

It is decoded and executed by the control circuit shown in FIG.

[Effects of the Invention] As explained above, according to the present invention, a sub-microinstruction code consisting of classification specification information that specifies each classification of a microinstruction and serial control information set in the classification specified by the classification specification information is provided. A microinstruction is composed of instructions, the microinstruction is stored as a sub-microinstruction by storing the classification specification information and control information in the control memory, and when setting the microinstruction in the instruction register, the microinstruction is stored in the control memory according to the classification specification information. Converts a sub-microinstruction into a microinstruction consisting of multiple fields by setting appropriate control information in the instruction register classification corresponding to the specified classification, and setting specified information in other divisions that are not set. Since the υ control memory stores only the control information of the fields used in each microinstruction together with the classification information, and the information of the fields not used in each microinstruction is not stored, the control It is possible to reduce the memory storage capacity and achieve economy.

Such a method is particularly effective in the case of a microinstruction that has many fields so that one microinstruction performs many operations, and many of these fields are set to "0" in a specific bit pattern. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the structure of a microprogram control system according to an embodiment of the present invention, and FIG. 2 is a diagram showing the structure of microinstructions and submicroinstructions used in the embodiment of FIG. FIG. 3 is a block diagram showing the configuration of the main parts of the υ control section of the microprogram control system. 1...Control memory 2...Address register 3...Instruction buffer 7 register 4...Instruction register 5...Default register 5 Agent Patent attorney Yasuo Miyoshi Figure 1

Claims (1)

[Claims] A microprogram control method that sequentially sets microinstructions constituting a microprogram in an instruction register and executes the microinstructions set in the instruction register, wherein each of the microinstructions consisting of a plurality of sections A microinstruction is composed of submicroinstructions that have classification designation information that specifies the classification and control information that is set in the classification specified by the classification information, and the classification designation information of the submicroinstruction is used to store the submicroinstruction. and a classification designation area and a control information storage area for storing control information, respectively, and an association for storing association information for associating at least one or more of the sub-microinstructions constituting one microinstruction in correspondence with the sub-microinstructions. a control memory having an information storage area; and a sub-microinstruction associated with the association information that is stored in the corresponding control information storage area in the classification of the instruction register corresponding to the classification specified by the classification specification information. A microprogram control system comprising: a setting control means for controlling the setting of control information; and a predetermined information setting means for setting predetermined information in a section of an instruction register that is not set by the setting control means.