JPS6316194Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a synchronization device, and more particularly, the present invention relates to a synchronization device, and more particularly, the present invention relates to a synchronization device that uses a random code having sharp autocorrelation characteristics, for example, M
The present invention relates to a synchronization device that generates the same code as the random code of the received signal in a receiver and maintains the phases of both codes in the same phase when receiving and demodulating a modulated signal based on a sequence code.

In any communication, if synchronization with the communication partner is not ensured, communication becomes impossible. There are two types of synchronization: "initial synchronization" for initial line connection, and "synchronization maintenance" for maintaining line synchronization in a good condition after the initial connection. In general, a higher signal-to-noise ratio (S/N) is required during initial synchronization than during synchronization maintenance, and once initial synchronization is achieved, synchronization maintenance is required as much as possible for good communication.

Conventionally, this type of synchronizer has a delay lock loop circuit as synchronization maintaining means. For example, a delay lock loop circuit for a phase modulated signal using a random code is shown in FIG.

In FIG. 1, a transmitter 1 uses a balanced modulator 12 to generate a phase modulation signal from a random code generated by a random code generator 13 operated by a reference signal oscillator 14 and a carrier wave generated by an oscillator 11, and transmits the signal. It is transmitted from the antenna 15. In the receiver 2', the phase modulated signal received by the receiving antenna 21 is passed through a correlator 23 and a phase discriminator 2.
2'. This phase discriminator 22' controls the phase of the random code generated by the random code generator 26 via the loop filter 24 and the voltage controlled oscillator 25 to maintain synchronization. The random code generator 26 generates a random code input to the correlator 23 and two sequences of random codes input to the phase discriminator 22', but the random code input to the correlator 23 is synchronized. This is the code to be taken, and when it is in the same phase as the random code of the received signal, it becomes synchronized. The phase discriminator 22' is
A balanced modulator 2211 and a band filter 22 calculate the correlation between the random code input to the correlator 23 and a random code whose phase is advanced by 1 bit.
12 and a detector 2213, and the correlation with a random code whose phase is delayed by 1 bit is determined by a correlator 222' composed of a balanced modulator 2221, a bandpass filter 2222, and a detector 2223. Find it by Further, the correlation with the random code to be synchronized is determined by the balanced modulator 231, band filter 232, and detector 233.
The synchronization state is determined by a correlator 23 configured by a synchronization maintenance monitoring device 27.

FIG. 2 shows the operating waveforms of the delay lock loop circuit. The autocorrelation characteristic of a random code is such that when the phase difference between the random code of the received signal and the random code generated by the receiver is within 1 bit, the correlation value in the range of points a to c in Figure 2A is expressed as follows. When the phase difference disappears, the peak of the correlation value is taken at point b.

When the correlation output characteristic of the correlator 23 is shown as A in FIG. 2, the correlation output characteristics of the correlator 221' and the correlator 222' are as shown in B and C of FIG. 2, and each peak point d, Each of e has a phase difference of 1 bit with respect to the peak point b. By the subtractor 227, FIG.
Obtain the phase discrimination property of. If the phase difference between the random code to be synchronized and the random code of the received signal is within 2 bits, due to the phase discrimination characteristic shown in Figure 2D, the random code on the receiving side is Controls the phase of the code and maintains synchronization.

Here, when the S/N of the received signal is good,
Since the steady phase error is small and no out-of-synchronization occurs, the phase discriminator 22' of FIG. 1 having the phase discrimination characteristic shown in FIG. 2D is sufficient. however,
If the S/N of the received signal deteriorates and a phase shift occurs, it is necessary to perform initial synchronization again. Therefore, once initial synchronization is achieved, in order to maintain synchronization as much as possible, , a synchronizer having wider phase discrimination characteristics than that shown in FIG. 2D is required.

One method for this purpose is to increase the number of correlators in the phase discriminator 22' in FIG. need to ask. Using six correlators, the correlation characteristics with a random code with a 3-bit phase difference are shown in Figure 2 B and C.
are shown by solid and broken lines. The phase discrimination characteristics of this synchronizer are as shown in Fig. 2E, and Fig. 2D
is wider than the phase discrimination characteristic of .

However, obtaining multiple correlations and controlling the phase of the random code is proportional to the number of correlators because when the output of one correlator takes a large value, the outputs of other correlators are noise. This degrades the S/N of the synchronizer. Moreover, if synchronization occurs, the S/N ratio of the received signal is not good, which is not practical.

The present invention was devised to eliminate the above-mentioned drawbacks inherent in the conventional technology. Therefore, the purpose of the present invention is to provide phase discrimination using a plurality of random code correlators in contrast to the conventional synchronization device. To provide a new synchronizer that effectively has the wide phase discrimination characteristics shown in FIG. 2D by effectively switching the correlator in order to prevent the S/N of the synchronizer from deteriorating when widening the characteristics. There is a particular thing.

That is, according to the present invention, in a synchronization device that performs synchronization control by controlling the phase of the random code based on the correlation value between the random code from the random code generator and the random code of the received signal,
1) A main correlator that correlates the random code of the center sequence among the sequences (n is a natural number) with the received signal, and a sequence whose phase is most advanced among the sequences,
a first correlator group consisting of n correlators that correlate each of n sequences of random codes up to a sequence whose phase is delayed by (n-1) bits from the sequence with the received signal; Consisting of n correlators that correlate each of the n sequences of random codes, from the sequence with the most delayed phase to the sequence whose phase is (n-1) bits ahead of that sequence, with the received signal. When the outputs of the second correlator group and the main correlator are larger than the correlator outputs of the first and second correlator groups, the The output of the correlator that takes the correlation for the phase sequence closest to the center sequence is selected and output as the correlation value, and the output of the main correlator is connected to one of the first and second correlator groups. and means for selecting one of the correlator outputs and outputting the selected correlator output as the correlation value when the correlation value is smaller than the correlation value.

Hereinafter, the present invention will be explained in the third section with its good embodiments.
This will be explained in detail with reference to FIGS.

FIG. 3 is a block diagram showing a first embodiment of the present invention. In the figure, an antenna 21 of a receiver 2 receives a phase modulated signal based on a random code. The received signal is passed through the correlator group 2 of the phase discriminator 22.
21 and 222 (2×n) correlators 210
1,...210n and 2201,...220n, and the correlator 23. These correlators are (2
The correlation with the random code of the (2×n+1) sequence with a phase difference of
It operates to synchronize the phases of the random code input to the input signal and the random code of the received signal.
n correlators 2101, ... 21 of the correlator group 221
0n takes the correlation between the phase of the random code to be synchronized and n series of random codes having a phase lead of up to n bits. Similarly, n correlators 2201, . All correlators have the same configuration, and correlator 2101 is shown in FIG. 4 as an example. That is, the correlator 2101 includes a balanced modulator 21011, a bandpass filter 21012, and a detector 21013.

The switch groups 223 and 224 include a switch 2302 whose switching is controlled by the output of the correlator 23;
...230n and 2402, ...240n, and the switch 230 controlled by these switch outputs.
1, 2401. switch 230
Since the configurations of switches 2,...230n and 2402,...240n are all the same, as an example, switch 23
The configuration of 02 is shown in FIG. That is, switch 23
02 consists of a comparator 23022 and a switch 23021 controlled by the comparator, and the switch 23021 closes only when the output of the correlator 2102 is greater than the output of the correlator 23.

On the other hand, the switches 2301 and 2401 are connected to the switches 2302, ...230n and 2402, ...240n.
It is a switch controlled by switch 2
302, . . . 230n, 2402, . The (2×n) correlator outputs of the correlator groups 221 and 222 are sent to the switch group 223.
and 224, the synthesizers 225 and 226 produce two combined outputs. Subtractor 227
combines both composite outputs by inverting the polarity of one composite output. The output of the subtracter 227 controls the phase of the random code generated by the random code generator 26 via the loop filter 24 and the voltage controlled oscillator 25.

Here, considering an M-sequence code as a random code, the random code generator 26 consists of a shift register 2601 and an exclusive OR circuit 2602, as shown in FIG. 2601 timing signal. The random code generator 26 outputs (2×n+1) series of random codes as the output of the shift register 2601, and each series has a phase difference of 1 bit. Among these random codes, n sequences from the sequence with the most advanced phase to the sequence with a phase lag of (n-1) bits from that sequence are sent to the n correlators of the correlator group 221 in order of phase lag. Inputs up to 210n from the correlator 2101.
Similarly, the n sequences from the most delayed sequence to the sequence whose phase is (n-1) bits ahead of that sequence are sent to the n correlators of the correlator group 222, and the correlators 2201 and 220n are sent in the order of phase advancement from the correlators 2201 to 220n. Enter up to
Furthermore, the remaining one sequence is input to the correlator 23 as a random code to be synchronized.

Now, in the synchronization holding state, the correlation value of the correlator 23 is larger than the correlation outputs of any other correlators. At this time, the switches 2302,...230n,
The comparators 2402, . . . 240n cause the switches to open, and conversely, the
401 is closed to form the delay lock loop circuit of FIG.

If synchronization occurs due to S/N deterioration,
If the phase difference is within n bits, there is always a correlator with a larger correlation value than correlator 23.
Here, for example, if the correlator is 2105, the correlation output will cause the next stage switch 2305 to
The comparator 23052 determines that a correlation output larger than the correlation value of the correlator 23 has been obtained, closes the switch 23051, and simultaneously opens the switches 2301 and 2401. Therefore, all switches except switch 2305 are open. The output of this switch 2305 controls the voltage controlled oscillator 25 in a direction that reduces the phase difference of out-of-synchronization. Therefore, the correlation output value becomes larger than other correlation output values, and the correlator whose switch is closed changes from correlator 2105 to correlator 21.
04, 2103, 2102, 2101 in order to decrease the phase difference, and finally the correlator 23
As the correlation output of becomes larger than the other correlation outputs,
Restores phase synchronization. This state corresponds to point g in FIG. 2E.

As explained above, the present invention makes it possible to provide arbitrarily wide phase discrimination characteristics without degrading the S/N of the synchronizer by switching multiple correlators with a switch, thereby ensuring good communication. It becomes possible.

The above description merely refers to one embodiment for convenience, and does not limit the scope of the present invention in any way.

For example, it is possible to consider another embodiment of the present invention as shown in FIG. The difference between the embodiment shown in FIG. 3 and the embodiment shown in FIG.
In the figure, correlation level detectors 228 and 229 in FIG. 7 are used instead of combiners 225 and 226 in FIG.
The voltage controlled oscillator 25 is installed under its control.
Phase corrector 2 that performs inhibition control of the clock pulse of
It is a point with 8. Correlation level detector 228,2
29 is the switch 2302,...230n and 24
02, . , 2101,...210n, 2201,...2
Among the 20n correlation outputs, the correlation output of the correlator 23 is made to be the maximum. This operation is effectively equivalent to the embodiment shown in Fig. 3, and the difference is whether control is performed analogously or digitally when the phase difference at the time of phase shift becomes 1 bit or more. There is only.

In the above embodiments, only the phase modulation method has been dealt with, but by making the random code generators 13 and 26 of the transmitter and receiver each a frequency synthesizer driven by a random code generator, the frequency modulation method can be applied. I would like to add that it can also be used.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventionally used delay lock loop circuit. 1... Transmitter, 11... Oscillator, 12,221
1,2221,231...Balanced modulator, 13,2
6...Random code generator, 14...Reference signal oscillator, 15...Transmission antenna, 2'...Receiver,
21...Receiving antenna, 22'...Phase discriminator,
23, 221', 222'... Correlator, 24... Loop filter, 25... Voltage controlled oscillator, 27...
...Synchronization maintenance monitoring device, 227...Subtractor, 221
2,2222,232...bandwidth filter, 221
3,2223,233...detector. FIG. 2 is an explanatory diagram of the operation of the delay lock loop circuit using waveforms. FIG. 3 is a block diagram showing an embodiment of the present invention. 2...Receiver, 21...Receiving antenna, 22...
... Phase discriminator, 23 ... Correlator, 24 ... Loop filter, 25 ... Voltage controlled oscillator, 26 ... Random code generator, 27 ... Synchronization maintenance monitoring device,
221, 222... correlator group, 223, 224...
...Switch group, 225, 226...Synthesizer, 22
7...Subtractor. FIG. 4 is a diagram showing an example of the configuration of a correlator. 21011... Balanced modulator, 21012... Bandpass filter, 21013... Detector. FIG. 5 is a diagram showing an example of the configuration of the switch. 23021...Switch, 23022...Comparator. FIG. 6 is a diagram showing an example of the configuration of a random code generator. 2601...Shift register, 2602...Exclusive OR circuit. FIG. 7 is a block diagram showing another embodiment of the present invention. 21...Receiving antenna, 22...Phase discriminator,
23... Correlator, 24... Loop filter, 25
... Voltage controlled oscillator, 26 ... Random code generator, 27 ... Synchronization maintenance monitoring device, 28 ... Phase corrector, 221, 222 ... Correlator group, 223, 2
24...Switch group, 228, 229...Correlation level detector, 227...Subtractor.

Claims (1)

[Claims for Utility Model Registration] In a synchronization device that performs synchronization control by controlling the phase of a random code based on a correlation value between a random code from a random code generator and a random code of a received signal, a (2n+1) sequence (n is a natural number); a main correlator that correlates the random code of the center sequence with the received signal; and a main correlator that correlates the random code of the center sequence with the received signal; A first correlator comprising n correlators that correlates each of the n sequences of random codes up to the received sequence with the received signal.
a group of correlators; calculate the correlation between each of the n sequences of random codes, from the sequence with the most delayed phase among the sequences to the sequence whose phase is (n-1) bits ahead of that sequence, and the received signal; A second correlator consisting of n correlators
a correlator group; when the output of the main correlator is larger than the correlator output of either of the first and second correlator groups, the center sequence is output from each of the first and second correlator groups; The correlator output that takes the correlation for the phase sequence closest to and means for selecting one of the correlator outputs and outputting the selected correlator output as the correlation value when the correlation value is also small.