JPS63160387A - Semiconductor light emitting element and manufacture therefor - Google Patents

Abstract

PURPOSE:To obtain the high coupling efficiency as an LED when this element is combined with a single mode fiber by providing an optical absorption layer formed by ion-implanting into only a one side facing a light emission end plane. CONSTITUTION:A block layer having three layers; a P-InP 1, an N-InP 2, and the P-InP 3 is formed on the P-InP layer 1 after forming P-InP 1 on a P-InP substrate 20. And a covering with a film of SiO2 21 as well as a V-shaped groove etching stripe pattern are formed and an etching mask consisting of SiO2 21 is formed. Then an etching treatment is carried out with HCL and a mixing liquid of H3PO4 and a V-shaped groove 23 is formed. And then SiO2 21 is removed and the P-InP 4, a P- InGaAsP 5, and the N-InP 6 are formed as a clad layer, as an active layer, and as the clad layer respectively. An N-InGaAsP 7 formed on the N-InP 6 acts as a cap layer. The P-InGaAsP 5 of the active layer is a part of the V-shaped groove 23 and is situated between the N-InPs 2. Further, in addition to vaporization of AuGeNi 9 on the P-InGaAsP 7, AuZn 8 is vaporized at the P-InP substrate 20 side and an alloy layer is formed by heat treatment. Eventually, oxygen ion is implanted in a semiconductor and an ion-implantation part 25 is formed. The formation of crystal disorder and a lowering of band gap due to the ion implantation product an optical absorption effect developed inside the crystal.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor light emitting device for optical communication or information processing, and a method for manufacturing the same.

(Conventional technology) Conventional technology, IEEE transaction-on-electron device, IEEE TRANSACT'ION
ON ELE-CTR0N DEVICES, VO
I,,ED-30,N14. APRRIL.

1983. P354-359 (Processing of important electronic devices.

April 1983 1kL4. ED-30, page 354
Figures 3 and 4 (circle A in Figure 3) show the structure of the InGaAsP active layer P-based edge-emitting diode shown in
(Enlarged view of part) K is shown.

The manufacturing method of the edge-emitting diode shown in FIGS. 2 and 3 will be described below. That is, first, n-I is deposited on the n-InP substrate 11 by a liquid phase epitaxial method.
nP12, InGaAsP13, P-InP1
4°P-InGaAsP 15 is grown in this order.

Next, a stripe with a width of 50 ttm and a length of 300 ttm was etched on the P-InGaAsP 15.
Form as shown.

Furthermore, %AuZn16 was converted into P-In by the 1 lift-off method.
Deposit on strips of GaAsP 15. Immediately after this, P-InGaAs15 and AuZn1 were heat treated.
An alloy layer of No. 6 is formed. Finally Ti17 and Au1
8t - Deposit in this order.

Here, InGaAsP 13 is an actual light emitting region and is called an active layer. Also, P-InG
aAsP15 is a cap layer for obtaining good ohmic contact with AuZn16, which is the P-side utility pole metal.

(Problems to be Solved by the Invention) However, the edge light emitting diode obtained by the above manufacturing method has an effective light emitting area width of 50 μm at the edge surface.
Therefore, when coupled with a single mode fiber, for example, a core diameter of 9 μmφ, the coupling efficiency is significantly reduced.

On the other hand, in order to achieve high coupling efficiency between a single mode fiber and an LED (light emitting diode), and to reduce the width of the effective light emitting area at the end face to 2 μm or less with a similar device structure, the width of the utility pole strug must be 2 μm or less. Must not be.

However, forming utility pole strugs of 2 μm or less using the lift-off method or etching method for utility pole metals containing Au as the main component requires the formation of a resist film to achieve lift-off, resist temperature control during electrode formation, and contact between utility pole metal and semiconductor. At the same time, there was a problem in that it required careful attention to the cleanliness of the parts and that reproducibility in manufacturing was difficult.

(9) When the light emitting region is narrowed, the injection current density increases, the stimulated radiation component increases, and if an optical resonator is formed in the semiconductor light emitting device, laser oscillation occurs.

In order to use this rounded LED as an LED, there was a problem in that an element structure that does not form an optical resonator must be provided to the semiconductor light emitting element.

This invention solves the problems of the above-mentioned prior art.
When coupled with a single-mode fiber, the coupling efficiency decreases significantly, the structure is difficult to reproduce during manufacturing, and when used as an LED, it is difficult to create an element structure that does not form an optical resonator. The object of the present invention is to provide a semiconductor light emitting device and a method for manufacturing the same that solve the problems that need to be provided.

(Means for Solving the Problems) The present invention is a semiconductor light emitting device in which a light absorbing layer is provided by ion implantation only on one side facing the light emitting end face.

Further, in the method for manufacturing a semiconductor light emitting device of the present invention,
P-InP, n-InP, P-InP on the substrate
After forming a V-groove in the InP K block layer, a step of sequentially forming a P-InP cladding layer, a P-InGaAsP active layer, and an n-InP cladding layer and forming a cap layer, and a step of forming a metal layer and a Ti/Ti layer on the cap layer side. This method introduces a process of implanting ions into one end face of the element through Pt/Au.

(Function) According to the present invention, since the semiconductor light emitting device is configured as described above, the light absorbing layer absorbs the light generated inside the crystal and prevents reflection at the end facets. Problems can be removed.

Further, according to the present invention, since the above-described steps are introduced in the method for manufacturing a semiconductor light emitting device, ion implantation generates disorder in the semiconductor lattice crystal, and this crystal disorder creates a deep energy level inside the crystal. and lower the hand gear lugs of the crystal to absorb light as it occurs inside the crystal.

(Example) Hereinafter, an example of a semiconductor light emitting device of the present invention and a method for manufacturing the same will be described based on the drawings.

FIG. 1(a) to FIG. 1(f) are process explanatory diagrams of one embodiment of this manufacturing method.

First, as shown in FIG. 1(a), a P-InP substrate 20
On top, by liquid phase epitaxial method, epitaxial thickness 0.5 μm, P = I x 101s/d
After forming P-InP 1 with an O+ Yalla concentration, an epitaxial thickness of 0.5 μ”s n =5 is formed on it.
×l N-InP2t- is formed with a carrier concentration of Q17, and then an epitaxial layer of 1.5 μm is formed on the top surface.
, P-InP 3 is grown at a carrier concentration of P = 7 x 1017/- to form a three-layer block layer.

Next, as shown in FIG. 1(b), immediately after forming this block layer, a film of SiO*21 was deposited using CVD, and a groove etching stripe pattern was formed using photorin and hydrofluoric acid. An etching mask is formed using this Si0.21.

Next, HC1 cooled to 0°C! Etching is performed using a mixed solution of 3:1 volume ratio of 3:1 and HaPO4 to form a V-groove 23 as shown in FIG. 1(C). At this time, the conditions for etching the grooves are as follows: width 22 is 1.
Must be between 5 and 2.0 μm.

Next, I) Si0.21 was removed using hydrofluoric acid, and immediately after that, as shown in Figure 1(d), P-InP4 was deposited as a cladding layer at a medium concentration
-7
3 x 1017/cd, and furthermore, as a cladding layer, n-InP6 is formed with an epitaxial thickness of 1
．． 5 μm1 Carrier concentration n: 7 x 10! 77'
Formed with t-.

On this n-InP6, an epitaxial thickness of 0.7 μm is formed.
.

n-InGa with carrier concentration n-I x 10”/i
As P7 is formed. This n-InGaAsP7 is the ninth cap layer to obtain good ohmic contact.

Note that P-1nGaAsP5 in the active layer is @1.511m
, the thickness is about 0.1 μm, and its formation position is shown in Figure 1(d).
As is clearer, in the V groove 23, n-InP2
Must be located between O.

Further, as shown in FIG. 1(e), AuGe was deposited on the epitaxial surface, that is, the
At the same time as N1Q is deposited, AuZn3 is deposited on the P-InP substrate 20 side. Thereafter, heat treatment is performed to form an alloy layer.

Next, on this alloy layer, Tf/Pt/Au 10 A and 10 B are deposited next to wire bond and die bond to form electrodes.

Next, a chip is formed by one arm opening, mounted on a die, and wire-bonded to form a device.

Finally, as shown in FIG. 1(f), this elementized q
! For example, oxygen ions (0") 24 are injected into the semiconductor to a depth of about 1 μm from a direction perpendicular to the end surface of the r-element at a concentration of 4 x 10"/cII and an energy of 300 KeV.
m implantation to form an ion implantation portion 25t.

In this way, a semiconductor light emitting device as shown in FIG. 2 is manufactured. By implanting the ions 24, for example, some of the atoms constituting the crystal are ejected from the regular lattice points and enter the lattice interruption positions, leaving lattice vacancies in their wake, resulting in lattice defects and A lump, a disorder of crystals, is formed.

This crystal disorder forms deep levels inside the crystal and at the same time lowers the effective band gap of the crystal. This crystal disorder and band gap reduction cause an absorption effect of the next light generated inside the crystal.

As a result, light is no longer reflected at the end face, and no resonator for the t-th light that emits laser light is formed. Therefore, the light emitted within the semiconductor is not amplified, and the light emitted from the end face becomes light with a non-uniform phase mainly composed of spontaneous light emission components. In other words, this semiconductor light emitting device is an LED.
becomes.

In addition to oxygen, the m-class ions to be implanted include hydrogen, beryllium, silicon, argon, and other ions that disturb the crystal structure and cause a deep level inside the crystal and a decrease in the effective energy breadth. If so, both can be used.

(Effects of the Invention) As explained in detail above, according to the semiconductor light emitting device of the present invention, since the light absorption layer is provided by ion implantation only on one side facing the light emitting end face, it is possible to form a light absorption layer by ion implantation. When combined, high combining efficiency can be obtained as a KLED.

Furthermore, since the current confinement structure is a Pn junction reverse bias type using vlN, the width of the active surface can be set to about 1 to 2 μm.

Further, according to the manufacturing method of the present invention, the light absorption layer that suppresses laser oscillation is formed by ion implantation method instead of using a method such as a lift-off method. Depth can be easily controlled. Accordingly, it is possible to easily produce an element with good reproducibility of the light absorption layer and uniform characteristics.

[Brief explanation of the drawing]

1(a) to 1(f) are process explanatory diagrams of an embodiment of the method for manufacturing a semiconductor light emitting device of the present invention, and FIG. FIG. 3 is a perspective view of a conventional edge-emitting diode, and FIG. 4 is an enlarged view of the area marked by circle A in FIG. 3. 1, 3, 4=P-InP, 2, 6-n-InP
, 5---P-InGaAsP, 7-n-1n
GaAsP, 9”-AuGeNi, 10A,
10B”Ti/Pt/Au, 20-P-In
P substrate, 21-=5i02.22-n-InP removal width, 23-V groove, 24...Ion, 25...Ion implantation part. 0B

Claims (2)

[Claims] (1) (a) P-InP and n-In formed on the substrate
(b) a block layer formed of three layers of P and P-InP and having a V groove reaching the substrate; (b) P-InP, P-InGaAsP and n formed on the block layer to fill the V groove; - A cap layer formed via an epitaxial layer with InP; (c) An alloy layer formed on the cap layer and the P-In substrate side, respectively; (d) Only on one side facing the light emitting end surface. and a light absorption layer formed by ion implantation. (2) (a) P-InP, n-InP and P-I on the substrate
After forming a three-layer block layer by growing nP in this order, forming a V-groove in the block layer by etching, the bottom of which reaches the substrate; (b) forming P-InP to fill the V-groove; P-I
While growing nGaAsP and n-InP sequentially,
- a step of growing a cap layer of InGaAsP; (c) a step of forming an alloy layer on the substrate side and the cap layer side; (d) forming a metal layer for wire bonding on each of the above alloy layers. (e) ion implantation is performed perpendicularly to one end face of the device to form a light absorption layer; A method for manufacturing a semiconductor light emitting device, comprising: a step of forming the device.