JPS63157669A - Dc power converter - Google Patents

Dc power converter

Info

Publication number
JPS63157669A
JPS63157669A JP61302638A JP30263886A JPS63157669A JP S63157669 A JPS63157669 A JP S63157669A JP 61302638 A JP61302638 A JP 61302638A JP 30263886 A JP30263886 A JP 30263886A JP S63157669 A JPS63157669 A JP S63157669A
Authority
JP
Japan
Prior art keywords
signal
voltage
section
deviation
power converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61302638A
Other languages
Japanese (ja)
Inventor
Tadashi Shibuya
渋谷 忠士
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP61302638A priority Critical patent/JPS63157669A/en
Publication of JPS63157669A publication Critical patent/JPS63157669A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582Buck-boost converters

Landscapes

  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To achieve high efficiency, by constituting a DC power converter where a voltage dropping section to drop DC input voltage and a boosting section to boost it are provided. CONSTITUTION:A DC power converter is made up of a main circuit section A and a control circuit section B. The main circuit A is composed of a voltage dropping section C comprising a transistor (hereinafter referred to as Tr) 9a, a reactor 11 and the 1st diode 12a and of a boosting section D comprising a Tr 9b, the 2nd diode 12b and the abovementioned reactor 11. On the other hand, the control circuit section B is equipped with the 1st-2nd control loops E and F and composed of matching circuits 16a-16d, the 1st-the 2nd voltage control amplifiers 17a-17b, a triangular wave generator 18, the 1st and the 2nd comparators 19a-19b and the 1st-the 2nd gate circuits 20a-20b. In voltage dropping mode, the output voltage V2 is controlled to drop by ON-OFF controlling the Tr 9a with the 1st control loop E, while in boosting mode, it is controlled to boost by ON-OFF controlling the Tr 9b (N.B.: Tr 9a is kept on turning ON.) with the 2nd control loop F.

Description

【発明の詳細な説明】 A、産業上の利用分野 本発明は電力変換装置に係り、特に直流電圧のつ 降圧とη1圧の双方を可能にした直流TLw:、変換装
置に関するらのである。
DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a power conversion device, and more particularly to a DC TLw converter that is capable of converting both a DC voltage step-down and an η1 voltage.

B9発明の概要 本発明は、直流に入ノJm圧をオンオフ制御して向直出
力電圧を降圧又は昇圧ずろ電力変換装置において、 前記電力変換装置に降圧部と昇圧部を併設し、これらの
降圧部と昇圧部を制御することにより、回路損失が少な
く、高効率の直流電圧変換装置を得ることができる。
B9 Summary of the Invention The present invention provides a power conversion device that steps down or steps up the direct output voltage by on/off controlling the inlet Jm voltage of the DC, and the power conversion device is provided with a step-down section and a step-up section, By controlling the booster section and the booster section, it is possible to obtain a highly efficient DC voltage converter with little circuit loss.

C6従来の技術 従来の直流電圧の変換装置においては、電圧を下げろ降
圧時と電圧を上げる昇圧時には、例えば、第3図および
第4図に示す如く別々の装置を使用していた。
C6 PRIOR TECHNOLOGY In conventional DC voltage converters, separate devices are used for lowering the voltage and boosting the voltage, as shown in FIGS. 3 and 4, for example.

第3図は電圧を下げるための降圧チョッパの主回路であ
って、1は直流入力に設けられトランジスタ等からなる
スイッチング部、2はスイッチング部lの出力後に接続
された直流リアクトル、3は回り込み防止用のダイオー
ド、4は直流出力後に設けられたコンデンサである。第
3図のチョッパにおいてスイッチング部1にオンオフ動
作を行、わUoることにより入力電圧■1に対して出力
電圧■、は降圧される。
Figure 3 shows the main circuit of a step-down chopper for lowering the voltage, in which 1 is a switching section that is provided at the DC input and consists of transistors, etc., 2 is a DC reactor connected after the output of the switching section 1, and 3 is a loop prevention circuit. The diode 4 is a capacitor provided after the DC output. In the chopper shown in FIG. 3, the switching section 1 is turned on and off, whereby the output voltage (2) is stepped down relative to the input voltage (1).

第4図は電圧を上界させるための昇圧チョッパを示し、
直流入力側に直流リアクトル2が接続され、このリアク
トル2に対してダイオード3を直流に接続するとともに
、リアクトル2とダイオード3の接続点と電源負極間に
スイッチング部lが接続されている。第2図のチョッパ
においては、スイッチング部lをオンオフさせることに
より、出力電圧v2は入力電圧Vlに対して降圧される
Figure 4 shows a boost chopper for raising the voltage.
A DC reactor 2 is connected to the DC input side, a diode 3 is connected to DC to the reactor 2, and a switching unit 1 is connected between the connection point between the reactor 2 and the diode 3 and the negative electrode of the power supply. In the chopper shown in FIG. 2, the output voltage v2 is lowered with respect to the input voltage Vl by turning on and off the switching section l.

D9発明が解決しようとする問題点 従来の電力変換方式では、降圧回路と昇圧回路とが別々
の回路構成をとらなければならないため、使用目的に応
じて回路を選定しなければならず、これらの回路の各々
における電力の損失が多くなるとともに、効率の低下を
きたす欠点があった。
D9 Problems to be Solved by the Invention In the conventional power conversion system, the step-down circuit and the step-up circuit must have separate circuit configurations, so the circuits must be selected depending on the purpose of use. This has the disadvantage that power loss in each circuit increases and efficiency decreases.

E1問題点を解決するための手段 本発明は、上述の問題点に鑑みてなされたもので、直流
入力電圧をオンオフして直流出力電圧を降圧する第1の
スイッチング部を備えた降圧部と、前記直流入力電圧を
オンオフして前記直流入力電圧を昇圧する第2のスイッ
チング部を有する昇圧部と、前記直流出力電圧信号を検
出して得た検出電圧信号と設定電圧信号とにより第1の
偏差信号を得、該第1の偏差信号と三角波電圧信号とに
よる第2の偏差信号を基準信号と比較して得られる第1
のゲート信号により前記第1のスイッチング部を制御す
る第1の制御ループと、前記第1の偏差信号と前記設定
電圧信号による第3の偏差信号を得、該第3の偏差信号
を反転した反転信号と前記三角波電圧信号のピーク値に
よる第4の偏差信号と前記基賭電圧信号と比較して得た
第2のゲート信号により前記第2のスイッチング部を制
御する一第2の制御ループによって構成した直流電力変
換装置を提供ずろものである。
E1 Means for Solving Problems The present invention has been made in view of the above-mentioned problems, and includes a step-down section including a first switching section that turns on and off the DC input voltage and steps down the DC output voltage; A step-up section having a second switching section that boosts the DC input voltage by turning on and off the DC input voltage, and a detection voltage signal obtained by detecting the DC output voltage signal and a set voltage signal to generate a first deviation. A first deviation signal obtained by obtaining a signal and comparing a second deviation signal between the first deviation signal and the triangular wave voltage signal with a reference signal.
a first control loop that controls the first switching section using a gate signal; a third deviation signal obtained from the first deviation signal and the set voltage signal; and an inversion of the third deviation signal. a second control loop that controls the second switching unit by a second gate signal obtained by comparing the signal and a fourth deviation signal based on the peak value of the triangular wave voltage signal with the base voltage signal; The present invention provides a DC power converter with

F、実施例 以下に本発明の実施例を第1図〜第2図によって説明す
る。
F. EXAMPLE An example of the present invention will be described below with reference to FIGS. 1 and 2.

第1図はこの実施例による直流電力変換装置の回路も′
4成を示すもので、この直流電力変換装置は、本質的に
、主回路部Aと制御回路部B厚らなる。
Figure 1 also shows the circuit of the DC power converter according to this embodiment.
This DC power converter essentially consists of a main circuit section A and a control circuit section B.

主回路部へにおいては、正極入力端子5にコレクタ7[
極を接続したトランジスタ9aからなる第1のスイッチ
ング部10aと、トランジスタ9aのエミッタ電極に直
流接続されたりアクドル11と、トランジスタ9aのエ
ミッタ電極とりアクドル11との接続点にカソード電極
が接続されアノード電極が負極入力端子6側に接続され
た第1のダイオード12aによって降圧部Cが構成され
る。また、10bはトランジスタ9bからなる第2のス
イッヂン・グ部、12bは第2のダイオードである。リ
アクトル11にはダイオード12bのアノード電極が接
続され、リアクトル11とダイオード12bの接続点に
はトランジスタ9bのカソード電極が接続され、トラン
ジスタ12bのエミッタ電極は負極入力端子6側に接続
されている。したがって、リアクトル11.第2のスイ
ッチング部10bおよび第2のダイオード12bによっ
て昇圧部りが構成される。13はコンデンサである。
To the main circuit section, the positive input terminal 5 is connected to the collector 7 [
A first switching unit 10a consisting of a transistor 9a with its poles connected, a DC-connected adle 11 to the emitter electrode of the transistor 9a, and a cathode electrode connected to the connection point between the emitter electrode of the transistor 9a and the adle 11, and an anode electrode. A step-down section C is constituted by the first diode 12a connected to the negative input terminal 6 side. Further, 10b is a second switching section consisting of a transistor 9b, and 12b is a second diode. The anode electrode of the diode 12b is connected to the reactor 11, the cathode electrode of the transistor 9b is connected to the connection point between the reactor 11 and the diode 12b, and the emitter electrode of the transistor 12b is connected to the negative input terminal 6 side. Therefore, reactor 11. The second switching section 10b and the second diode 12b constitute a boosting section. 13 is a capacitor.

制御回路部Bは第1の制御ループEと第2の制御ループ
Fとから構成されている。第1の制御ループEは、出力
電圧検出器14.第1の基ω電圧設定器15.突合仕回
路IGa、16b、第1の電圧制御増幅A:i 178
.三角波発生器18.第1の比較器19aおよび第1の
ゲート回路20aによって構成される。また、第2の制
御ループFは、突合せ回路16c、16d、第2の電圧
制御増幅器17b、第2の比較回路19bおよび第2の
ゲート回路20bによって構成される。
The control circuit section B is composed of a first control loop E and a second control loop F. The first control loop E includes an output voltage detector 14. First base ω voltage setter 15. Matching circuit IGa, 16b, first voltage controlled amplification A:i 178
.. Triangle wave generator 18. It is composed of a first comparator 19a and a first gate circuit 20a. Further, the second control loop F includes matching circuits 16c and 16d, a second voltage control amplifier 17b, a second comparison circuit 19b, and a second gate circuit 20b.

次に、上記手1が成の電力変換装置における降圧動作及
び昇圧動作について第1図と第2図を参照して説明する
Next, the step-down operation and step-up operation in the above-mentioned one-way power converter will be explained with reference to FIGS. 1 and 2.

降圧モードの場合は、出力電圧検出器14の検出信号S
1と電圧設定器15の設定電圧信号Vsを突合せ回路1
6aに入力して突き合せ、この偏差値を第1の電圧制御
増幅器で増幅する。増幅された偏差信号S、を突き合せ
回路16bで三角波発生回路18からの三角波信号S、
と突き合せ、その偏差信号を第1の比較器(CP +)
 l 9 aで比較して信号S4を得る。信号S4を°
第1のゲート回路(GCI)20aに人力してそのゲー
ト信号S5によりトランジスタ9aをオンオフ動作させ
て出力電圧V、を降圧制御する。
In the case of step-down mode, the detection signal S of the output voltage detector 14
1 and the setting voltage signal Vs of the voltage setting device 15.
6a and are compared, and this deviation value is amplified by the first voltage control amplifier. The amplified deviation signal S is matched with the triangular wave signal S from the triangular wave generating circuit 18 by the matching circuit 16b.
and the deviation signal is sent to the first comparator (CP+).
A signal S4 is obtained by comparison at l 9 a. Signal S4 °
The first gate circuit (GCI) 20a is manually operated to turn on and off the transistor 9a according to the gate signal S5, thereby controlling the output voltage V to drop.

昇圧モードの場合は突き合せ回路16cにおいて偏差増
幅信号S、に設定電圧信号−Vsに設定電圧信号−Vs
を加算しその偏差信号S5を第2の電圧制御増幅器19
 bで反転して信号S6を得、この信号S6を第2の比
較器19bで基準信号S。
In the step-up mode, the matching circuit 16c sets the deviation amplification signal S to the set voltage signal -Vs, and sets the set voltage signal -Vs to the set voltage signal -Vs.
is added and the deviation signal S5 is sent to the second voltage control amplifier 19.
b to obtain a signal S6, and this signal S6 is converted into a reference signal S by a second comparator 19b.

と比較してゲート信号S7を得ろ。ゲート信号S7を第
2のゲート回路20bに人力してその出力信号S8によ
りトランジスタをオンオフ動作させる。
Compare with to obtain gate signal S7. The gate signal S7 is manually applied to the second gate circuit 20b, and the transistor is turned on and off by the output signal S8.

この場合、信号S2と三角波信号S3との交点かなくな
り、トランジスタ9aは連続導通にしてトランジスタ9
bのみが信号S9によりオンオフ動作して昇圧制御され
る。
In this case, there is no intersection between the signal S2 and the triangular wave signal S3, and the transistor 9a is kept in continuous conduction.
Only voltage b is turned on and off by signal S9 and boosted.

11 、発明の効果 本発明は以上の如くであって、直流入力電圧を降圧して
直流出力電圧を得る降圧部と、直流入力電圧を昇圧して
直流出力電圧を得る昇圧部を具備さU・て直流電力変換
装置を+14成したから、制御部の回路構成が簡単にし
て、回路のトータルロスが低誠し高効率で経済的な電力
変換装置を得ることができる。
11. Effects of the Invention The present invention is as described above, and includes a step-down section that steps down a DC input voltage to obtain a DC output voltage, and a step-up section that steps up the DC input voltage and obtains a DC output voltage. Since the DC power converter is made up of +14, the circuit configuration of the control section is simplified, the total loss of the circuit is low, and a highly efficient and economical power converter can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例に係る直流電力変換装置の回路
図、第2図(A)〜(C)はその動作説明図、第3図お
よび第4図はそれぞれ従来の直流電力変換装置の回路図
である。 9a・・・第1のトランジスタ、10a・・・第1のス
イッチング部、9b・・・第2のトランジスタ、tab
・・・第2のスイッチング部、11・・・リアクトル、
112゜12b・・・ダイオード、14・・・電圧検出
器、15・・・第1の電圧設定器、lea〜16d・・
・突き合せ回路、17a、17b・・・電圧制御増幅器
、18・・・三角波発生回路、19a、19b=・・比
較器、20 a、20 b・・−ゲート回路、A・・・
主回路部、B・・・制御部、E・・・第1の制御ループ
、F・・・第2の制御ループ。 第3図 第4図
FIG. 1 is a circuit diagram of a DC power converter according to an embodiment of the present invention, FIGS. 2(A) to (C) are diagrams explaining its operation, and FIGS. 3 and 4 are respectively conventional DC power converters. FIG. 9a...first transistor, 10a...first switching section, 9b...second transistor, tab
... second switching section, 11 ... reactor,
112゜12b...Diode, 14...Voltage detector, 15...First voltage setter, lea~16d...
- Matching circuit, 17a, 17b...voltage control amplifier, 18...triangular wave generation circuit, 19a, 19b=...comparator, 20 a, 20 b...-gate circuit, A...
Main circuit section, B... control section, E... first control loop, F... second control loop. Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 直流入力電圧をオンオフして直流出力電圧を降圧する第
1のスイッチング部を備えた降圧部と、前記直流入力電
圧をオンオフして前記直流入力電圧を昇圧する第2のス
イッチング部を有する昇圧部と、前記直流出力電圧信号
を検出して得た検出電圧信号と設定電圧信号とにより第
1の偏差信号を得、該第1の偏差信号と三角波電圧信号
とによる第2の偏差信号を基準信号と比較して得られる
第1のゲート信号により前記第1のスイッチング部を制
御する第1の制御ループと、前記第1の偏差信号と前記
設定電圧信号による第3の偏差信号を得、該第3の偏差
信号を反転した反転信号と前記三角波電圧信号のピーク
値による第4の偏差信号と前記基準電圧信号と比較して
得た第2のゲート信号により前記第2のスイッチング部
を制御する第2の制御ループによって構成したことを特
徴とする直流電力変換装置。
a step-down section including a first switching section that turns on and off the DC input voltage to step down the DC output voltage; and a step-up section that has a second switching section that turns on and off the DC input voltage to step up the DC input voltage. , a first deviation signal is obtained from the detection voltage signal obtained by detecting the DC output voltage signal and the set voltage signal, and a second deviation signal from the first deviation signal and the triangular wave voltage signal is used as a reference signal. a first control loop that controls the first switching unit using a first gate signal obtained by comparing; a third deviation signal based on the first deviation signal and the set voltage signal; A second gate signal that controls the second switching unit by a second gate signal obtained by comparing an inverted signal obtained by inverting the deviation signal of the first deviation signal, a fourth deviation signal based on the peak value of the triangular wave voltage signal, and the reference voltage signal. A DC power converter comprising a control loop.
JP61302638A 1986-12-18 1986-12-18 Dc power converter Pending JPS63157669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61302638A JPS63157669A (en) 1986-12-18 1986-12-18 Dc power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61302638A JPS63157669A (en) 1986-12-18 1986-12-18 Dc power converter

Publications (1)

Publication Number Publication Date
JPS63157669A true JPS63157669A (en) 1988-06-30

Family

ID=17911391

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61302638A Pending JPS63157669A (en) 1986-12-18 1986-12-18 Dc power converter

Country Status (1)

Country Link
JP (1) JPS63157669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0363078U (en) * 1989-10-25 1991-06-20

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0363078U (en) * 1989-10-25 1991-06-20

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