JPS6315582A - Video signal drop-out compensating circuit - Google Patents

Abstract

PURPOSE:To completely compensate drop-out by providing a drop-out detecting circuit, a delay circuit which delays a video signal after time base correction, and a switching circuit and detecting drop-out with respect to the video signal, which has the time base corrected, to eliminate the lag of drop-out compensation. CONSTITUTION:A drop-out detecting circuit 54 detects drop-out of the video signal which has the time base corrected on a line 28. The drop-out detection signal is applied to one input of each of AND gates 56 and 58, and a signal obtained by inverting the output of a delay circuit 53 by an inverter 59 and the output of a delay circuit 53 are applied to the other inputs as they are. The output of the AND gate 56 controls switching of a switch 40, and the output of the AND gate 58 controls switching of a switch 32. Since the presence or the absence of drop-out is detected in the video signal, which has the time base corrected, and an alternate signal for compensation is taken from the signal which has the time base corrected in this manner, drop-out parts do not remain at all after drop-out compensation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drop-out compensation circuit for video signals, specifically composite color television signals.

[Conventional technology]

Signals reproduced from a VTR have unevenness in the time axis, dropouts, and additional noise. Dropout compensation is performed analogously or digitally at the same time as time axis correction in the video signal's time axis correction circuit. is described in various documents, and as a noise reduction circuit,
A circuit that improves the S/N by focusing on the correlation between adjacent scanning lines or between fields or frames is known (for example, Japanese Patent Laid-Open No. 56-40380).

In addition, due to the recent reduction in the price of digital elements and the ease of signal processing after digitization, both the time axis correction circuit and the noise reduction circuit have been implemented as digital circuits.

[Problem that the invention seeks to solve]

Drop-out compensation replaces missing/dropped parts of a video signal with a signal that approximates it, but it is also a circuit that performs drop-out compensation in a circuit that digitally processes video signal time axis correction and noise reduction. In this case, drop outs were detected in the analog signal stage before time axis correction, and drop outs were actually compensated for in the digital signal stage after time axis correction. In this case, depending on the time axis difference at the analog signal stage, signal replacement measures may be performed at a time different from the actual dropout point, and the dropout may not be completely compensated for. arise.

The present invention therefore aims to provide a circuit that fully compensates for dropouts.

8-1 [Solve the problem? ττh] The video signal dropout compensation circuit according to the present invention is
A drop out detection circuit that detects a drop out from video No. 13 after time axis correction; a delay circuit that substantially delays the video signal after time axis correction by a predetermined scanning line; and the drop out detection circuit. and a switching circuit that responds to a drop-out detection signal from the video signal and switches the drop-out portion of the video signal to a signal of another scanning line by the delay circuit.

[Operation] With the above configuration, in the present invention, drop-out detection is performed on a time-axis corrected video signal, so drop-out compensation based on the detection signal is temporally shifted. Therefore, no drop-out compensation failure occurs.

〔Example] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a video signal digital processing circuit in which an embodiment of the drop-out compensation circuit according to the present invention is incorporated into a noise reduction circuit. For example, 10 is V
This is an input terminal for analog video signals reproduced from a TR or the like. The video signal is converted into a digital signal by the A/D converter 12, and the i2H line/digital signal is used for time axis correction.
The data is input to the memory 14. A color burst signal and a horizontal synchronization signal synchronized with the video signal input to the terminal 10 are supplied to the terminals 16 and 18, respectively, and the color burst signal is manually inputted to an AF'C circuit 20, which is well known in VTRs, etc.
Similarly, the horizontal synchronization signal is sent to AFC via the well-known AFC circuit 22.
It is input to the PC circuit 20. As a result, the APC circuit 20 outputs a timing signal synchronized with the color burst signal and the horizontal synchronization signal, and the output of this APC circuit 20 controls the timing of the A/D conversion 2S12 and also controls the writing ( W) Control the address counter 24 to control writing of the digital video signal to the memory 14. 26 is a crystal oscillator that oscillates stably, and its output controls the read (R) address of the memory 14 to output a digital video signal with a constant time axis onto line 28.

30 is a successive address counter.

The circuits 20, 22, 24, 26, 30 and the line memory 14 constitute a time base correction circuit, the structure and operation of which are already known.

Line 28 is connected to a terminal 32a of a flow path selector switch 32, and its common pole 32c is connected to the input of a multiplier 34 for a multiplication factor. Pole 32c of switch 32 and second terminal 32
A 2H delay circuit 36 is connected between the output terminal and the output terminal b. The multiplication coefficient of the multiplier 34 can be freely controlled in the range from 0 to 1 by an external control signal, and its output is supplied to the adder 38. Although the details will be described later, the adder 38 has approximately 1
A signal obtained by multiplying the video signal of the previous field by (1-k) is manually input. As a result, the adder 38 outputs a video signal with reduced noise. Details of this noise reduction are described in the aforementioned Japanese Patent Laid-Open No. 56-40380.

The output of the adder 38 is the first terminal 4 of the flow path changeover switch 40.
0a, and its common pole 40C is connected to capacitor jt262 H (
(corresponding to one field) is connected to the input of the field memory 42. The output of the memory 42 is connected to the second terminal 40b of the switch 40. This memo 1J42 functions as a delay circuit of some kind, but it is not a field memory (or may be a so-called frame memory that stores data equivalent to one frame. The capacity of the memory 42 is
Although it is preferable that the output be an odd number H, a chroma signal inversion circuit will be required at an appropriate location in the circuit that uses the output. The output of this memory 42, that is, the video signal 262H before the video signal on the line 28 is the D/
The A converter 44 converts the signal back to an analog signal.

The output of the memory 42 is multiplied by a multiplication coefficient (1-k) corresponding to the multiplication coefficient k of the multiplier 34 by an externally controllable multiplier 46, and then input to the input of the adder 38 (co-fed). Ru.

The subtraction circuit 48 successively compares the output of the memory 42 and the signal from the pole 32c of the switch 32 (i.e., the time-base corrected signal on the line 28) over time, and generates a signal indicating the absolute value of the instantaneous difference. Output. The subtraction circuit 50 is connected to line 2
The signal on line 8 is compared with the output of delay circuit 36 (signal 2H before the signal on line 28), and a signal indicating the absolute value of the instantaneous difference is output. The subtraction circuit 48 indicates, so to speak, the degree of image movement or correlation between fields, while the subtraction circuit 50 indicates the degree of correlation between 2H different adjacent scanning lines within a field. The output of the subtracter 48 is
It is applied to the control inputs of multipliers 34 and 46 and used to determine the coefficients.

The comparison circuit 52 compares the outputs of the subtraction circuit 48 and 50,
A binary code (high or low) indicating whether the correlation is stronger between adjacent scanning lines or between fields is output.

The output of the comparison circuit 52 is delayed by IH in the delay circuit 53.

54 is a dropout detection circuit that detects dropout of the time-base corrected video signal on line 28. The drop out detection signal is applied to one input of AND gates 56 and 58, and a signal obtained by inverting the output of delay circuit 53 by inverter 59 is applied to the other input of AND gate 56. gate 58
The output of the delay circuit 53 is applied as is to the other input of the delay circuit 53. The output of AND gate 56 controls the switching of switch 40 and the output of AND gate 58 controls the switching of switch 32.

When the dropout detection circuit 54 is outputting a dropout detection signal, the correlation between adjacent scanning lines within a field is stronger than the correlation between fields at a time before IH (the output of the subtraction circuit 50 is 48), the output of AND gate 58 is
The terminal 32b of the switch 40 is connected to the common pole 32c, and the output of the AND gate 56 connects the terminal 40a of the switch 40 to the common pole 40.
Connect to c. In the opposite case, terminal 3 of switch 32
2a is connected to the common pole 32c, and the terminal 40 of the switch 40
b connects to 140c.

Next, the operation of the circuit shown in FIG. 1 will be explained, particularly focusing on the draw knob out function. FIG. 2 illustrates several scan lines of two consecutive fields. The video signal at the terminal 10 is converted into a digital signal by the A/D conversion circuit 12, and after time axis correction by the time axis correction circuit consisting of circuits 14, 20, 22, 24, 26, 30, the signal is sent on line 28. are output sequentially.

Now, scan line i of field #2 is on line 28,
Assume that a dropout has been detected in the scanning line i. At the time scan line i is on line 28, memory 4
2 to the subtraction circuit 48, and the inverting input of the subtraction circuit 50 receives the scan '! from the delay circuit 36. t3 i -2 is supplied.

Therefore, the comparison circuit 52 compares the scanning line i and the scanning line 1-262.
The degree of correlation (output of the subtraction circuit 48) between scanning line i and scanning line i-2 is compared with the degree of correlation C'lli (output of the calculation circuit 50) between scanning line i and scanning line i-2, and the one with the larger correlation is indicated. Outputs a signal to

However, because of the IH delay circuit 50, the AND gates 56 and 58 actually use the previous scanning line i3. i263. This is a selection instruction signal indicating a similar comparison result between i-1.

The IH delay circuit 50 is provided in this way because the scanning line i
Since there is a dropout in itself, it cannot be used as a signal to check the degree of correlation.Therefore, it is difficult to determine whether the degree of correlation is greater between adjacent scanning lines within a field or between fields. This is to make a judgment based on the normal signal.

When the intra-field correlation is strong, terminal 32b of switch 32 connects to pole 32c and terminal 4 of switch 40 connects to pole 32c.
Since 0a is connected to pole 40C, the output of delay circuit 36 (
The signals of adjacent scan lines separated by 2H) are supplied as substitute signals to the memory 42 and thus to the D/A converter 44. When the correlation between the fields is stronger, the output of the memory 42 is re-inputted into the memory 42 because the terminal 32a of the switch 32 is connected to the pole 32c and the terminal 40b of the switch 40 is connected to the pole 40c.

FIG. 3 shows another embodiment of the invention. The same members as in FIG. 1 are given the same reference numerals. In this example, the field memories 42 include a 2H memory 42A and a 260H memory 42.
Either the output of the memory 42A or the output of the memory 42B is selectively returned to the input side of the memory 42A, and an alternative signal for drop-out compensation is switched. For this switching, a switch 70 switches between the output of the memory 42A and the output of the memory 42B.
The first terminal 70a is connected to the output j of the memory 42B, and the second terminal 70b is connected to the memory 42A and the memory 4.
2B, and its common pole 70c is connected to the switch 40.
Connect to terminal 40b of. Further, the output of the delay circuit 53 directly controls the switching of the switch 70, and the output of the dropout detection circuit 54 directly controls the switching of the switch 40.

In this embodiment, when a drop-out is detected on scan line i on line 28, if the correlation between adjacent scan lines is strong, terminal 70b of switch 70 connects to pole 70C and drops out. - Since the out detection signal connects the terminal 40b of the switch 40 to the pole 40C, the contents of the memory 42A are re-inputted to the memory 42A.

If the correlation between fields is stronger, switch 70
Since the terminal 70a of the memory 42B is connected to the pole 70C,
The contents (signal of one field before) are re-inputted into the memory 42A.

Furthermore, in terms of -i, it is considered that signals from the corresponding positions in the field memory 42 or frame memory have a stronger correlation than adjacent scanning lines, so the output of the memory 42 is dropped as the system default state. It is best to initialize it so that it is used as an alternative signal when out. In this sense, there is no need to constantly compare the degree of correlation within a field and the degree of correlation between fields or frames; it is also possible to select which signal to replace depending on the degree of correlation of one of them.

Therefore, in order to reduce the noise, we focused on controlling the coefficient k of the multiplier 34.46 using the inter-field or inter-frame correlation signal, omitted the subtraction circuit 50, and removed the comparison circuit 5.
2 may be configured to compare the output of the subtraction circuit 48 with a constant reference voltage. In that case, it goes without saying that the delay circuit 53 may be connected to the input side of the comparison circuit 52 instead of the output side.

In a highly standardized signal such as a television signal, depending on the degree of correlation between fields, it is possible to select either the video signal of the previous field or the signal of the adjacent scanning line within the same field as an alternative signal at the time of dropout. , more favorable results can be obtained than in the conventional example in which only one of them is always used. Incidentally, the reason why scanning lines different by 2H are used as adjacent scanning lines is that the phases of the chroma signals are the same, and if a phase inversion circuit for the chroma signals is provided, the I
It may be a scanning line with an H difference.

In the above description, the input signal of the D/A converter 44 is
Not the output side of the memory 42 but the input side, that is, the switch 4
It may be taken from the common pole 40C of 0. Further, the video signal at the terminal 10 may be a composite color television signal, only a luminance signal, a color signal, or a graphic color signal. Therefore, unless otherwise specified, video signals should be broadly interpreted as such.

In this embodiment, a signal from an adjacent scanning line within a field or a signal from a corresponding position in a previous field or frame is selectively used as a substitute signal at the time of dropout, based on the degree of correlation. Drop-out compensation can be realized.

〔Effect of the invention〕

As can be easily understood from the above description, according to the present invention,
Since the presence or absence of a dropout is detected in the video signal after time axis correction, and the alternative signal for compensation is also taken from the signal after time axis correction, there is no possibility that a dropout portion remains after dropout compensation. (This means that complete dropout compensation can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video signal digital processing circuit including a dropout compensation circuit of the present invention, and FIG. 2 is a diagram showing several scanning lines of a video signal in two consecutive fields. , FIG. 3 is a configuration diagram showing another embodiment of the present invention. This is a diagram. l〇-Video signal input terminal 12-A/D converter 1
4-2H memory 16- Color burst signal input terminal 18-Horizontal open jtJ] signal input terminal 2O-AP C
Circuit 22--AFC circuit 24-Write address counter 30-Continuous address counter 32--Successful address counter 34-Multiplier 36-Delay circuit 38--Adder 40--Switch 42--Field memory 4
4.-D/A converter 46-Multiplier 48.50-Subtraction circuit 52--Comparison circuit 53--Delay circuit 54
- Drop out detection circuit 56.58・-AND gate 59- Inverter 70- Switch

Claims (1)

[Claims] a dropout detection circuit that detects a dropout from a video signal after time axis correction; a delay circuit that substantially delays the video signal after time axis correction by a predetermined scanning line;
A switching circuit that responds to a dropout detection signal from the dropout detection circuit and switches a dropout portion of the video signal to a signal of another scanning line by the delay circuit. drop·
out compensation circuit.