JPS63155819A - Base drive circuit - Google Patents

Abstract

PURPOSE:To enable the high-speed switching of a single type power transistor by driving respective transistors by using the output of a high-speed photocoupler to supply a forward/reverse bias base current. CONSTITUTION:If an input signal is inputted to the input terminals 1, 2 of the high-speed photocoupler 71, said 71 is turned on, transistor TR 31 turns on, and Tr 35, Tr 36, and power MOSFET 41 are sequentially turn on, and a forward bias base current flows from the positive terminal 3 of power supply through the FET 41 and a base current limiting resistor 24, and through a power transistor TR 81, base.emitter diodes 51-53, and reaches a ground terminal 4. During this process, an electric field capacitor 62 is charged to a potential equal to the forward voltage of the diodes 51-53. Inversely, if no signal is inputted to the terminals 1, 2, the coupler 71 turns off, the Tr 32 turns off, the Tr 33 on, the Tr 34 on, and also, an FET 42 turns on, accordingly, a reverse bias base current flows from the positive terminal of the capacitor 62 through the base.emitter and the FET 42, and reaches the negative terminal of the capacitor 62.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is applicable to transistor inverters, A/G, DC
-Relates to a base drive circuit for a nower transistor applied to main circuits of DC converters, switching regulators, etc.

[Conventional technology]

(Configuration) A conventional base drive circuit is shown in FIG. 3, which includes a transistor 14 connected to the power transistor 20 through a resistor 11, a transistor 13 connected to the transistor 4, and a transistor 13 connected to the power transistor 20 through a resistor 11. a photocoupler 19 connected to the base of the transistor 12 via a resistor 7, a transistor 15 connected to the power transistor 20, and two diodes connected in series to the power transistor 20. 16.17 and an electrolytic capacitor 1st, the collector of the photocoupler 19 is connected to the power supply positive terminal 3, the resistor 9 connected to the transistor 130 pace, and the resistor 10 connected to the transistor 14 base are connected, and the ground terminal 4, a resistor 8 connected to the base of the transistor 120, each emitter of the transistors 12 and 13, the collector of the transistor 15, and the diode 160.
The configuration is such that the cand and the negative terminal of the electrolytic capacitor 18 are connected. Note that 1 and 2 are input terminals of the photocoupler 19.

(Function) When a signal is input to the input terminal 1.2 of the photocoupler J9, the light receiving element of the photocoupler 19 is turned on, which causes the transistor 12 to turn on, and the transistor 13 to turn off.
, and finally the transistor 14 is turned on. As a result, the transistor 14 and the resistor 11t are connected to the power supply positive terminal 3.
Accordingly, a forward biased space current flows to the ground terminal 4 through the space emitter of the power transistor 2Q and the diode 16.17'1. At this time, the electrolytic capacitor 18 is charged to a voltage equal to the forward voltage of the diodes 16 and 17. Conversely, if no signal is input to the input terminal 1.2, the light receiving element of the photocoupler 19 is turned off.
, transistor 12 is OFF l, , transistor 13
is turned on, and finally transistor 15 is turned on, so that the current is transferred from the positive terminal of electrolytic capacitor 18 to the emitter paste of transistor 20 and transistor 15.
A reverse bias space current flows through to the negative terminal of electrolytic capacitor 18.

[Problem that the invention seeks to solve]

As mentioned above, conventional base drive circuits are commonly used with Darlington type power transistors. Therefore, when applying it to all single-type power transistors, the following should be changed. The circuit is exactly the same, but the problem is that the pace current supplied to the power transistor is generally large, from 0.5 μm (Darlington) to 10 μm (single), so the forward bias space current in the circuit and the reverse Transformer'f: 0.5 μm class transistors supplying wire space current to 10 μm class transistors. With the above changes, it can also be applied to a single type.

However, when a power transistor is used in the base drive circuit, the rise time and fall time during switching are long, so it becomes impossible to supply a pace current that enables high-speed switching to a single type power transistor, which becomes a problem. .

[Means for solving problems]

The present invention is a drive circuit that drives a single power transistor based on the output of a high-speed photocoupler, the first transistor having a collector connected to the receiver ff of the high-speed photocoupler, a second transistor in which the emitter of the light-receiving element is connected to the pace through a resistor; a third transistor in which the collector of the second transistor is connected to the pace; and a collector of the third transistor is connected to the pace through the resistor. Fourth
a fifth transistor to which the collector of the first transistor is connected via a resistor; a sixth transistor to which the collector of the fifth transistor is connected via a resistor; 'a-
a first power MO8 F'ET connected to the first /J? W-M
The source of the OS-FET is connected to the second power M via a resistor.
A single type which is connected to the drain of O8@FIT and its connection point is connected to the pace. power transistor,
A power supply for applying a reverse bias is connected by VC between the emitter of the single power transistor and the ground, and first and second power supplies for driving are provided, and the positive terminal of the first power supply is connected to the first transistor. The emitter of the first transistor, a resistor connected to the first transistor, a resistor connected to the third transistor, and the drain of the first power MOS/FET are connected, and the positive side of the second power supply is connected. A resistor connected to the emitter of the fourth transistor and the pace of the fourth transistor, and a resistor connected to the emitter of the sixth transistor and the pace of the sixth transistor are connected to the terminal, and each of the power supplies The ground terminal of the second. each emitter of the third and fifth transistors and each resistor connected to the pace of the second and fifth transistor; and the first and second power MO8.
・It has a configuration in which each resistor is connected to the dirt of the FET. Note that the first power source and the second power source may be either independent power systems or a common power source.

[Effect]

When a signal is input to the high-speed photocoupler, the first transistor turns on, the fifth transistor turns on, the sixth transistor turns on, and finally the first power MOS/FET turns on.
I, a forward bias space current is supplied to a single power transistor. Conversely, if no signal is input to the high-speed photopower f2, the second transistor is turned off and the third transistor is turned on.

The fourth transistor is ONI, and finally the second power MOS
- When the FET is ONL, a reverse bias space current is supplied to the single power transistor.

〔Example〕

(Structure) An embodiment of the present invention will be described with reference to FIGS. 1 and 2, taking a two-power supply system as an example.

Pace K with 8 single power transistors.

The first power MOS/F'ET 41 connected through the pace current limiting resistor 24t and the 1/4th power MO8@F
6th transistor 36 connected to the dart of ET 41
, the fifth transistor 35 connected to the pace of the sixth transistor 36 through the resistor 22t, the first transistor 31 connected to the pace of the fifth transistor 35 through the resistor 19t, and the first tryzoster 31. a high-speed photo coupler 71 connected to the pace; and a second power MO connected to the pace of the single type power transistor 81.
S・FET 42 2nd power MOS-FET 4
a fourth transistor 34 connected to ff-) of J;
A third transistor 33 connected to the pace of the fourth transistor 3a via a resistor 17;
, a second transistor 32 connected to the terminal of the first power supply, three series diodes 51, 52, 53 and an electrolytic capacitor 62 connected to the emitter of the single type lower transistor 81, and a positive terminal of the first power supply. 3 includes a resistor 14 connected to the emitter of the first transistor 31 and the pace of the first transistor 31;
A resistor 15 connected to the pace of the transistor 33 and the drain of the first power MOS/PET 41 are connected, and the positive terminal 5 of the second power supply is connected to the emitter of the fourth transistor 34 and the drain of the first power MOS/PET 41. A resistor 16 connected to the pace, the emitter of the sixth transistor 36, and a resistor 21 connected to the pace of the sixth transistor 36 are connected, and the ground terminal 4 is connected to the second... the respective emitters of the third and fifth transistors 32, 33°35, and the source of the second power MO8@FgT 42;
each resistor 13.20 connected to the pace of the second and fifth transistors 32.35; each resistor 23.18 connected to the dart of the first and second/#Wer MO3-FETs 41, 42; The cathode of the diode 51 and the negative terminal of the electrolytic capacitor 62 are connected. In addition.

1.2 is the input terminal of the high-speed photocoupler 71; 6. ? , and the resistor 11 and the electrolytic capacitor 61 are replaced by a high-speed photocoupler 71.
It is necessary to make it work.

(For 1 unit) When a signal is input to the input terminals 1 and 2 of the high-speed photocoupler 71, the high-speed photocoupler outputs the ONL first transistor 3.
# is ONL, the fifth transistor 35 is ONI, the sixth transistor 36 is ONL, and finally the first/#war MOS・
When the FET 47 is turned on, the first power MOB-FET 4 J and the pace current limiting resistor 24ft are connected from the first power supply positive terminal 3 to the pace emitter of the shifter type/grower transistor 81 and the diode 51.
, 52.53fI: The bottom bias space current flows to the ground terminal 4 through the ground terminal 4. In addition, at this time, the diodes 51, 5
The electrolytic capacitor 62 is charged to a voltage equal to the forward voltage of 2.53. Conversely, if no signals are input to the input terminals 1 and 2, the high-speed photocoupler 71 turns 0FFj, the second transistor 32 turns OFF l, the third transistor 33 turns on, and the fourth transistor/:) star 34 turns on, Finally the second
By turning ON the nozzle MO8 reference FET 42, the emitter paste of the single type power transistor 81 and the second nozzle MO8 are connected from the positive terminal of the electrolytic capacitor 62.
S・FET 4,? A reverse bias space current flows through to the negative terminal of electrolytic capacitor 62.

The same result can be obtained even when the first power source and the second power source are used in common.

FIG. 2 shows the waveform of the pace current obtained by the circuit of the above embodiment and the waveform of the pace current obtained by the conventional circuit. In the case of the above embodiment, since it is the power MOS/FET that supplies the pace current, the rise time and fall time are short, unlike the power transistor in the conventional case. Conventionally, the time required to rise from 0 to ON is the time indicated by Ir, ta, but in the above embodiment, the time required to rise from 0 to ON is shortened to the time indicated by b.
In the above embodiment, the time required as indicated by d is reduced to the time indicated by d. Therefore, in the above embodiment, it was possible to significantly shorten the time for the rise and fall of the pace current, which made it possible to reduce the pulse width of the pace current, thereby increasing the speed of the single-type knocker transistor. Switching becomes possible.

〔Effect of the invention〕

As described in detail above, according to the base drive circuit for a single-type 9-Wah transistor according to the present invention, the first power MOS/FET connected to the pace of the single-type Hower transistor via the pace current limiting resistor, 1
4')-MOS-F'ETC)r-), a fifth transistor connected to the pace of the sixth transistor through a resistor, and a fifth transistor connected to the pace of the fifth transistor through a resistor. A first transistor connected to the first transistor, a high-speed photocoupler connected to the first transistor pace, a second No.47-M2S-FET connected to the single type power transistor pace, and a second No.47-M2S-FET connected to the first transistor pace.
'7- 4th connected to MOS-FET Or-to
A transistor, a third transistor whose resistance is fully connected to the pace of the fourth transistor/soster, a second transistor which is connected to the pace of the third transistor, and the single type four-power transistor. It is equipped with a power supply for applying a reverse bias connected between the emitter and ground, and
The positive terminal of the m source includes the emitter of the first transistor, a resistor connected to the pace of the first transistor, a resistor connected to the pace of the third transistor, and the first power MOS. The drain of the FET is connected to the positive terminal of the second power supply, and the emitter of the fourth transistor, a resistor connected to the pace of the fourth transistor, the emitter of the sixth transistor, and the positive terminal of the second power supply are connected to the drain of the FET. The second . each emitter of the third and fifth transistors and each resistor connected to the pace of the second and fifth transistors;
By connecting each resistor to the gate of the power MOS/FET, it is possible to significantly shorten the time required to increase or decrease the pace current of a single type power transistor. ′
High-speed switching of power transistors is possible.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing the pace current waveform of the above embodiment 1 in comparison with the same waveform of a conventional circuit, and Fig. 3 is a conventional circuit diagram. It is. 1.2...Input terminal, 3,5...Plus terminal, 4.
Togeland terminals, 6, 7...Collector and emitter (output end) of single type power transistor, 11-2
3...Resistance, 24...Pace current control resistance, 31~
36...Transistor, 41.42...Power Mo
5-FET, 51, 52. , 5 J-...diode, 61°62... electrolytic capacitor, 71...
High speed hotocabura. 81...Single type power transistor.

Claims (1)

[Claims] In the base drive circuit of a single type power transistor, a first power MOS connected to the base of the single type power transistor via a base current limiting resistor.
FET, a sixth transistor connected to the gate of the first power MOS/FET, a fifth transistor connected to the base of the sixth transistor via a resistor, and a fifth transistor connected to the base of the fifth transistor via a resistor. a high-speed photocoupler connected to the base of the first transistor; a second power MOS/FET connected to the base of the single power transistor; and a second power MOS/FET connected to the gate of the second power MOS/FET. a fourth transistor, a third transistor connected to the base of the fourth transistor via a resistor, a second transistor connected to the base of the third transistor, and a connection between the emitter of the single type power transistor and ground. a power supply for applying a reverse bias, and first and second power supplies for driving, and the positive terminal of the first power supply has the first
The emitter of the transistor, a resistor connected to the base of the first transistor, a resistor connected to the base of the third transistor, and the drain of the first power MOS/FET are connected, and the positive side of the second power supply is connected. The emitter of the fourth transistor, a resistor connected to the base of the fourth transistor, the emitter of the sixth transistor, and a resistor connected to the base of the sixth transistor are connected to the terminal, and each of the power supplies The ground terminal of the second
Connecting each emitter of the third and fifth transistors, each resistor connected to the base of the second and fifth transistor, and each resistor connected to the gate of the first and second power MOS/FET. A single-type power transistor base drive circuit featuring: