JPS63152265U - - Google Patents

Info

Publication number
JPS63152265U
JPS63152265U JP4497587U JP4497587U JPS63152265U JP S63152265 U JPS63152265 U JP S63152265U JP 4497587 U JP4497587 U JP 4497587U JP 4497587 U JP4497587 U JP 4497587U JP S63152265 U JPS63152265 U JP S63152265U
Authority
JP
Japan
Prior art keywords
lead terminals
attaching
electrodes
insulating substrate
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4497587U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4497587U priority Critical patent/JPS63152265U/ja
Publication of JPS63152265U publication Critical patent/JPS63152265U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す混成集積回路
用基板の斜視図、第2図は従来の混成集積回路用
基板の斜視図である。 11,21…絶縁基板、12,22…リード端
子取付用電極、13…切り込みパターン。
FIG. 1 is a perspective view of a hybrid integrated circuit board showing an embodiment of the present invention, and FIG. 2 is a perspective view of a conventional hybrid integrated circuit board. 11, 21... Insulating substrate, 12, 22... Electrode for attaching lead terminal, 13... Notch pattern.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板と前記絶縁基板の相対する2つの縁端
部に沿い互いに対向して配列されるリード端子取
付用電極とを含んで成り、前記リード端子取付用
電極の上面にはリード端子取付位置を示す切込み
パターンがそれぞれ設けられていることを特徴と
する混成集積回路用基板。
It comprises an insulating substrate and electrodes for attaching lead terminals that are arranged opposite to each other along two opposing edges of the insulating substrate, and the upper surface of the electrodes for attaching lead terminals shows the positions for attaching the lead terminals. A board for a hybrid integrated circuit, characterized in that each cut pattern is provided.
JP4497587U 1987-03-25 1987-03-25 Pending JPS63152265U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4497587U JPS63152265U (en) 1987-03-25 1987-03-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4497587U JPS63152265U (en) 1987-03-25 1987-03-25

Publications (1)

Publication Number Publication Date
JPS63152265U true JPS63152265U (en) 1988-10-06

Family

ID=30863291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4497587U Pending JPS63152265U (en) 1987-03-25 1987-03-25

Country Status (1)

Country Link
JP (1) JPS63152265U (en)

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