JPS63152227A - Digital analog converter - Google Patents

Abstract

PURPOSE:To realize a DA converter with high resolution as a whole by adding a resistor array to a DA converter using 2-stage structure capacitor array including l-set of capacitors and m-set of capacitors increased in a binary mode. CONSTITUTION:The circuit consists of a 1st coupling capacitor Cc having a capacitance IC connected between a common connecting point of 1st capacitor arrays C1-Cl, 1 and the common connecting point of 2nd capacitor arrays Cl+1-Cl+m, 2, (l+m)-set of switches S1-S1, S1+1-S1+m, a short-circuit switch Ss short-circuiting the 2nd capacitor array 2 between the common connecting point of the 1st capacitor array 1 and the ground potential while the 2nd capacitor array 2 is under operation, resistor arrays R1-RN, 3 consisting of the series connection of 2<n> sets of unit resistors in series, whose one end is connected to ground and whose other end is connected to a potential being twice the said reference potential, and the 2nd coupling capacitor Cd having a capacitance IC connected between the output of the selector switches T1-TN and the common connecting point of the 1st capacitor array 1. Thus, the DA converter in multi-stage structure with high resolution which is coupled by plural capacitor arrays 1, 2 and the resistor array 3 and the coupling capacitors Cc, Cd is realized.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a digital-to-analog (DA) converter;
In particular, the present invention relates to a DA converter having a multistage structure in which a plurality of capacitance columns and resistance columns are mutually coupled through a coupling capacitance.

[Conventional technology]

As a circuit system for a DA converter, one that uses a capacitor string in which a plurality of unit capacitors are arranged is known, but one type of DA converter is a DA converter that uses a capacitor string with a two-stage structure in which two capacitor strings are connected. There is a converter (hereinafter referred to as a C-C type DAC).

This C-C type DAC has the advantage that it requires fewer total unit capacitances than a one-stage structure, occupies less area when integrated into an integrated circuit, and has lower manufacturing costs.

To explain the prior art, IEEE's paper ("
A Two-8tage Weighted Capa
Citor Ne-work for D/A-A/
D Conversion” (IEEEJ, 5oli
d-5tate C1rcuits, Vol.
5C-14.

PP 788-781, Aug, 1979))
and Patent Publication No. 136552/1983 "Capacitor circuit type signal conversion device", Wynis Y (y, s).

(Yee) proposed a device consisting of two capacitor arrays and an integrator. However, since it includes an integrator, it requires an operational amplifier, which complicates the circuit configuration 9 and increases current consumption.

Regarding C-C DAC, which does not require an operational amplifier, Kul B OHRI and others have published an IEE paper ("Integrated
PCMC0DEC” (IEEE J, 5olid-8
tate C1rcuitVol, 5C-14, PP
38-46, Feb. 1979).

An example of a conventional C-C type DAC is shown in FIG. 2 and will be described.

In the figure, capacitors C6, C1, C2, . . . , Ct constitute a first capacitor array 1, and C3=IC, C, respectively.

=20・C+02=2”・C, C3=2211C−#・
...has a binary weighted capacitance value of Ct=2L-1.C.

Here, C indicates the value of unit capacity. In addition, the capacity C1+,
l ct+2・skewer...Ct+m constitutes the second capacitance column 2, and its capacitance value is C+0=20・C, C6+2=
2'・c, cL+3:22・cooo,, ct+m:2
Binary weighting of m-1,0te is performed.

The first and second two capacitor arrays 1.degree.2 are coupled by a coupling capacitor C0 having a capacitance value of Cc-C to form a two-stage capacitor array. and capacitances C1 to CL and capacitances CA+1 to CL+. One electrode of each of the switches 81 to St and the switches St++ to St+mt-
connected to ground or reference potential via The switches 81 to SL are controlled by the lower t bits of the input digital signal, and the switches 5t-x to SL+□ are controlled by the higher m bits of the input digital signal, and the whole operates as a DA converter with t0'm pits. do.

The output voltage v0 of the DA converter shown in FIG. 2 is calculated using the law of conservation of charge, and is expressed by the following equation (1).

(1) Here, bk is a coefficient that takes a value of non or Hllll corresponding to the input digital signal of (z0m) bits, and vR is the voltage of the reference potential.

The circuit shown in FIG. 2 has (10m) bits OD
In order to become an A converter, there is a condition for the value of the coupling capacitance Cc, which is given by the following equation (2).

That is, when this formula (2) is satisfied, the output voltage V
. is obtained by substituting equation (2) into equation (1), and is obtained as follows.

......(3) Rewriting this equation (3), when the output voltage v0, which is the analog output corresponding to the input binary digital signal of (10m) bits, is (
It operates as a DA converter of t+m) bits.

By the way, it is conceivable to use the resolution of the DA converter shown in FIG. 2 as a means to increase the number of cascade-connected stages.

FIG. 3 shows a conventional example of a DA converter (hereinafter referred to as CC-RWDAC) in which a resistor string is added to the CC type DAC shown in FIG.

In Fig. 3, the same reference numerals as in Fig. 2 indicate corresponding parts, and all of the resistors 81 to RN have the same resistance value, and N pieces (however, N = 2n) are connected in series. and forms a resistor string 3.

One end of this resistor string 3 is grounded, and the other end is given a reference voltage vR, and the resistor string 3 works as a voltage divider circuit to generate N voltages, and these voltages are applied to the selection switches T1 to T. , only one is selected.

In the circuit shown in FIG. 3, the function of the portion constituted by the capacitor array 1.2 is the same as that in the circuit shown in FIG. However, the difference is that there is no capacitance Co, and instead, the capacitance string 1 and the resistance string 3 are coupled by a coupling capacitance Cj having a value of 1C.

The input binary code of the DA converter shown in FIG. 3 has 10m bits for n+, and the upper (10m) bits control the capacitor arrays 1 and 2 in the same way as in FIG. Further, the selection switch of the resistor array 3 is controlled by the lower n bits, and when the decimal number for the n-bit binary number is j, the selection switch Tj is turned on. If the output voltage of the selection switch is v8', then the following equation is obtained.

Then, the output voltage vo is obtained by adding the effect of vS' to the above equation (3), and becomes
The output voltage V is an analog output in response to an input (n+m) bit binary digital signal.

is obtained.

When , it becomes an (n+t+m) bit ODA converter.

[Problem that the invention seeks to solve]

In the conventional C-C-R DAC mentioned above, the coupling capacitance Ca
There was a problem in that the O value was likely to have errors and the accuracy of D person conversion could not be improved.

In other words, as described above, when the coupling capacitance CaO value t=6, the following equation holds, and it is difficult to accurately realize the coupling capacitance CaO value.

Now, even if it were realized by approximating Cc=1c, there would be many errors and it would not be practical. This is because the output voltage v0' when C0=16 is -1 times larger than .

[Failure to solve the problem]

The DA converter of the present invention has one electrode commonly connected to 21.C.
A first capacitor array containing t capacitors increasing binary from 21@C to a value of 21@C and one electrode in common, increasing binary from 20.C to a value of 2m-1.C a second capacitor string including m capacitors; and a first coupling having a value of 1C connected between a common connection point of the first capacitance string and a common connection point of the second capacitance string. a capacitor, and (L+m) switches that selectively connect the other electrode of each of the capacitors and the m capacitors to a reference potential or ground potential according to the upper (t+m) bits of the input digital signal. a short-circuit switch that short-circuits between the common connection point of the first capacitor string and the ground potential while the second capacitor string is operating; and a short-circuit switch that connects 2n unit resistors in series; A resistor string that is grounded and the other end connected to a potential twice the reference potential, and 2n selection switches that select 91 voltages from each connection point of this resistor string according to the lower n bits of the input digital signal. and a second coupling capacitor having a value of 1C connected between the output of the selection switch and the common connection point of the first capacitor array.

[Effect]

In the present invention, a resistor string is added to a DA converter using a two-stage capacitor string.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a DA converter according to the present invention, and shows an example of a CC-RWDAC.

In the figure, capacitors C1 to Ct constitute a first capacitor array 1, and c1=2'-C, C2=22-C, and C3=2, respectively.
@C...Has a capacitance value with a binary weight of Ct=C.C. Also, the capacitance Ct+ 1 to C2+. constitutes the second capacitance column 21, and its capacitance value is Ct++=20,
C, ct+2='2' @C, C4+5=22@C-"
Binary weighting is performed as mC10m=2ml1C. The first and second capacitor columns are coupled by a coupling capacitance C0, and the value of the coupling capacitance Cc is Cc=1C.

Switches S1-St and St+, ~st+. is divided by the middle t bits and the upper m bits of the input digital signal to select a reference potential or ground potential. The resistor array 3, selection switches T1 to TN, and coupling capacitance Cj are the same as the circuit shown in FIG. 3, and are controlled by the lower n bits. However, unlike in FIG. 3, twice the reference voltage 2·vR is input to the resistor array 3.

The DA converter shown in the example of FIG. , a second capacitor string 2 including one electrode in common and m capacitors increasing binary from 20.C to a value of 2m-1°C, and a common connection of the first capacitor string 1. a first coupling capacitor Cc having a value of 1C connected between the point and the common connection point of the second capacitor array 2, and the other electrode of each of the above capacitors and the m capacitors. 10m) switches 81 to SL that selectively connect C to the reference potential or ground potential according to the upper (10m) bits of the input digital signal.

St+1 to St+. , a shorting switch S8 that short-circuits between the common connection point of the first capacitor array 1 and the ground potential while the second capacitor array 2 is operating, and 2n unit resistors connected in series. A resistor string 3 is constructed with one end grounded and the other end connected to a potential 2 VR twice the reference potential, and 91 voltages from each connection point of this resistor string 3 are applied to the lower n bits of the input digital signal. 1C connected between the outputs of the selection switches T1 to TN and the common connection point of the first capacitor array 1, which are selected accordingly.
and a second coupling capacitance Cj having a value of .

Next, the operation of the embodiment shown in FIG. 1 will be explained.

In the C-C-R type DAC according to the present invention, the DA conversion operation is performed in two stages.

First, the upper pin (m) is input to the second capacitor column 2, and the switches St+1 to St+□ operate. At this time, the common connection point of the first capacitor array 1 is grounded by the shorting switch S3, the switches 81 to St select the ground side, and the selection switch T1 is turned on. And the second
After the operation of the capacitor string 2 is completed, the short-circuit switch S8 is opened, and the switches 81 to SL select the reference potential or the ground potential according to the middle t bits of the input digital signal, and select the reference potential or the ground potential according to the lower n bits of the input digital signal. 1 of selection switches T1 to Tn
turns on. At this time, switches St+1 to st+
m is maintained in its previous state.

Next, the output voltage of the circuit shown in FIG. 1 will be explained.

First, when the output voltage when the upper m bits are input to the second capacitor string 2 is Vo/, it is calculated and expressed for the second capacitor string 2 since the short-circuit switch S8 is grounded. Next, find the voltage v8 at the common connection point of the first capacitor string 1 when the middle t pinto is input to the first capacitor string 1 and the lower n bits are input to the resistor string 3. The final output, the output voltage ■o, is expressed by .

From, Therefore, Equation 11 becomes as follows.

That is, it can be said that the circuit shown in FIG. 1 works as a (n+z+m)-bit DA converter.

Here, when calculating the error Ve that occurs in the approximation of the above αυ formula, it is found by ((Vow of formula 11 - (vo of α2 formula), and is expressed as -.1".Then, the maximum value of this error ve is vem is obtained when bk=1 for 2=(1-n)~A, and is expressed as . . . α4.

And the minimum step voltage VL8B of the DA converter is ■
R/2n+z+m, 2n+t> 1.2t
Since +m+l > 1, it is expressed as n≦m.

That is, if n≦m, the error caused by the approximation is less than or equal to the minimum step voltage vLsit, and the error caused by the approximation of the α9 equation does not pose a practical problem.

〔Effect of the invention〕

As explained above, according to the present invention, a resistor string can be added to a DA converter using a two-stage capacitor string,
As a result, it is possible to realize a DA converter with high resolution as a whole, so the practical effect is extremely large.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an example of a DA converter according to the present invention, Fig. 2 is a circuit diagram showing an example of a conventional C-C type DA converter, and Fig. 3 is a circuit diagram showing an example of a conventional C-C-R type DA converter. 1 is a circuit diagram showing an example of a type DA converter. 1...First capacity column, 2.Fist...Second capacity column, 3
11 @ 11 I+ resistance string, Co-CL + Ct+
1~C1+ m...Capacity, cc+cj...Coupling capacity, 81~5tISt+1~St+rn a e
@*Switch, Sse *...Short switch, R1~
RNe...-Resistor, T1-TN...Selection switch.

Claims (1)

[Claims] a first capacitor array including l capacitors having one electrode in common and increasing in binary from a value of 2^1·C to a value of 2^l·C;
With one electrode in common, from 2^0・C to 2^m^−^1・
a second capacitance string including m capacitances increasing binary up to a value of C; and a second capacitance string connected between a common connection point of the first capacitance string and a common connection point of the second capacitance string. a first coupling capacitor having a value of 1C, and the other electrode of each of the l capacitors and the m capacitors to a reference potential or ground potential, depending on the upper (l+m) bits of the input digital signal. 2^n short-circuiting switches that short-circuit between the common connection point of the first capacitor string and the ground potential while the second capacitor string is operating; A resistor string is constructed by connecting unit resistors in series, and one end is grounded and the other end is connected to a potential twice the reference potential, and one voltage is applied from each connection point of this resistor string to the input digital signal. 2^n selection switches selected according to the lower n bits; and a second coupling capacitor having a value of 1C connected between the output of the selection switch and a common connection point of the first capacitance string. A digital device characterized by consisting of
analog converter.