JPS63151183A - Motion detecting device for television picture - Google Patents

Abstract

PURPOSE:To improve motion detecting accuracy by calculating a finite difference value between the data of the representive point of a detected area in the field of one side of a high quality television signal and a respective picture element data, and calculating the least value from the total amount of their absolute values, and obtaining the minimum point by operating the least value and the data of its neighboring picture element. CONSTITUTION:The digital video signal of the first field from a line number conversion circuit is supplied to subtraction circuits 131-138 and to a representive point frame memory 139, and the finite difference value between the representive point data of the preceding field and picture element data of the present field, is operated, and the absolute values of the finite difference values of one field portion are totalized by totalization circuits 141-148, and the least value among the totalized data is detected by a least value detection circuit 150 through an addition circuit 149. Next, the minimum point is obtained by a vector operation circuit 151 by assuming that the least value and its neighboring points form the curve of the second order on a plane in the direction of a line. The final accuracy of a motion vector from the operation circuit 151 comes to be the value determined at the accuracy less than one sample in the direction of the sample and less than the line in the direction of the line, and is outputted to an output terminal 152.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television image that is applied to field number conversion processing in format conversion for converting, for example, a high-definition television signal to a PAL television signal. The present invention relates to a motion detection device.

[Summary of the invention]

In this invention, the first and second fields of a normal television signal are formed from one field of a high-definition television signal, and the first and second fields are formed from one field of a high-definition television signal.
In a device for detecting image movement from the signal of one of the fields, the difference between the representative point of a detection area formed by a plurality of pixel data in one field and each pixel data in the detection area. The value is calculated, the minimum value is detected from the aggregated data of the absolute values of the difference values, this minimum value and pixel data in the vicinity of the minimum value are calculated, and the vertical component of the image motion detection signal is detected. is,
Highly accurate motion detection is possible.

[Conventional technology]

A system conversion device that converts a high-definition television system (HD system) to a PAL system converts the number of fields, that is, 60
Motion compensation is performed when converting from field to 50 fields. FIG. 6 shows an example of a previously proposed system conversion device.

In FIG. 6, a luminance signal in a high-definition television signal is supplied to an input terminal indicated by l, and this luminance signal is supplied to the A/D converter 2 via a low-pass filter (not shown). A digital luminance signal from the A/D converter 2 is supplied to line number conversion circuits 3 and 4. The line number conversion circuits 3 and 4 perform line number conversion and non-interlacing processing.

The number of lines is converted from 1125 to 625 using, for example, digital frequency conversion technology.

Furthermore, a first field image and a second field image, both of which have 625 lines, are simultaneously formed from one field of a high-definition television signal. The first field video and the second field video have been offset by 0.5 line. However, the line number conversion circuit 3 always outputs the first field image signal of the PAL system, and the line number conversion circuit 4 outputs the second field image signal. Therefore, a digital video signal consisting only of the first field of line number conversion is obtained, and a digital video signal consisting only of fields is obtained from the line number conversion circuit 4.

FIG. 7A partially shows a non-interlaced scanning line structure after line number conversion.

In Figure 7A, the white circles indicate the lines of the first field (
(solid line) and the second field line (broken line). From each of the line number conversion circuits 3 and 4, the first field data shown in FIG. 7B and the second field data shown in FIG. 7C are output simultaneously. That is, the pair of the 23rd line of the first field and the 336th line of the second field are output simultaneously, and similarly, the (24,337)th line is bare, and the (25,338)th line is output as a pair. pair of lines.

The bare lines of the (26,339)th line are output at the same time.

Detection of the motion vector is performed using the first signal from the line number conversion circuit 3.
This is performed using a field video signal, and the field number conversion process is performed for each of the first field and the second field. Reference numeral 7 indicates a motion detection circuit for detecting a motion vector, and the digital video signal of the first field is supplied to this motion detection circuit 7. Further, the output signal of the line number conversion circuit 3 is supplied to the frame memory 5 and the image shift circuit 9, and the output signal of the line number conversion circuit 4 is supplied to the frame memory 6 and the image shift circuit 11. Signals from the previous l field read from frame memories 5 and 6 are supplied to image shift circuits 8 and 10. The output signals of the image shift circuits 8 and 9 are sent to the adder circuit 16.
The output signals of the image shift circuits 10 and 11 are supplied to the adder circuit 17. The output signal of the adder circuit 16 is supplied to the frame memory 18, and the output signal of the adder circuit 17 is supplied to the frame memory 19. Frame memories 18 and 19 are provided for time axis expansion.

The motion detection circuit 7 calculates the difference (field difference data) between the representative point of the previous field and the pixel data of the current field for each detection area, totals the absolute value of this field difference data, and generates field difference total data. However, it is configured to detect the minimum value of the field difference aggregate data. A motion detection circuit 7 obtains a motion vector corresponding to the motion of the image. This motion vector is a signal consisting of a horizontal (x) direction component and a vertical (y) direction component.

The motion detection area is a rectangular area having the center as the origin and having a predetermined extent in each of the X direction and the X direction. Further, as shown in FIG. 8A, the motion detection regions overlap each other in the X direction, and for one detection region R1, the detection regions R2, R3, and R4 overlap. In this case, the detection areas overlap fourfold.

In addition, the detection areas overlap in the X direction as well.
As shown in FIG. 8B, the detection region R6 overlaps one detection region R5. In this way,
Since the detection areas overlap in both directions, the detection areas overlap in a claw shape in total. Due to the overlapping of the detection areas as described above, the motion detection circuit 7 performs eight-phase processing as shown in FIG. It is said that the configuration is possible. In FIG. 9, a digital video signal from the line number conversion circuit 3 is supplied to an input terminal indicated by 30, and this digital video signal is input to the eight subtraction circuits 3.
1, 32, 33° 34, 35, 36, 37, 38 and are supplied to the representative point frame memory 39. The representative point frame memory 39 outputs representative point data of the previous field located at the origin of each of the eight overlapping detection areas, and these eight representative point data are sent to the subtraction circuits 31 to 38.
is supplied to The subtraction output signals (field difference data) of the subtraction circuits 31 to 38 are sent to the aggregation circuits 41, 42, 43, 44.
．． 45, 46, 47, and 48, and the absolute values of the field difference data are aggregated over one field. The totaled result data of each of the totaling circuits 41 to 48 is supplied to an adding circuit 49, and the output signal of the adding circuit 49 is supplied to a minimum value detection circuit 50. The position on the (x, y) coordinates of the minimum value detected by the minimum value detection circuit 50 is a motion vector.

Image shift circuit 8.9.10. to which the motion vectors from the motion detection circuit 7 are supplied. II shifts the position of the image in the X direction and in the X direction according to the motion vector, and is constituted by a variable delay circuit or memory. An example of motion correction performed by these image shift circuits 8, 9, 10.11 will be explained with reference to FIG.

In FIG. 10, Fl, F2. F3. F4°F5. F
6 indicates six consecutive first field images. This image includes a moving object that moves at a constant velocity, moving a distance of V every (1/60) seconds from left to right. This V is nothing but the motion vector detected by the motion detection circuit 7. In the case of this uniform motion, the total amount of movement from image F1 to images F and 6 is 5v. When converting these six images F1 to F6 into five images f1 to f5, it is necessary to increase the moving distance by (115)V.

As shown in FIG. 10, the image F1 of the previous field is not shifted at all, and the image F2 of the current field is shifted (-■
) are added together, and this addition output is added to form the image fl. Image F2 (1
15) V-shifted image and image F3 by (-415)v
0 image F3 from which image f2 is formed from the shifted one
Shifted by (215) V and image F4 (-31
5) Image f3 is formed from the v-shifted image. Image F4 is shifted by (315)■ and image F5 is (-
215) Image f4 is formed from the V-shifted image. Image F5 shifted by (415) v and image F6
An image f5 is formed by shifting (-115) ■.

The image f6 formed from the next image F6 shifted by V and the image Fil not shifted at all is the image Fi
One in which l is not shifted at all, and image F12 (not shown)
Since the pattern is the same as the image fll formed from the image fll shifted by -■, one of the overlapping images f6 is removed. Thereafter, the correction operation shown in FIG. 1O is repeated again.

The frame memory 18 outputs a non-interlaced first field digital video signal (625 lines, 150 fields), and the frame memory 19 outputs the following:
A digital video signal of the second field (625 lines, 150 frames) is output. Output signals from these frame memories 18 and 19 are supplied to a switch circuit 20.

The switch circuit 20 is supplied with a control signal that is inverted every (1150) seconds from a terminal 21, and the output of the switch circuit 20 is (625 lines 150 fields), that is, PA
An L-type digital luminance signal is extracted. The D/A converter 22 converts the digital luminance signal into an analog luminance signal.

The motion detection in the above-mentioned system conversion device can obtain a motion vector with an accuracy of l samples in the X direction. However, the image of the first field (Fig. 7B
In order to perform motion detection from (see), in the y direction,
Motion vectors can only be obtained with an accuracy of 2 lines in a 625-line interlaced image.

In order to solve this problem, it is conceivable to perform motion estimation using both the first field image and the second field image. FIG. 11 shows a configuration in which motion estimation is performed using both the first field image and the second field image.

That is, as shown in FIG.
The first field signal from the line number conversion circuit 4 and the second field signal from the line number conversion circuit 4 are supplied to the motion detection circuit 7. The motion detection circuit 7 detects a motion vector using one frame of signals consisting of the first field signal and the second field signal.The zero image shift circuits 8 and 9 detect the first field signal based on the detected motion vector. The image of the second field is shifted in the image shift circuits 10 and 11 based on the detected motion vector.

The output signal of the image shift circuit is output from the switch circuits 12 and 1.
The output signal of the image shift circuit 9 is supplied to the input terminal a of the switch circuits 13 and 15. The output signal of the image shift circuit 10 is transmitted to the switch circuit 12
and 14 input terminals, and the image shift circuit 11
The output signal of is supplied to the input terminals of switch circuits 13 and 15. The output signals of switch circuits 12 and 13 are supplied to an adder circuit 16, and the output signals of switch circuits 14 and 15 are supplied to an adder circuit 17. switch circuit 12
．． 13, 14, and 15 are controlled by line shift control signals generated by the motion detection circuit 7, respectively. That is, when it is determined that it is necessary to shift one line downward in the interlaced image, the input terminals of each of the switch circuits 12 and 13 are connected to the output terminal C, and the adder circuit 16 is provided with a shift processing signal. An output signal of the first field is obtained. In addition, when it is determined that it is necessary to shift one line upward in the interlaced image, the switch circuit 1
The input terminals 4 and 15 are connected to the output terminal C, and the adder circuit 17 receives the shifted second field output signal.

In the motion detection circuit 7 in FIG. 11, a motion vector is detected from an image of 1 frame consisting of a first field and a second field. FIG. 12 shows an example of this motion detection circuit 7, and subtraction circuits 31 to 3 in FIG.
8. Aggregation circuits 41 to 48 and an addition circuit 49 are provided to calculate difference data for the first field image.

Further, subtraction circuits 61 to 68. The aggregation circuits 71 to 78° addition circuits 79 are provided to calculate difference data for the second field image from the input terminal 60.

The output signals of the adder circuits 49 and 79 are supplied to the adder circuit 80, the output signal of the adder circuit 80 is supplied to the minimum value detection circuit 50, and a motion vector is obtained at the output terminal 52. Among the y-direction components of this motion vector, components smaller than 2 lines in the interlaced image are rounded off to 1
It is converted into a line or two-line value, and a line shift control signal for controlling the switch circuits 12, 13, 14, 15 is formed according to this value.

[Problem that the invention seeks to solve]

The smaller the unit amount of motion compensation, the higher the accuracy of motion compensation can be.As shown in FIG. It is possible to detect directional motion with one line accuracy. However, since it is necessary to detect motion vectors for each of the images in the first field and the second field, there is a problem in that the scale of the hardware increases.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a motion detection device for television images that can perform motion detection with l-line accuracy in the vertical direction using small-scale hardware.

[Means for solving problems]

In this invention, the first field and the second field of a normal television signal are formed from one field of a high-definition television signal, and an image is formed from the signal of either the first field or the second field. In a motion detection device, the difference value between the representative point of the detection area formed by multiple pixel data in one field and each pixel data in the detection area is calculated, and the absolute value of the difference value is totaled. The image forming apparatus includes a circuit for detecting a minimum value among the detected data, and a circuit for calculating the minimum value and pixel data in the vicinity of the minimum value to form a vertical component of an image motion detection signal.

[Effect]

The difference value between the representative point of the previous field and the pixel data of the current field is calculated using the signal of one field of a high-definition (HD system) television signal, and the minimum value is calculated from the total result of the absolute value of this difference value. , the scale of hardware for calculating the minimum value can be reduced. The vertical accuracy of the minimum value calculated in this way is the accuracy of 2 lines in a 625-line interlaced image.

The minimum point is determined by calculating the detected minimum value and pixel data in the vicinity of the minimum value.

The vertical accuracy of this minimum point can be less than or equal to 1 line.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, the high definition television system (HD system) of (1125 lines/60 fields) is
This is a system conversion device for converting to a PAL system (5 lines, 150 fields). Figure 1 shows this ()ID-P
The overall configuration of the AL) system conversion device is shown.

In FIG. 1, a luminance signal in a high-definition television signal is supplied to an input terminal indicated by l, and this luminance signal is supplied to an A/D converter 2 via a low-pass filter (not shown). A digital luminance signal from the A/D converter 2 is supplied to line number conversion circuits 3 and 4. The line number conversion circuits 3 and 4 form a first field image and a second field image, respectively, from one field of an HD image. These first field images and second field images have an offset of 0.5 line. From the line number conversion circuit 3, a digital video signal consisting only of the second field of lines/60 fields is obtained.

The output signal of the line number conversion circuit 3 is supplied to the frame memory 5 and the image shift circuit 9, and the output signal of the line number conversion circuit 4 is supplied to the frame memory 6 and the image shift circuit 11. The output signals of the frame memories 5 and 6 are supplied to image shift circuits 8 and 10. The image shift circuits 8 and 9 perform motion compensation on the digital video signals of the previous field and the current field of the first field. ,
The image shift circuits 1O and 11 perform motion compensation on the digital video signals of the previous field and the current field of the second field.

That is, when converting from the HD system to the PAL system, the number of fields is converted from 60 fields to 50 fields. In this case, the X direction (sample direction) and the y direction (
A motion vector (X samples, y line) consisting of components in the line direction) is detected, and motion correction is performed. Also,
The image shift circuits 9 and 11 apply (-1° -415, -315, -215, -115) to the detected motion vector.
The image of the current field is shifted by the shift command obtained by multiplying each coefficient by the image shift circuits 8 and 10.
is the detected motion vector (115°215.31
The image of the previous field is shifted by the shift command obtained by multiplying each coefficient of 5.415.1). This image shift is performed both in the X direction and in the direction.

Shift commands for the image shift circuits 8.9, 10.11 are generated by the motion detection circuit 107. The motion detection circuit 107 is supplied with the first field digital video signal from the line number conversion circuit 3. In order to detect the motion vector from the first field signal, the image shift circuits 8 to 11 detect the motion vector with an accuracy of 1 sample in the X direction, and 625 in the X direction.
Motion vectors are detected with an accuracy of two lines in an interlaced image of lines. In order to perform motion correction with accuracy of one line in the X direction, the output signals of the image shift circuits 8 to 11 are supplied to switch circuits 12, 13, 14, and 15, respectively.

Each of the switch circuits 12 to 15 has an input terminal a.

The output signals from the image shift circuits 8 and 10 are supplied to the input terminal a and the input terminal C of the switch circuit 12, and the output signals from the output terminal C of the switch circuit 12 are added. is supplied to circuit 16. The switch circuit 12 switches between the first field signal and the second field signal, making it possible to shift by one line. Similarly, switch circuits 13, 14, 15
The first field and the second field are switched by , and a one line shift is performed.

The motion detection circuit 107 causes the switch circuit 12.13 to
, 14.15 are formed. When a shift of one line is required, the input terminal A and the output terminal C of the switch circuits 12 to 15 are connected, and when a shift of one line is unnecessary, the input terminal A and the output terminal C are connected. . The output signals of switch circuits 12 and 13 are supplied to an adder circuit 16, and the output signals of switch circuits 14 and 15 are supplied to an adder circuit 17.

The output signal of the adder circuit 16 is supplied to the frame memory 18, and the output signal of the adder circuit 17 is supplied to the frame memory 9. The frame memories 18 and 19 perform a time axis expansion operation to obtain a non-interlaced signal of Fröld, and a non-interlaced signal of Fröld. These frame memories 18 and 19
The respective output signals are supplied to the switch circuit 20. The switch circuit 20 is switched by a control signal from a terminal 21, and alternately selects the first field signal and the second field signal. From this switch circuit 20 (
An interlaced signal of 625 lines and 150 fields is supplied to the D/A converter 22. A PAL analog video signal is obtained at the output terminal 23 of the D/A converter 22.

Similar to the luminance and signal components described above, the red color difference signal and the blue color difference signal are subjected to line number conversion and field number conversion processing. The luminance signal and the two color difference signals are then supplied to a PAL color encoder (not shown) to obtain a PAL composite color television signal.

FIG. 2 shows an example of the motion detection circuit 107.

The first field digital video signal from the line number conversion circuit 3 is supplied to an input terminal 130.

This digital video signal is sent to subtraction circuits 131, 132,
133, 134, 135, 136, 137, and 138 are supplied to the representative point frame memory 139.

Motion detection is performed using a predetermined magnitude in each of the X (sample) direction and the y (line) direction, for example, x −19 to +20.
．． y=-4 to +4), and the origin of the (x, y) coordinates is used as the representative point. In addition, in order to increase the accuracy of motion detection, the detection regions are arranged to overlap each other in a claw shape.Therefore, motion detection is performed using eight phases.

The subtracting circuits 131-138 calculate the difference between the representative point data of the previous field and the pixel data of the current field, and the output signals of the subtracting circuits 131-138 are supplied to totaling circuits 141-148. Aggregation circuits 141 to 148
totalizes the absolute values of the difference values for one field, and the output signals of the totalization circuits 141 to 148 are supplied to the addition circuit 149.

The output signal of the adder circuit 149 is supplied to the minimum value detection circuit 150. The minimum value detection circuit 150 detects the minimum value (Xo, )To) in the total data of the absolute values of the field differences. This minimum value is supplied to the vector calculation circuit 151. A motion vector is obtained at the output terminal 152 of the vector calculation circuit 151.

The calculation of a motion vector by the vector calculation circuit 151 from the minimum value detected by the minimum value detection circuit 150 will be explained with reference to FIGS. 3, 4, and 5.

FIG. 3 shows an example of difference data obtained from the adder circuit 149. Figure 3 shows (x=-19 to +20,)F=-
The total value f (x
, y). - As an example, the minimum value detection circuit 150 detects ((Xo,)'o
)=(5,2)) is obtained. Since this minimum value is obtained only from the first field signal, it has two-line accuracy. This minimum value is defined as point A.

Next, the point (Xo, yo+1) near the minimum value is set as point B, and the point (xo, yo-1) is set as point 0.

(y±1) plane of the y plane containing the minimum value (3 planes in total)
When viewed from the X-axis direction, as shown in Figure 5, 3
Points A, B, and C are quadratic curves [f (-5, 7) -ay
! +by+c). The minimum point (yc=-b/2a) of this curve is found by solving simultaneous equations. Minimum +CVc Vh ) Xf(x
o, yyo) + (y□” FAsuXf(xo, y
c)+(YA-ys)xf(xo, Vc)
However, A= (XO,yA), B= (Xo,)'a
).

C = (xo, yc).

Since the accuracy in the X direction is in principle one line or less, the final motion vector (Xo
, yc) is 1 sample in the X direction, and in the X direction,
The value is determined by the accuracy of the vector calculation circuit 151. In reality, the stage where the coefficients corresponding to the frame positions are multiplied and the images are supplied to the image shift circuits 8 to 11 has a 2-line precision, and fractions less than 2 lines are rounded off to the nearest whole number.
line or two lines, switch circuits 12.13.
It is used as a line shift control signal for 14.15.

Note that the vector calculation circuit 151 is not limited to discrete hardware, and may be realized by a microcomputer.

〔Effect of the invention〕

According to this invention, when motion correction is performed in field number conversion when converting an HD system to a PAL system, the accuracy of vertical motion detection can be made one line accuracy. In this invention, the first field signal and the second field signal are simultaneously formed from the HD digital video signal, and motion detection is performed using the one field signal. This method has the advantage that the configuration of the motion detection circuit is not complicated compared to performing motion detection using the signal.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a system conversion device using a motion detection circuit according to the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIGS. 3, 4, and 5 are diagrams of difference data. FIG. 6 is a block diagram of an example of a conventional system conversion device, and FIG. 7 is a route map used to explain an example of the total value and an embodiment of the present invention. A route diagram showing a part of the scanning line structure of each of the first field and the second field, FIG. 8 is a route diagram used to explain the motion detection area, and FIG. 9 is a block diagram of an example of a conventional motion detection circuit. FIG. 10 is a route diagram used to explain the motion correction operation, FIG. 11 is a block diagram of another example of a conventional system conversion device, and FIG. 12 is a block diagram of another example of a conventional motion detection circuit. Explanation of main symbols in the drawings 1: HD video signal input terminal, 3゜4 lines number conversion circuit, 8.9.10, 11: Image shift circuit, 12.13, 14.15: Switch circuit, 2
3: PAL video signal output terminal, 10
7: motion detection circuit, 131-138: subtraction circuit,
141 to 148: aggregation circuit, 150: minimum value detection circuit, 151: vector calculation circuit. Agent Patent Attorney Masato Sugiura Figure 2

Claims (1)

[Scope of Claims] A first field and a second field of a normal television signal are formed from a signal of one field of a high-definition television signal, and a signal of one of the first field and the second field is formed. In an apparatus for detecting movement of an image from a plurality of pixel data in one field, a difference value between a representative point of a detection area formed by a plurality of pixel data in one field and each pixel data in the detection area is calculated, A circuit that detects the minimum value among the data that aggregates the absolute values of the difference values, and a circuit that calculates the minimum value and pixel data in the vicinity of the minimum value to form the vertical component of the image motion detection signal. What is claimed is: 1. A television image motion detection device comprising: