JPS6314914B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an electronic timepiece, and more particularly to an electronic timepiece using a lithium battery or the like having relatively high voltage and high internal resistance. The purpose of the present invention is to absorb fluctuations in battery voltage when driving heavy loads such as alarms and lamps, and supply a stable constant voltage to the clock circuit even when the battery voltage fluctuates, even when driving heavy loads. The objective is to obtain an electronic clock with stable performance. In recent years, the performance of lithium batteries has improved, and they have begun to be used in some watches, and lithium batteries are also attracting attention for extending the lifespan of watches. Lithium batteries usually have a voltage of 3 to 2.8 (V), and the battery capacity is 60 to 3 (V) for watch batteries.
100 (mAH). Complementary MOS/IC for wristwatches
operates sufficiently at 1.5 (V), so by switching the two capacitors in series/parallel, a voltage (approximately 1.5 (V)) that is half the battery voltage is created.
It is well known that driving a watch IC with this voltage extends the battery life of the watch. Due to this method and the low self-discharge rate of lithium batteries, the battery life can be extended to 55%.
An electronic wristwatch that lasts from 2015 to 7 years can be realized. However, when put into practical use, the disadvantage is that the internal resistance of lithium batteries is extremely large. This becomes a problem when the clock has functions such as lamps and alarms that consume an extremely large amount of current during operation. The internal resistance of a normal lithium battery is approximately 100Ω at low temperatures, reducing the lamp current consumption to 10 (mA).
If so, a voltage drop of 100 (Ω) x 10 (mA) = 1 (V) will occur, and there is a high possibility that the clock circuit will malfunction due to voltage fluctuations. In particular, electronic watches equipped with a liquid crystal drive unit driven by multi-digit multiplex drive require not only the battery power source but also a boosted power level of the battery power source as the liquid crystal drive signal. Even against fluctuations,
This causes a large voltage fluctuation, resulting in a decrease in the contrast of the liquid crystal display. In order to prevent such malfunctions of the clock circuit, the present invention makes the power source constant voltage, and switches the voltage level at which the constant voltage is made during normal times and heavy loads, so that the influence of level fluctuations of the battery power source on the constant voltage source By eliminating this and further delaying the operation of the heavy load circuit with the switching operation of the constant voltage source, the aim is to constantly ensure the normal operation of the clock circuit. Hereinafter, an explanation will be given based on one embodiment of the present invention. FIG. 1 is a block diagram of one embodiment of the present invention. Inside the broken line 101 is a watch electronic circuit section, and inside the broken line 102 is a power supply circuit section including a booster circuit. 10
Reference numeral 4 denotes a time standard source such as a crystal oscillator and a frequency dividing circuit for generating a time measurement signal. A clock signal from 104 is input, and a clock counter 107 counts time. Reference numeral 109 is a display decoder and a display drive circuit, and the counting data (10
8) is input and decoded into segment data for display. 111 is a display section composed of liquid crystal, LED, etc., which is driven by 109;
It functions to provide a display based on segment data. 108 is a counter for counting alarm ringing time, which stores the alarm ringing time;
The time match detection circuit detects the match between the alarm setting time and the current time. When a match is found
The Alarm match signal is output to 126 alarm ON timing circuits. 105 is a group of external input switches, 106 is 10
5 encodes the input signal from the switch group,
This is a switch input encoder that generates various control signals. 1 of the control signals generated from 106
This is the lamp lighting signal, and 127 lamps are ON.
Output to the timing circuit. 126, 127, and the OR gate 116 are shown in detail in FIG. The Alarm match signal in the D-type flip-flops 301 and 303 generates the Alarm ON signal with a delay of two clocks based on the 1 KHz clock signal. Similarly, the Lamp ON signal is generated with a delay of two 1KHz clock signals. In the case of any of the ON signals of Alarm ON and Lamp ON, a differential signal is generated by either AND gate 302 or 305 prior to the ON signal. Those differential signals are OR gate 11
The voltage is outputted to the power supply circuit section 102 via 6, and the constant voltage source is switched. In other words, from the generation of the Alarm match signal and Lamp lighting signal to the actual buzzer drive,
Lamp lighting is delayed. For example, as shown in the timing chart of FIG. 4, there is a delay of about 1 to 2 msec from the generation of the lamp lighting signal to the actual lighting of the lamp. Therefore, prior to actually driving the heavy load circuit, the Load signal is input to the OR gate 16 to switch the power supply as will be explained later.
Here, the D type flip-flop 301,3
03 is a delay circuit that delays buzzer driving, and similarly, 304 and 306 are delay circuits that delay lamp lighting. The Alarm ON signal is input to the buzzer drive circuit 112 to drive the buzzer 113. Similarly, the Lamp ON signal is input to the lamp lighting control circuit 114, which controls the lighting and extinguishing of the lamp 115. Fig. 4 shows a timing chart when the lamp is turned on by a specific input of the switch group 105.
Here, the timer is a timer that detects 1 to 2 seconds, and while the timer output is at the "0" level (the timer will be described later), the constant voltage circuit under heavy load is operating. As can be seen from this timing chart, switching of the constant power supply always precedes the operation of the heavy load circuit. As a result, a stable constant voltage is always provided to the clock circuit in a more reliable state. When the buzzer 113 and the lamp 115 are turned on, the current flowing through those loads is several mA to
The voltage drop caused by the product of the internal resistance of the lithium battery 103 and the current is about 1/2 of the power supply voltage. Therefore, when the load is heavy, the OR gate 116 detects the heavy load state and notifies the power supply circuit section 102 of the heavy load state. 119 is a level shifter. Reference numeral 122 denotes an SR latch as a power supply switching circuit that switches between a normal state and a heavy load state. The correspondence with the states is as follows: Q = "1"...Heavy load state Q = "0"...Normal state. In the normal state, Q of 122 is "0", the switching Tr 120 is OFF and the switching Tr 121 is ON, and the power supply circuit uses the V _SS2 constant voltage source 124 as the reference power source. The voltage level of V _SS2 is e.g.
In the case of Li batteries, if the battery life is to be guaranteed up to 2.8 (V), around -2.6 (V) is appropriate. (Therefore, V _SS1 is about -1.3 (V).) V _SS2 is 124
It is generated by constant voltage, and the switching of 121
It is supplied to the step-down/step-up circuit 117 via the Tr. Here, the specific circuit configuration of the step-down/step-up circuit No. 117 is described in Japanese Patent Application No. 116013/1983 filed by the same applicant as the applicant of the present application. In addition, the step-down/step-up circuit of 117 is the SR of 122.
Functions vary depending on the latch output. i.e.

[Table] 117 so that the power generation state shown in the table above is achieved.
works. In other words, in the normal state, the lithium battery voltage V _Li is V _Li > |V _SS2 |, so |V _SS2 | is made into a constant voltage, and |V _SS2 |, which is made constant voltage, is stepped down by the step-down/boost circuit 117. |V _SS1 | is boosted to form |V _SS3 |. However, under heavy load conditions caused by driving alarm lamps, etc., as mentioned above, V _Li drops significantly due to the internal resistance of the lithium battery, so V _SS2
cannot be made constant voltage. Therefore, since V _Li > |V _SS1 |, |V _SS1 | is made into a constant voltage, and |V _SS1 |, which has been made constant, is boosted by the step-down/boost circuit 117, and |V _SS2 | is further boosted. to form |V _SS3 |. When a heavy load condition (lamp ON and buzzer ON) is detected by OR gate 116, SR latch 122 is set and its Q output becomes "1". At that time, the switching Tr 120 is turned on, the switching Tr 121 is turned OFF, and the power supply circuit uses the V _SS1 constant voltage source 125 as a reference power source. The step-down/step-up circuit 117 operates as a step-up circuit and generates two power supplies, V _SS2 and V _SS3 . On the other hand, in the normal state, the SR latch 122 is reset and its Q output becomes "1". At that time, the switching Tr 120 is turned OFF, the switching Tr 121 is turned ON, and the power supply circuit uses the V _SS2 constant voltage source 124 as a reference power source. Then, the step-down/step-up circuit 117 generates two power supplies: V _SS1 , which is a step-down version of V _SS2 , and V _SS3, which is a step-up version of V _SS2 . Further, 123 is a timer circuit which inputs a 1 Hz signal as a clock, and resets the SR latch after counting the time of 1 to 2 seconds. A switching control circuit 118 generates a signal for controlling switching of the capacitance of the step-down/step-up circuit 117 during step-down/step-up. The entire system operates as described above, and since a constant voltage is always supplied to the watch electronic circuit,
It is not affected by power fluctuations during heavy loads. In addition, 123 is a timer circuit,
The time period during which the V _SS2 constant power supply 124 is switched to the V _SS1 constant power supply 125 after the Load signal is generated is determined. FIG. 2 shows the vicinity of the constant voltage circuit in FIG. 1. 201 corresponds to the V _SS2 constant voltage source 124, and 200
corresponds to the V _SS1 constant voltage source 125. 229,230 N-channel MOS/FET is
Switching for power supply switching of 121 and 120
It is Tr. 231 is the SR latch of 122, 232
is a timer circuit that resets the SR latches 122 and 231. Inside 201 is a differential amplifier 200 composed of 206 to 210.
A differential amplifier consisting of transistors 219 to 223 is built inside. Under normal conditions, the SR latch 231 is
It is in a reset state by the output of 32, the N-channel MOS/FET 229 is turned on, and V _SS2 is supplied from the constant voltage source 201. The MOS/FET groups 202 to 205 form a reference voltage to a constant voltage source (both V _SS1 and V _SS2 ). In this case, the reference voltage is 204,
The transistors are formed such that the threshold values of the two N-channel MOS/FETs 205 are different. In the differential amplifier circuit formed by MOS/FETs 206 to 210, 206 and 207 are P channel MOS/FETs with exactly the same characteristics and the same size.
09 and 210 also have the same characteristics and the same dimensions. The gate input 206 represents an inverting input, and 207 represents a non-inverting input. Since the reference voltage _Vref is input to the gate of 206, the N-channel MOS
FET211 operates. In addition. Reference numeral 211 is a depletion type N-channel MOS-FET, which, together with resistors 212 and 213, forms an output stage that outputs an output while shifting the level. Due to the operation of the differential amplifier circuit, a voltage of V _ref is always applied to the resistor 212. Therefore,
V _SS2 is resistor 212 (resistance value R is ₁ ) and resistor 21
3 (resistance value is _R2 ). That is, V _SS2 = R ₁ + R ₂ /R ₂ ×V _ref , and a desired voltage value can be obtained by adjusting the ratio of R ₁ and R ₂ . On the other hand, a constant voltage source of 200 V _SS1 is designed not to operate in the normal state, thereby achieving constant power consumption. In the normal state, since the Q of the SR latch 231 is "0", the P channel Tr 214 is OFF, the P channel Tr 218 is ON, the P channel Tr 224 is ON, and the N channel Tr 227 is OFF, so that the V _SS1 constant voltage source 200 does not operate. , Moreover, there is no potential floating state inside the power supply. When transitioning from normal state to heavy load state, 231
The SR latch is set and the N-channel Tr230 is
When turned on, V _SS1 is supplied from the constant voltage source 202. In a heavy load state, P channel Tr 214 is turned on, P channel Tr 218 is turned off, P channel Tr 224 is turned off, and N channel Tr 227 is turned on, and the V _SS1 constant voltage source operates. The reference voltage is V _ref as in the case of the V _SS2 constant voltage source 201 . In this case as well, the output voltage of V _SS1 can be determined by the ratio of resistors 215 and 216, as in the normal state. Note that the timer 232 inputs a 1 Hz signal as a clock, and resets the latch 231 after counting 1 to 2 seconds as shown in the timer output in the timing chart of FIG. As understood from the above description, according to the present invention, batteries with large voltage fluctuations under heavy loads (batteries with large internal resistance such as lithium batteries)
It is possible to provide a power supply circuit that does not cause fluctuations in the power supply even when the power supply is used as the power supply. Here, in the present invention, V _SS2 is made a constant voltage in a normal state, and V _SS1 is made a constant voltage in a heavy load state, but I will add a reason as to why V _SS1 is not always made a constant voltage. This will be explained using FIG. V In _{the SS1} system constant voltage source 200 (200 is operating, that is, Tr214 is ON), the voltage I flowing through the resistors 215 and 216 is made constant by Tr217, which operates as a constant current source. There is. If the voltage of the battery voltage 228 is V _B , then V _B = V _SS1 + I (R ₂₁₅ + R ₂₁₆ ) Similarly, in the V _SS2 system constant voltage source, V _B = V _SS2 + I (R ₂₁₂ + R ₂₁₃ ). Now, in the normal state, V _B > V _SS2 = 2×V _SS1 . Therefore, I.(R ₂₁₅ +R ₂₁₆ )>I.(R ₂₁₂ +R ₂₁₃ ). In this way, making V _SS1 a constant voltage in the normal state means that the power loss is greater than making V _SS2 a constant voltage. This is because when V _SS1 is made a constant voltage, the potential difference becomes larger. Therefore, by setting the constant voltage V _SS2 to a value close to the battery voltage in normal conditions, and setting the constant voltage V _SS1 to a value approximately 1/2 of V _SS2 in heavy load driving conditions,
A more reliable electronic clock can be realized. In particular, electronic watches equipped with a liquid crystal display driven by a multi-digit multiplex drive require a boosted power level from the battery power source as the liquid crystal drive signal, so even minute voltage fluctuations in the battery power source can be affected.
This causes a large voltage fluctuation, resulting in a decrease in the contrast of the liquid crystal display. Even in this case, according to the present invention, a constant voltage source is always used as the power source, and a stable liquid crystal display is guaranteed without causing even the slightest power fluctuation. Although this embodiment has been explained using a lithium battery, the present invention is not limited to electronic watches using lithium batteries, and can also be applied to electronic watches using other batteries with relatively high voltage. The present invention is applicable.

[Brief explanation of the drawing]

Fig. 1: A block diagram showing the configuration of an electronic timepiece according to the present invention, Fig. 2: An example of a power supply circuit according to the present invention, Fig. 3: Alarm ON timing circuit and lamp ON timing circuit, Fig. 4 ... Timing chart when the lamp of the circuit according to the present invention is turned on.

Claims (1)

[Claims] 1 An electronic circuit that outputs a heavy load circuit drive command signal consisting of a time standard source such as a crystal oscillator, a frequency dividing circuit, a display drive circuit, etc., a power supply battery with relatively high internal resistance such as a lithium battery, and a power supply battery that is used as a power supply. At the same time, a heavy load circuit consisting of a lamp, an alarm, etc. through which a relatively large current flows, and a second MOS/FET consisting of a MOS/FET that steps down the voltage of the power supply battery to a first constant voltage value V _SS2 lower than the voltage of the power supply battery. a second constant voltage circuit comprising a MOS/FET that steps down the voltage of the power supply battery to a second constant voltage value V _SS1 lower than the first constant voltage value V _SS2 ; A step _- down circuit that steps down a first constant voltage value V _SS2 to create a first voltage value lower than the first constant voltage value V _SS2 ; 2nd constant voltage value higher than the constant voltage value V _SS1
a booster circuit that creates a voltage value of , a control signal that inputs the heavy load circuit drive command signal and switches from the first constant voltage circuit to the second constant voltage circuit, and a certain period of time after the output of the control signal; a delay control circuit that outputs a drive signal for driving the heavy load circuit;
A control signal from the delay control circuit is input, and when the heavy load circuit is not operating, the first constant voltage value is determined based on the first constant voltage circuit and the step-down circuit.
The electronic circuit is operated by V _SS2 and the first voltage value, and when the heavy load circuit is operated, the second constant voltage value V _SS1 and the first voltage value are set based on the second constant voltage circuit and the booster circuit. An electronic timepiece comprising a power supply control circuit that operates the electronic circuit with a voltage value of 2.