JPS63147316A - Integrated circuit device - Google Patents

Abstract

PURPOSE:To make a small-sized chip by a method wherein a thin impuritydiffused buried layer is formed by implanting high-concentration ions into an opening made at an oxide film formed on the surface of a semiconductor substrate while an electrode part is formed on this impurity-diffused buried layer by filling the opening. CONSTITUTION:The following are provided: a semiconductor substrate 1 ; an oxide film 3 formed on the surface of the substrate 1; a thin impurity-diffused buried layer 2 formed by implanting high-concentration ions into an opening made at the oxide film 3; an electrode part 4 formed on the impurity-diffused buried layer 2 after burying said opening. The misalignment of the impurity- diffused buried layer with the electrode part 4 is eliminated by a self-aligning action. For example, the oxide film 3 is formed on the semiconductor substrate 1 by a vapor growth method; after that, a contact hole functioning as a window is made at the oxide film 3 by a contact process; an impurity-diffused buried layer 2 is formed by implanting high-concentration ions through this contact hole; the impurity-diffused buried layer 2 and the contact hole are filled with aluminum so as to form an aluminum electrode 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit device, and more particularly to an integrated circuit device in which an impurity diffused buried layer is provided using a high concentration ion implantation method in a contact process.

[Conventional technology]

Conventionally, when forming a thin impurity diffused buried layer on the surface of a substrate in an integrated circuit device, consideration has been given to misalignment with the contact 1 process and widening of the contact opening due to side etching. It was formed larger than the part.

FIG. 2 is a longitudinal sectional view of an example of such a conventional structure.

That is, after forming an impurity diffused buried layer 2' on a semiconductor substrate, an oxide film 3' wider than the contact opening is grown in a vapor phase, and then a window is opened in the oxide film by a contact process, and an aluminum electrode 4 is formed. Was.

This slanted impurity diffusion buried layer 2 is formed by forming the contacts 1 to 1 as described above.
A margin was required to prevent misalignment with the process and side etching of the contact opening. Therefore, the occupation rate of the impurity diffusion implantation @21 on the chip surface is large, which has been an obstacle to realizing chip size reduction.

[Problem that the invention seeks to solve]

In this way, in conventional integrated circuit devices, when forming a thin impurity diffused buried layer on the substrate surface, the impurity diffused buried layer is carefully connected to the contact hole, taking into account misalignment with the contact process and widening of the contact opening due to side etching. Since it is formed larger than the opening, it has the disadvantage that it is difficult to reduce the chip size.

SUMMARY OF THE INVENTION An object of the present invention is to provide an integrated circuit device that eliminates such drawbacks and allows the chip size to be reduced.

[Means for solving problems]

The integrated circuit device of the present invention includes a semiconductor substrate, an oxide film formed on the surface of the substrate, and a thin impurity diffusion buried layer formed in an opening in the oxide film by high-concentration ion implantation. , an electrode portion is formed on the impurity diffused buried layer by filling the opening, and a self-alignment effect eliminates misalignment between the impurity diffused buried layer and the electrode portion.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a longitudinal sectional view of one embodiment of the present invention.

In this example, an oxide film 3 is grown in a vapor phase on a semiconductor substrate 1, and then a contact hole serving as a window is opened in the oxide film 3 through a contact process, and a high-concentration ion implantation method is performed from this contact hole. The impurity diffused buried layer 2 is formed using the same method, and the impurity diffused buried layer N2 and the contact opening are filled with aluminum to form an aluminum electrode 4.

In this embodiment, since the impurity diffused buried layer 2 can be formed in a self-aligned manner, misalignment with the contact opening can be eliminated.

〔Effect of the invention〕

As explained above, the present invention has the effect that since the impurity diffusion buried layer can be formed small by the self-alignment effect, it is possible to obtain a high-speed integrated circuit device that requires a small area and has a small drain capacitance.

[Brief explanation of the drawing]

FIG. 1 is a vertical cross-sectional view of a portion of an impurity diffused buried layer according to an embodiment of the present invention, and FIG. 2 is a vertical cross-sectional view of an example of a conventional impurity diffused buried layer. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2.2'... Impurity diffusion buried layer, 3.3'... Oxide film, 4... Aluminum electrode.

Claims (1)

[Claims] A semiconductor substrate, an oxide film formed on the surface of this substrate, a thin impurity diffused buried layer formed by high concentration ion implantation in the opening made in this oxide film, and the above-mentioned impurity diffused buried layer formed on this impurity diffused buried layer. What is claimed is: 1. An integrated circuit device comprising: an electrode section formed by filling an opening; and a self-alignment effect eliminates misalignment between the impurity diffused buried layer and the electrode section.