JPS63142971A - Equalizing circuit for video line - Google Patents

Abstract

PURPOSE:To correct deterioration in a video line characteristic, by providing a gain control means which reads out the change quantity of a gain stored in a storage means and equalizes a white signal to be adjusted by controlling the gain of a variable gain means based on the change quantity of the gain. CONSTITUTION:For a correction part 3, a multiplying D/A2 which controls the amplified gain of an analog signal with a digital signal outputs the multiplied result of a signal inputted from an input terminal 1 and a data of eight bits to an output terminal 4. Assuming that resistors R1 and R2 are set at an equal value (r), and the data of eight bits is set so as to set the gain Ka of the multiplying D/A2 at a half value, an input/output frequency characteristic between the input terminal 1 and the output terminal 5 of the correction part 3 becomes flat. Also, for a correction part 7, when the data of eight bits is set so as to set the gain Kb' of a multiplying D/A6 at the half value assuming the resistors R3 and R4 as the equal value (r), the input/output frequency characteristic between the input terminal 1 and the output terminal 9 of the correction part 7 becomes flat.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video line equalization circuit for correcting transmission line characteristics of television signals.

[Prior Art] In order to maintain good line characteristics during operation, transmission lines used for television relay are connected to
Adjustments are made by color par signals.

Conventionally, this adjustment has been performed by an adjuster, but attempts have been made to automatically correct line characteristics in a short time.

FIG. 5 is a block diagram showing the configuration of an example of a conventional automatic equalization circuit for a video line.

In the figure, 501 is a synchronous separation circuit, and 502 is a clock generation circuit. Reference numeral 503 denotes a timing section, which is composed of a synchronization separation circuit 501 and a clock generation circuit 502.

504 is a human power amplifier, and 505 is a tapped LC delay line with 100 ns intervals and 159 taps. 506-1~5
06-159 is a multiplier, 507 is a multiplication holding circuit,
It is composed of multipliers 5Qfi-1 to 506-159.

508 is an adder circuit, and 509 is a clamp circuit.

510 is a correction section, and input amplifiers 504. L with tap
C delay line 505, multiplication holding circuit 507, addition circuit 508
and a clamp circuit 509.

511 is a ROM-RAM, 512 is an 8-bit CPU, and 513 is a demultiplexer. 514
is a reference signal, which is supplied from the output end for correction control.

515 is a to/D converter, 516 is IH (horizontal scanning period)
High-speed buffer memory 517 is a D/A converter.

518 is a correction control unit, ROM-RAM 511
, CPt1512, demultiplexer 513, A/
It is composed of a D converter 515, an IH high speed buffer memory 516, and a D/A converter 517.

The operating principle of the conventional example shown in FIG. 5 will be explained next.

The television video signal input manually from the input terminal IN is
The level is adjusted and amplified by the human power amplifier 504, and the tapped L
A tapped LC delay line 505 is added to the C delay line 505.
The outputs from each tap of the multipliers 5Q6-1 to 5Q
(It is added by an adder 508 through 16-159, and the clamp is adjusted by a clamp circuit 509, and the output terminal 0tlT
l,” is output.

Here, the reference signal included in the television signal is taken in from the output terminal, A/D converted by the A/D converter 515, and sent to the CPU via the IH high-speed buffer memory 516.
Correction data that has been subjected to arithmetic processing by 512 and converted into analog data by D/A converter 517 is taken out.

On the other hand, the television signal is output from each tap of the above-mentioned tapped LC delay line 505, corrected by the above-mentioned correction data in multipliers 506-1 to 506-159, added in adder 508, and output. It is taken out to the terminal OUT.

[Problems to be Solved by the Invention] However, as can be seen from the above-mentioned configuration, this conventional example is a transversal filter type automatic equalization circuit;
For example, as mentioned above, it requires as many multipliers as 159 and the same number of tapped delay lines, and 2
This method has the drawback of requiring a special reference signal such as a T-pulse.

Using wireless relay lines, video material from relay sites that cannot be installed to the broadcasting station on their own is sent to the broadcasting station by borrowing an NTT line and connecting to it. Therefore, in addition to the characteristic deterioration in the radio relay line, there is also deterioration in the characteristic of the line between NTT and the broadcasting station. At present, adjustments to the line characteristics that combine these are performed by an adjuster who looks at the color par signal sent from the originating station when the line is connected.

SUMMARY OF THE INVENTION In view of the above-mentioned circumstances, an object of the present invention is to use a color bar signal, which is commonly used in relay sites, as a reference signal, and to use a white signal included in the color bar signal to filter a simple variable filter. The frequency characteristics of the transmission line are automatically adjusted by one of the seven systems.

[Means for Solving the Problems] In order to achieve such an object, the present invention combines a plurality of circuits with simple configurations that vary the characteristics of a predetermined frequency band in the video signal band, and The deterioration of the video line characteristics is corrected and equalized through calculation control so that the characteristics are similar to distortion and are opposite to each other.

That is, the present invention provides variable gain means capable of changing the gain of a specific frequency band, means for changing the gain of the variable gain means when a reference white signal is input to the variable gain means, storage means for storing the amount of change in the output white signal obtained from the variable gain means in correspondence with the amount of change in gain; and gain control means for reading out the amount of gain change stored in the variable gain means and equalizing the white signal to be adjusted by controlling the gain of the variable gain means based on the amount of gain change. [Function] According to the present invention, according to the transmission characteristics of the video line, the transmitted reference white signal is used to perform calculations and control to automatically and easily obtain the desired characteristics, thereby making the video line equal. can be converted into

[Example] The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In the figure, 1 is a video signal input terminal. 2 and 6
is a multiplication D/^, which controls the amplification gain of an analog signal with a digital signal. , CJ and C5 are capacitors, and R1 to R9 are resistors. Reference numerals 3 and 7 indicate correction units, which make the characteristics of respective specific frequency bands of the video signal band variable.

4 and 8 are output terminals from multiplying D/A 2 and 6, 5 and 9 are variable characteristic units 3 and 7
This is the output terminal from. Amplifiers 0 and 12 appropriately amplify the level of the video signal that has passed through the correction units 3 and 7, and make the video signal have the correct polarity at the output of the amplifier 12. 11 is an output terminal of the amplifier 10, and 13 is a video signal output terminal. Furthermore, 14 is an A/D converter, 15
is a calculation unit (CPU), and 15A is a ROM.

Next, the operation will be explained with reference to FIG.

In this embodiment, a circuit that varies the characteristics of two frequency bands among the video signal bands is used, and the correction units 3 and 7 are circuits with similar configurations, and a capacitor C is used to determine the frequency to be varied. Only the values of □ and cb are different.

In the correction section 3, the multiplier D/A 2 multiplies the signal input from the input terminal 1 by 8-bit data and outputs the result to the output terminal 4. The resistors R1 and R2 are set to the same value r, and the gain of the multiplication D/A 2 is set to 1.
When the 8-bit data is set so that ' is the station, the input/output frequency characteristics between the input terminal 1 and the output terminal 5 of the correction section 3 become flat. Similarly to the correction section 3, the correction section 7 also multiplies the signal from the input terminal 1 inputted to the multiplication D/A 6 by 8-bit data, and outputs the result to the output terminal 9. Resistors R3 and R4 have equal values of r
When 8-bit data is set so that the gain Kb' of the multiplying D halo is %, the input/output frequency characteristic between the input terminal 1 and the output terminal 9 of the correction section 7 becomes flat.

FIG. 2 is a characteristic diagram showing the operation of an example of the correction section of the present invention. In this example, the capacitance of the capacitor C1 of the correction section 3 is 1.3.
The characteristics are shown when nF and resistances R1 and R2 are each 1.3Ω.

As shown in Figure 2, if □' is larger than % in the gain of multiplying D/A 2, capacitor C1 and resistor R
The high frequency range above the frequency determined by r, which is equal to 1 and R2, increases, and the gain decreases when 1' is less than %.

Therefore, if the correction sections 7 having capacitors cb with different capacitance values are connected in parallel, the high frequency range above another frequency determined by the capacitor Cb and r, which is equal to the value of the resistors R3 and R4, can be adjusted. It can be made variable, and a plurality of frequency bands can be made variable.

Next, the specific procedure and circuit operation when performing correction using the apparatus shown in FIG. 1 will be explained step by step.

First, digital data is transferred so that the gains of each multiplier D/A 2 and 6 are 1', K and I are %. At this time, the frequency characteristic between the human outputs 1 and 13 of the video line equalization circuit of this embodiment becomes flat. When a signal to be adjusted is connected to the input terminal 1, the manually inputted signal to be adjusted appears as it is at the output terminal 13. Output terminal 1
The A/D converter 14 connected to the CPU 3 samples a plurality of points of the white signal portion of the signal to be adjusted, and transfers the data to the CPU ts. The CPII 15 calculates data for correcting distortion according to equation (3), which will be described later, and transfers it to each multiplier [1/A 2 and 6, respectively.

The correction coefficient for the above distortion correction is set as follows.

The transfer characteristics of the equalization circuit according to the present embodiment are as follows: (1) Since s=jw, when a white signal (step-like) of amplitude IV is input manually, the following equation is obtained.

Therefore, by approximating the distorted signal using the above equation and inversely correcting it (by inverting the sign of b in the transfer characteristic of the circuit), the original white signal can be restored.

FIG. 3 is a waveform diagram showing an example of sample points of the signal of the white part of the color bar as the signal to be adjusted.

For example, as shown in the figure, the sample point to of the distorted white signal,
tl,””, tN(7) voltage value as Vo,V,,・
,VN,as,V-(V,,V,, ””,VN)
`` ``'' (a) However, T represents transposition in which rows and columns are reversed.

However, the squared error δ2 of all sample points when approximated by Ta-(:, r, T73-Cbr above equation (2) is δ2!1hair(vi-(Kθ+Kao-tI/Tcr+ β.-tl Pa')) becomes 2.
-(C) The above equation (C) is expressed as a vector V, a matrix Ex, and becomes as follows.

62= (V-Ex-K)T(V-Ex・K)
・= (d) aδ2 The error is minimized when □-〇, and from equation (d) in 9, δ" = V"-V-(Ex-K)TV-VT-Ex- +(Ex・ni)”−(Ex−K)9δ2 =−2EX−V+ 2 ExT−Ex−−09,′,ni=(Ex′−Ex)−′ 4x−V
...(3) However, K=(K6,
K, , β) T, where θ is the amplitude of the human white signal,
Ka/to θ.

β/θ is the coefficient when approximated by equation (2).

Multiplying D/A 2 and 6 of frequency correction circuit
, the distorted signal is corrected by transferring the value with its sign reversed. That is, k,=-Kc! /to θ (4
) k, = - to β / to θ (5
) to transfer digital data.

The digital data is control sensitivity sa, which will be described later.

Assuming Sβ, Da”-Ka/ (Sax Kt3)
(6) Dβ=-β/(Sβ× θ)(
7).

The term expressed by (Ex"4x)-'Ex in equation (3) for determining K is determined by the sample position and circuit constant, so it can be calculated in advance by fixing the sample point. Therefore, , K can be determined by one matrix multiplication.

To increase the correction accuracy, repeat the above steps.

Next, a method of setting the above-mentioned control sensitivities Sa and Sβ will be described.

The correction units 3 and 7 set the multiplication D/A 2 and 6 to an intermediate value (80h in the case of 8 bits; the last h is 1).
(representing a hexadecimal number), the frequency characteristics are flat.

By manually inputting a normal white signal without distortion and transmitting the maximum value (FFh) to the multiplier D/A 2 and the intermediate value (aoh) to the multiplier D/A 6, the corrector 3 A white signal distorted according to the characteristics is output to 13. The voltage at the sample points to, t+, ..., tN of this signal is taken into the CPII 15 by the A/D converter 14, and the value obtained by calculating the equation (3) is m・(K
,□niga,,O) becomes. The reason why Kβ is 0 is because the intermediate value is sent to the multiplier D/A 6 of the correction section 7. The control sensitivity Sa of the correction unit 3 is Sa・KccQl/(niaIllX (FFh-80h)) (8)
becomes.

Similarly, multiplying D/A 2 from CPt115
If the intermediate value (80h) is transferred to the multiplier D/A 6 and the maximum value (FFh) is transferred to the multiplier D/A 6, a white signal distorted according to the characteristics of the correction section 7 is output to the 13.

As in the case of the correction unit 3, if the value obtained by calculating equation (3) is Kn-(K, rl, O, β, l), the control sensitivity Sβ of the correction unit 7 is Sa・niβn/
(KMnx (FFh-aoh)) ・・・
(9) becomes.

Control sensitivity Sc! and Sa is the multiplying D/A
2 and 6 data in 1h which is the minimum unit of hexadecimal number
It shows the degree of influence on the approximation coefficient K when the approximation coefficient K is changed. Therefore, the data to be transferred to multiplying D/A 2 and 6 for correction is (
It also stops at equations (6) and (7).

The above operations are automatically performed by a program in the ROM 15A of the PU 15.

FIGS. 4(^) and 4(B) are flowcharts of data calculation processing according to an embodiment of the present invention.

FIG. 4(A) is a flowchart for setting the control sensitivities Sa and Sa.

To set the control sensitivity, first, in step Sl, FFh is transferred to the multiplier D/A 2 and 80h is transferred to the multiplier D/A 6.

In step S2, from the to/D converter 14 to the sample point t
0-1. import data. Next, in step S3, calculations of equations (3) and (8) are performed by the CPIJ 15, and the obtained value of Sa is written into the ROM 15A.

Next, in step S4, 80h is transferred to multiplying D/A2, and FF is transferred to multiplying D/A6.
Transfer h. In step S5, the A/D converter 14 outputs sample points t0 to 1. Import data. Next, in step S6, calculations of equations (3) and (9) are performed using CPIJ 1
Perform step 5, write the determined value of tears to I(OM 15A, and finish.

FIG. 4(B) is a flowchart for distortion correction control.

In order to correct and control line signal distortion, first, in step Sll, Sa and Sa are fetched from the ROM 15A. Next, in step S12, multiplying D/A
Transfer 80h to 2 and 6, respectively. Furthermore, in step S13, sample points t0 to t are output from the A/D converter 14.
Import data of N. Therefore, in step 514,
The calculation of equation (3) is performed by the CPU 15. Next, in step S15, it is determined whether the distortion correction coefficients Ka and β are within a certain range, that is, within the minimum unit in hexadecimal notation. Here, if Yes, the process ends.

On the other hand, if No, the process proceeds to the next step S16, and (6
) and (7) are calculated. Next, in step S17, the data of multiplexer D/A 2 is increased by Oa, and the data of multiplexer D/A 6 is increased by Dβ.
increase only. Then, the process returns to step S13 at step 515. The operations described above in steps S13 to S17 are repeated until β and β are within a certain range.

[Effects of the Invention] As is clear from the above, according to the present invention, in order to transmit a television video signal, the characteristics of a line configured at any time can be determined by using a commonly used reference white signal. Adjustment and equalization can be performed through automatic correction with a simple circuit configuration according to the actual situation.

Further, according to the present invention, the number of times data is calculated for control can be reduced, and automatic adjustment can be performed in a short time.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the configuration of an embodiment of the present invention, Fig. 2 is a characteristic diagram showing the operation of an example of the correction section of the invention, and Fig. 3 shows an example of sample points of the white part of the color bar. FIGS. 4A and 4B are a flowchart of data calculation processing according to an embodiment of the present invention, and FIG. 5 is a block diagram showing the configuration of a conventional snowmaking example. l...Input terminal, 2.6...Multiple D/A. 3.7,510... Correction section, 4.5,8.9,11.13... Output terminal, 10, 1
2...Amplifier, 14,515...A/D converter, 15,512...CPU. 15A...ROM. 501... Synchronization separation circuit, 502... Clock generation circuit, 503... Timing unit, 504... Input amplifier, 505... LC delay line with tap, 506-1 to 508-159... Multiplier, 507・
... Multiplication holding circuit, 508 ... Addition circuit, 509 ... Clamp circuit, 511 ... ROM-RAM, 513 ... Demultiplexer, 514 ... Reference signal, 516 ... IH high-speed buffer memory , 517...D
/A converter, 518... correction control unit.

Claims (1)

[Claims] Variable gain means capable of changing the gain of a specific frequency band; and means for changing the gain of the variable gain means when a reference white signal is input to the variable gain means. and storage means for storing an amount of change in the output white signal obtained from the variable gain means in correspondence with the amount of change in the gain, and an adjusted output white signal from the variable gain means. Accordingly, gain control means reads the amount of change in gain stored in the storage means and controls the gain of the variable gain means based on the amount of change in gain to equalize the white signal to be adjusted. An equalization circuit for video lines, which is characterized by: