JPS63142841A - Method of solder sheathing treating to lead frame - Google Patents
Method of solder sheathing treating to lead frameInfo
- Publication number
- JPS63142841A JPS63142841A JP29131886A JP29131886A JPS63142841A JP S63142841 A JPS63142841 A JP S63142841A JP 29131886 A JP29131886 A JP 29131886A JP 29131886 A JP29131886 A JP 29131886A JP S63142841 A JPS63142841 A JP S63142841A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- liquid
- lead frame
- sheathing
- unnecessary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 125
- 238000000034 method Methods 0.000 title abstract description 38
- 239000007788 liquid Substances 0.000 claims abstract description 42
- 239000011261 inert gas Substances 0.000 claims abstract description 11
- 230000004907 flux Effects 0.000 claims abstract description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000005406 washing Methods 0.000 claims abstract description 5
- 239000000843 powder Substances 0.000 claims description 14
- 239000003085 diluting agent Substances 0.000 claims description 5
- 238000000465 moulding Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 17
- 238000007747 plating Methods 0.000 description 12
- 238000007654 immersion Methods 0.000 description 6
- 230000002411 adverse Effects 0.000 description 5
- 238000007598 dipping method Methods 0.000 description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000000155 melt Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000004065 wastewater treatment Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 235000012771 pancakes Nutrition 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 238000003908 quality control method Methods 0.000 description 2
- 239000002202 Polyethylene glycol Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000003550 marker Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920001223 polyethylene glycol Polymers 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Molten Solder (AREA)
Abstract
Description
【発明の詳細な説明】
イ 発明の目的
ａ 産業上の利用分野
本発明は半導体パッケージ組立工程で、ボンディング・
モールディング後にリードフレームの半田外装必要箇所
に、半日または錫（以下単に半田という）を外装する方
法に関するものである。[Detailed Description of the Invention] A. Purpose of the Invention a. Industrial Field of Application The present invention is applicable to bonding and
The present invention relates to a method of sheathing half a day or tin (hereinafter simply referred to as solder) to the parts of a lead frame that require solder sheathing after molding.
ｂ 従来の技術
半導体パンケージ組立工程では、リードフレームの半田
外装必要箇所即ち主としてアクタリードに半田膜を外装
させる。これは後に、半導体パッケージをプリント基板
上にマクントする半田後工程を行なう際、その後工程を
効率的かつ精度よく行なえるようにするためのものであ
る。b. Prior Art In the semiconductor pancake assembly process, a solder film is applied to the parts of the lead frame that require solder coating, that is, mainly to the actuator leads. This is to enable the subsequent process to be performed efficiently and accurately when a post-soldering process for mounting the semiconductor package on a printed circuit board is performed later.
この半田外装方法としては、従来から２つの方法が広く
行われている。その第１は半田メッキ法であづて、これ
は電気メッキにより半田のメッキ膜を形成するもので、
薄く均一な膜を得られる特徴がある。第２は浸漬法（７
′イツプ法）で、これは半田溶液中に浸漬して半田層を
形成するもので、半導体組立ライン中への組込みを目ざ
して提案されｔものである。As this solder sheathing method, two methods have conventionally been widely used. The first method is solder plating, in which a solder plating film is formed by electroplating.
It has the characteristic of producing a thin and uniform film. The second method is the immersion method (7
This method forms a solder layer by immersing it in a solder solution, and was proposed with the aim of incorporating it into semiconductor assembly lines.
Ｃ発明が解決しようとする問題点
上記従来手段のうち半田メッキ法は、メッキ液中に含ま
れる光沢剤その雌の有機剤により、半田の濡れ性に問題
があるとともに、半田膜自体の性能にも悪影響を及ぼ°
Ｔおそれがある。ま几このメッキ法は、メッキ工程で生
ずる排液・排気の公害処理設備が必要である友め、高い
クリーン度が要求される半導体バツクージ組立工程とは
異質な作業環境であり、両者を１ラインに組込むことが
できない。そこで外部のメッキ専業者に外注し九り、別
棟にメッキ工場を設けているが、それでは極めて高い均
一性・高精度が要求される半導体パッケージとして、生
産管理・品質管理の完全性を期し短いという問題点があ
る。C. Problems to be Solved by the Invention Among the conventional methods mentioned above, the solder plating method has problems with the wettability of the solder due to the brightener and other organic agents contained in the plating solution, and also has problems with the performance of the solder film itself. also has a negative impact
There is a risk of T. This plating method requires equipment to treat pollution of waste liquid and exhaust gas generated in the plating process, and the work environment is different from the semiconductor bag assembly process, which requires a high level of cleanliness, and both can be combined in one line. cannot be incorporated into Therefore, we outsourced to an outside specialist plating company and set up a plating factory in a separate building, but this would take a short time to ensure complete production management and quality control as semiconductor packages require extremely high uniformity and precision. There is a problem.
池方浸漬法は、リードフレームのうち半田外装が必要な
主としてアクタリードだけｔ半田溶液中に浸漬させるも
のである。そのためアクタリードが両側に突出したり、
Ｉ、Ｐタイプの半導体パンケージで、しかも連条ではな
く１個ずつにカッティング後、各アクタリードを直角状
にベンディングさｎｆＣものでないと浸漬できない。同
様の理由で、アクタリードが４方向へ突出し友乎面状の
フラットタイプのものは処理不可能であり、汎用性・生
産性に欠ける方法と言わざるを得ない。In the Ikegata immersion method, only the Acta lead, which requires a solder sheath, of the lead frame is immersed in a solder solution. As a result, Acta Lead protrudes on both sides,
It cannot be immersed unless it is an nfC type I or P type semiconductor pancake, which is cut into individual pieces rather than continuous strips, and each Acta lead is bent at a right angle. For the same reason, it is impossible to process a flat type in which the Acta lead protrudes in four directions and has a rounded surface, and it must be said that this method lacks versatility and productivity.
しかもこの浸漬法は、付着する膜厚の調節が雉しく、不
均一となつ几り必要以上に厚い膜厚となりがちである。Moreover, with this dipping method, it is difficult to control the thickness of the deposited film, and the film tends to be non-uniform and thicker than necessary.
そのため半田膜がリード間にブリッジ状に付看して、プ
リント基板へマクンテイング時に装入用孔へ入らぬこと
もあり、まｔ半導体の高密度化に伴ない微細化するリー
ドフレームに対応することができない。さらに、半田溶
液の表面に浮遊する酸化膜が、リードに付着して半田の
濡れ性を害することがあるし、その上、２３０〜２５０
°Ｃもの高温の半田溶液の雰囲気が、半導体の回路に何
らかの悪影響をもｔら丁可能性がある、という問題点も
ある。As a result, the solder film may form a bridge between the leads and may not enter the charging hole during mounting onto the printed circuit board.In addition, the solder film may form a bridge between the leads and may not enter the charging hole when mounting the printed circuit board. I can't. Furthermore, the oxide film floating on the surface of the solder solution may adhere to the leads and impair the wettability of the solder.
Another problem is that the atmosphere of the solder solution, which is as high as 0.degree. C., may have some adverse effect on semiconductor circuits.
不発Ｆ３Ａはリードフレームへの上記従来の半田外装方
法が有する問題点を解決しようとするものである。即ち
本発明の目的は、半田膜全均一で薄く、高質・高純度で
濡れ性もよく形成できるとともに、Ｄ、■、Ｐタイプは
勿論のことフラットタイプのものも、かつ１個ずつでは
なく多数個が一枚となつ几連条のものを処理でき、しか
も無公害・コンパクトな設備で、半導体バンクージ組立
うイン中に組込むことができ、それにより半導体パッケ
ージ組立の生産性・経済性の向上と、品質の安定性を高
められるような、リードフレームへの半田外装方法を提
供することにある。Misfire F3A is an attempt to solve the problems of the conventional solder sheathing method for lead frames. That is, the purpose of the present invention is to be able to form a solder film that is completely uniform, thin, high quality, high purity, and has good wettability, and to form a solder film that is not only of D, ■, and P types but also of flat type, and not only one by one. It is capable of processing a large number of pieces in one piece, and is also pollution-free and compact, and can be incorporated into the semiconductor package assembly system, thereby improving the productivity and economy of semiconductor package assembly. Another object of the present invention is to provide a solder sheathing method for lead frames that can improve quality stability.
口 発明のｉ成
ａ 問題点を解決する几めの手段
本発明に係るリードフレームへの半田外装方法は、連条
のリードフレーム（１）にボンディング・モールディン
グをし念後、該リードフレームｕｉＪを半田の微粉末（
４）とフラツクスが稀釈剤で混合され几半田液（３）中
を通して、リードフレーム（υの半田外装必要箇所（２
Ｊに該液（３）を付看させ、液厚を均一にするとともに
不要箇所に付着の液（３）を除去し、読いて不活性ガス
（５）中でリフローし微粉末（４）を溶融させて溶融半
田層（６）を形成し、それを凝固させて半田膜（７）を
形成させ足後、不要半田や不要フラックス（８）を水洗
・除去するように構成したものであるヶ
上記構成に２いて、半田外装とは前記の如く半田膜（７
）の形成の池に、錫膜の場合も含むものである。半田外
装必要箇所（２）とは、リードフレーム田の主としてア
クタリードの部分であり、不要箇所とはモールド部分（
９）を含むそれ以外の部分をいう。A method for soldering a lead frame according to the present invention is to perform bonding and molding on a continuous lead frame (1), and then attach the lead frame uiJ to the lead frame (1). Fine solder powder (
4) and the flux are mixed with a diluent and passed through the solder liquid (3), and then solder coated parts (2) of the lead frame (υ) are mixed with a diluent.
Have J watch over the liquid (3), make the liquid thickness uniform and remove the liquid (3) that adheres to unnecessary areas, read and reflow in inert gas (5) to form fine powder (4). The solder layer is melted to form a molten solder layer (6), solidified to form a solder film (7), and then unnecessary solder and flux (8) are washed away with water. In the above configuration, the solder sheath is the solder film (7
) also includes the case of tin film. The areas where solder sheathing is required (2) are mainly the Acta lead parts of the lead frame field, and the areas where solder is not needed are the mold parts (2).
9).
′１九ここで使用するリードフレーム（１） １４ 、
アクタリードが２方同に突出し後はど直角状にベンディ
ングされるり、工、Ｐタイプのものに限らず、アクタリ
ードが４方向に突出しｔフラットタイプのものも含む。'19 Lead frame used here (1) 14,
After the acta lead protrudes in two directions, it is bent at right angles, and is not limited to the straight and P type, but also includes the t-flat type, in which the acta lead protrudes in four directions.
半田微粉末（４）と７２ツクスを稀釈剤で混合した半田
液（３）とは、適量の鉛と錫とからなる半田の共晶を、
例えば５００メツシュ程度に微粉化し、これに水溶性の
例えばポリエチレングリコール系のフラックスを混合し
、稀釈剤とじて例えばイソプロピルアルコール（工、Ｐ
、ａ ）を用いた液が望ましく、常温のものを用いれば
よい。The solder liquid (3), which is a mixture of fine solder powder (4) and 72Tx with a diluent, is a solder eutectic consisting of appropriate amounts of lead and tin.
For example, it is finely powdered to about 500 mesh, mixed with water-soluble flux such as polyethylene glycol, and used as a diluent such as isopropyl alcohol.
, a) is preferable, and one at room temperature may be used.
リードフレーム（１）を上記半田液（３）中を通すとは
、大別して２種の方法があり、その１つは半田液槽内に
浸漬（７′イソピング）ｆることであり、その２は図示
例の如く噴流する半田液（３）中？通過させることであ
る。ま几、半田外装必要箇所（２）に半田液（３）を付
着させるには、例えばその必要箇所（２）のみが開口し
之板状のマスク叫、あるいは同様のシート状のマスク（
図示略）にて、リードフレーム（υの両凹からマスキン
グし半田液（３）中を通せばよい。There are two methods for passing the lead frame (1) through the solder solution (3). One is immersion (7' isoping) in the solder solution bath, Is it in the solder liquid (3) that is jetting as shown in the example? It's about letting it pass. In order to attach the solder liquid (3) to the required location (2) of the solder exterior, for example, use a plate-shaped mask with only the required location (2) open, or a similar sheet-shaped mask (
It is sufficient to mask both concavities of the lead frame (υ) using a lead frame (not shown) and pass it through the solder liquid (3).
半田外装必要箇所（２）の液厚を均一にするとともに、
不要箇所に付着の半田液（３）を除去するには、例エバ
ローラ・スキージるるいは図示例の如くエアーナイフ（
１１）を用いればよい。In addition to making the liquid thickness uniform in the solder sheathing required location (2),
To remove the solder liquid (3) attached to unnecessary areas, use an Everroller squeegee or an air knife (as shown in the figure).
11) may be used.
９７０−は不活性ガスＬ５）中で行なうが、それには例
えばフレオン系不活性ガスを用いたベーパ７エーズリ７
０−法によるのがよい。このリフローの処理温度は、リ
ードフレーム（１）に付着し几半田液（３）中の半田微
粉末（４）が溶融する２１５°Ｃ程度でよい。970- is carried out in an inert gas L5), for example, using a vapor 7 Aisli 7 using a Freon-based inert gas.
It is better to use the 0-method. The processing temperature for this reflow may be about 215° C. at which the fine solder powder (4) attached to the lead frame (1) and in the solid solder liquid (3) melts.
半田膜（７）厚の調節は、半田液（３）中に混合される
半田微粉末（４）の量、ま之はリードフレーム（υが半
田液（３）中を通過する時間、あるいはリードフレーム
（１）上の液厚を均一にする際の例えばエアーナイフｕ
ｌ）の強弱等の調α１１により行えばよい。The thickness of the solder film (7) can be adjusted by adjusting the amount of fine solder powder (4) mixed into the solder liquid (3), the time it takes for the lead frame (υ) to pass through the solder liquid (3), or the amount of time the lead frame (υ) passes through the solder liquid (3). For example, air knife u when making the liquid thickness uniform on the frame (1).
This may be done using the key α11 such as strength and weakness of l).
図に２いて、＠は半導体チップ、α３はタイバー、Ｑ４
）は半田液噴流パイプ、αＱは冷却パイプで不活性ガス
（５）が逃げるのを防止するためのもの、αＱは後処理
用の水洗ノズルを示す。2 in the figure, @ is the semiconductor chip, α3 is the tie bar, Q4
) indicates a solder liquid jet pipe, αQ indicates a cooling pipe for preventing inert gas (5) from escaping, and αQ indicates a water washing nozzle for post-processing.
ｂ 作 用 本発明の工程の概略は第１図に示す通りである。b for work The outline of the process of the present invention is as shown in FIG.
複数個分が連続しｔ第２図のような連条のリードフレー
ム（１）で、第３図の如くボンディング・モールディン
グをしたものに、第１図に２ける如くその半田不要箇所
をマスキングする。このリードフレーム＜１）を、半田
微粉末（４）とフラツクスを碑釈剤で混合した半田液（
３）中を通すと、露出している半田外装必要箇所（２）
即ち主としてアクタリードの表・裏・側面に、第４図の
ように半田液（３）が付着する。Mask off the parts where solder is not required as shown in Fig. 1 on a continuous lead frame (1) made up of multiple parts as shown in Fig. 2, which has been bonded and molded as shown in Fig. 3. . This lead frame <1) is bonded to a solder solution (4) containing fine solder powder (4) and flux mixed with a marking agent.
3) When you pass through the inside, the solder exterior is exposed (2)
That is, the solder liquid (3) mainly adheres to the front, back, and side surfaces of the Acta Lead as shown in FIG.
続いて該リードフレームｔｒ） ｋ ％伺えばエアーナ
イフを通丁こと：でよって付着している半田液（３）の
液厚を均一にするとともに、不要箇所に付着の液（３）
例えばリード間にブリッジ状に付着している液を除去し
、必要箇所（２）のみに半田液（３ンの層を形成する。Next, pass an air knife through the lead frame (tr)k%: this will make the thickness of the adhering solder liquid (3) uniform, and remove the adhering liquid (3) from unnecessary parts.
For example, remove the liquid adhering in the form of a bridge between the leads, and form a layer of solder liquid (3 ml) only in the necessary locations (2).
次にマスク四を外し之後、該リードフレーム（Ｌｊを不
活性ガス（５）中でリフローするが、その除の温度は前
記の如く２１５°Ｃ程度である。その尺め、半田液（３
）中の半田微粉末（４）が溶融して、第５図の如くリー
ドフレーム田の半田外装必要箇所（２）に薄く溶融半田
層（０）が形成される。この場合に、フレオン系ガスの
叩き不活性ガス（５）中でのりフローである之め、熱分
布が均一になってｐす、半田微粉末（４）の溶融も均一
に行われ該半田層（り厚は均一となる。１だここでの温
度は、前記の如く半田微粉末（４）が溶融可能なもので
あれば充分であるから、半８：Ｉ浸漬法の液温に比べて
低いし、不活性ガス（５）を介しての緩慢な加熱でろる
之め、半導体チップ＠に悪影響金及ぼさない。Next, after removing the mask 4, the lead frame (Lj) is reflowed in an inert gas (5) at a temperature of about 215°C as mentioned above.
) is melted, and a thin molten solder layer (0) is formed in the solder sheathing area (2) of the lead frame solder as shown in FIG. In this case, since the Freon gas is beaten and the solder flows in the inert gas (5), the heat distribution becomes uniform, and the fine solder powder (4) is also melted uniformly, so that the solder layer is melted uniformly. (The thickness will be uniform. The temperature at 1 is sufficient as long as the fine solder powder (4) can be melted as described above. It is low in temperature and slow heating through the inert gas (5) does not adversely affect the semiconductor chip.
上記リフｏ−ｆ終ることで、外装必要筒所（２）上の溶
融半田層（６）は溶融状態から凝固して、第６図の叩く
半田膜（７）が形成されるが、その膜厚は均一で高精度
なものである。When the above-mentioned reflux is completed, the molten solder layer (6) on the exterior necessary tube place (2) solidifies from the molten state, and the solder film (7) shown in Fig. 6 is formed. The thickness is uniform and highly accurate.
次の水洗処理では、半田膜（７）表面や半田外装不要箇
所に付着の革質な半田や不要フラツクス（８）が水洗・
除去されて、第７図の如く半田外装必要箇所（２）にだ
け薄く均一な半田Ｍ （’／）の叶いｆ ’Ｊ−ドフレ
ーム（１）が得られる。In the next water washing process, the leathery solder and unnecessary flux (8) adhering to the surface of the solder film (7) and areas where the solder exterior is not required are removed by washing with water.
As a result, as shown in FIG. 7, a thin and uniform solder M ('/) is formed on a thin and uniform solder frame (1) only at locations (2) where solder sheathing is required.
な２その後１ｑ、Ｄ、工、Ｐタイプのリードフレームな
らばカッティング・ベンディングを行ない、フラットタ
イプのものであればカッティング？行なえばよい。まｔ
リードフレーム（ｉ）の種類に対応して、半田膜（７）
の厚みの薄・厚を調節し之い場合には、前記の如く半田
液（３）中の半田微粉末（４）の量、まえはリードフレ
ーム（１）が半田液（３）中を通過する時間、あるいは
リードフレーム（１）上の液厚全均一にする摩の例えば
エアーナイフＩ、１υの強弱等ｒ調節丁ればよい。After that, if it is a 1q, D, work, or P type lead frame, perform cutting and bending, and if it is a flat type, do cutting and bending. Just do it. Yes
Solder film (7) depending on the type of lead frame (i)
When adjusting the thickness of the lead frame (1), the amount of fine solder powder (4) in the solder liquid (3) is adjusted as described above. It is sufficient to adjust the amount of time or strength of the air knife I, 1υ, etc. to make the liquid thickness completely uniform on the lead frame (1).
ハ 発明の効果
ａ Ｄ、工、Ｐタイプで複数個が連続し之連条のまま
のリードフレームや、アクタリードが４方に突出し之フ
ラットタイプのリードフレームにも、必要１所に容易に
半田膜が形成てさる。即ち、従来の半田浸漬法では、リ
ードフレームのアクタリードだけを半田溶液中に浸漬さ
せるため、Ｄ、工、Ｐタイプでは１個ずつにカッティン
グされ、かつアクタリードが直角状にベンディングされ
ｔものでないと処理できない。ま几フラットタイプでは
全く処理できなかった、
しかじ不発８１−１は、上記の如き構成・作用により、
Ｄ、１．Ｐタイプはもとより７ラツトタイプも複数個が
連続し友連粂のままで、アクタリードに半田膜を形成す
ることができる。それゆえ、従来と異なり１つの設備を
汎用的に使用できることになる。C. Effects of the invention a. A solder film can be easily applied to a single necessary location even on lead frames of D, engineering, and P types in which a plurality of leads remain in a continuous line, as well as flat type lead frames with actuator leads protruding in four directions. is formed. In other words, in the conventional solder immersion method, only the Acta leads of the lead frame are immersed in the solder solution, so the D, Mach, and P types are cut one by one, and the Acta leads are bent at right angles and cannot be processed. Can not. The misfire 81-1, which could not be treated at all with the flat type, can be treated with the above structure and action.
D.1. Not only the P type but also the 7 rat type can be used to form a solder film on the Acta lead with a plurality of them in a row and still in the same state. Therefore, unlike before, one piece of equipment can be used for general purposes.
ｂ ＩＪ−ドフレームの必要箇所に、薄く均一で精度の
よい半田膜を形成できる。即ち、従来の半田メッキ法で
は、光沢剤中の何機物が析出して、後の７’ ＩＪント
基板への半田付特性を悪くしている。b. A thin, uniform, and highly accurate solder film can be formed at the necessary locations on the IJ-deframe. That is, in the conventional solder plating method, some substances in the brightener precipitate and deteriorate the subsequent soldering characteristics to the 7' IJt board.
ま念半田浸漬法では、半田膜の膜厚がバラつくとともに
必要以上に厚くなり、特にｔ細化し７’ｎ ＩＪ −ド
フレームではリード間に半田のブリッジが生じて不良品
となったり、プリント基板へのマクシト時に装入用孔へ
入らぬこともあつ九。With the careful solder immersion method, the solder film thickness varies and becomes thicker than necessary. Especially in T-thin 7'n IJ-de frames, solder bridges occur between the leads, resulting in defective products and printing problems. When loading the board onto the board, it may not fit into the charging hole.
これに対して本発明では、前記の如き＠説・作用により
、リードフレームの必要箇所に薄く均一かつ精度よく半
田膜を形成できる。そのため従来と異なり、有機不純物
の析出がなく半田付着住金良好にできる。またリード間
に半田のブリッジができず、不良品が生じ難いし、後の
プリント基板の装入用孔へリードを容易に差入れられ、
マクントをスムーズに行なうことができる。On the other hand, according to the present invention, a thin, uniform, and accurate solder film can be formed at necessary locations on the lead frame due to the above-mentioned @ theory and operation. Therefore, unlike the conventional method, there is no precipitation of organic impurities and good solder adhesion to the metal can be achieved. In addition, solder bridges do not form between the leads, making it difficult to produce defective products, and the leads can be easily inserted into the insertion holes of the printed circuit board later.
You can perform makunt smoothly.
Ｃリードフレームの種類に応じて、それに適当な半田−
厚を形成することが容易である。即ち、従来の半田メッ
キ法や浸漬法では、膜厚の調節が不可能ま友は困並であ
る。しかし本発明では、前記の如く半田液中の半田微粉
末の量、リードフレームが半田液中を通る時間、あるい
は液厚を均一にする除の例えばエアーナイフの強弱を調
節することによ゛す、容易に半田膜厚の薄・厚を調節で
きることになる。C. Depending on the type of lead frame, use the appropriate solder.
Easy to form thick. That is, with the conventional solder plating method or dipping method, it is difficult to adjust the film thickness. However, in the present invention, as described above, it is possible to adjust the amount of fine solder powder in the solder liquid, the time the lead frame passes through the solder liquid, or the strength of the air knife to make the liquid thickness uniform. This means that the thickness of the solder film can be easily adjusted.
ｄ 排水処理設備の如き公害処理施設が不ａであるとと
もに、半導体組立工程へのインライン化と自動化？図れ
る。即ち、従来のメッキ法では排水処理設備が必要でコ
スト高となるし、半導体組立工程とは異質なメッキ処理
をインライン化できなかつ友。これに対して本発明は、
排水処理設備が不要であるし、半導体組立工程と同様に
クリーンな条件下での工程である。そのため、インライ
ン化を図ｎるとともに自動化が可能で、生産性の向上と
品質管理に完全を期すことができる。d. Pollution treatment facilities such as wastewater treatment facilities are inadequate, and in-line and automation of semiconductor assembly processes? I can figure it out. In other words, conventional plating methods require wastewater treatment equipment, which increases costs, and the plating process, which is different from the semiconductor assembly process, cannot be done in-line. In contrast, the present invention
There is no need for wastewater treatment equipment, and the process is conducted under clean conditions similar to the semiconductor assembly process. Therefore, it is possible to perform in-line and automation, and it is possible to improve productivity and ensure perfect quality control.
ｅ 半導体回路が高熱による悪影響を受けない。即ち、
従来の半田浸漬法では半田が溶融している約２４０°Ｃ
の高温の液中に、リードフレームのアクタリードを浸漬
させ之。その之め、高温と急激な温度差によりモールド
内の半導体回路が悪影響を受けることがあった。e Semiconductor circuits are not adversely affected by high heat. That is,
In the conventional solder dipping method, the solder melts at about 240°C.
The lead frame ActaLead is immersed in the high-temperature liquid. As a result, the semiconductor circuits inside the mold may be adversely affected by high temperatures and sudden temperature differences.
しかし本発明は、前記の如くリフローでの温度は半田微
粉末が溶融する約２１５°Ｃの温度で充分に処理できる
穴め、浸漬法とは２５°Ｃ％温度差があり影響を少なく
できる。′１′ｆｃ不活性ガス中での緩慢な加熱である
ので、高温の液中への浸漬による急激な温度上昇と異な
り、半導体回路への悪影響を防止することができる。However, in the present invention, as mentioned above, the reflow temperature is about 215°C, which is the temperature at which the fine solder powder melts, which is a 25°C% temperature difference from the drilling and dipping method, which can sufficiently process the temperature, so that the influence can be reduced. '1' fc Since the heating is done slowly in an inert gas, it is possible to prevent an adverse effect on the semiconductor circuit, unlike a sudden temperature rise caused by immersion in a high-temperature liquid.
図は本発明の実施例を示すもので、第１図は本発明の工
程の全体を示″ｒ概略図、第２図、第３図、＠４図、第
５図、第６図、第７図は各工程での一部拡大縦断面図で
ある。
図面符号（１）・・・リードフレーム、（２）・・・半
田外装必要箇所、（＝）・・・半田液、（４）・・・半
田微粉末、（Ｅ）・・・不活性ガス、（６）・・・溶融
半田層、（７）・・・半田暎第１図
第２図
第３図
第４悶
第５図
第６図
第７図The figures show examples of the present invention, and Figure 1 shows the entire process of the present invention. Figure 7 is a partially enlarged vertical cross-sectional view of each process. Drawing code (1)...Lead frame, (2)...Solder sheath required area, (=)...Solder liquid, (4) ...Fine solder powder, (E)...Inert gas, (6)...Melted solder layer, (7)...Solder temperature Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7
Claims (1)
ールディングをした後、該リードフレーム（１）を半田
微粉末（４）とフラックスとが稀釈剤で混合された半田
液（３）中を通して、リードフレーム田の半田外装必要
箇所（２）に該液（３）を付着させ、液厚を均一にする
とともに不要箇所に付着の液（３）を除去し、続いて不
活性ガス（５）中でリフローし微粉末（４）を溶融させ
て溶融半田層（６）を形成し、それを凝固させて半田膜
（７）を形成させた後、不要半田や不要フラックス（８
）を水洗・除去するようにした、リードフレームへの半
田外装処理方法。[1] After bonding and molding a continuous lead frame (1), the lead frame (1) is passed through a solder liquid (3) in which fine solder powder (4) and flux are mixed with a diluent, Apply the liquid (3) to the areas (2) where the solder exterior is required on the lead frame field, make the liquid thickness uniform, remove the adhering liquid (3) from unnecessary areas, and then soak in an inert gas (5). After reflowing and melting the fine powder (4) to form a molten solder layer (6) and solidifying it to form a solder film (7), unnecessary solder and unnecessary flux (8) are removed.
) is removed by washing with water.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29131886A JPS63142841A (en) | 1986-12-05 | 1986-12-05 | Method of solder sheathing treating to lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29131886A JPS63142841A (en) | 1986-12-05 | 1986-12-05 | Method of solder sheathing treating to lead frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63142841A true JPS63142841A (en) | 1988-06-15 |
| JPH0312780B2 JPH0312780B2 (en) | 1991-02-21 |
Family
ID=17767353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29131886A Granted JPS63142841A (en) | 1986-12-05 | 1986-12-05 | Method of solder sheathing treating to lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63142841A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5486275A (en) * | 1977-12-21 | 1979-07-09 | Nec Corp | Manufacture of semiconductor |
| JPS61267355A (en) * | 1985-05-21 | 1986-11-26 | Fuji Plant Kogyo Kk | Cladding process at semiconductor package assembly process |
| JPS62240161A (en) * | 1986-04-14 | 1987-10-20 | Tamura Seisakusho Co Ltd | Soldering device for electronic component lead |
-
1986
- 1986-12-05 JP JP29131886A patent/JPS63142841A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5486275A (en) * | 1977-12-21 | 1979-07-09 | Nec Corp | Manufacture of semiconductor |
| JPS61267355A (en) * | 1985-05-21 | 1986-11-26 | Fuji Plant Kogyo Kk | Cladding process at semiconductor package assembly process |
| JPS62240161A (en) * | 1986-04-14 | 1987-10-20 | Tamura Seisakusho Co Ltd | Soldering device for electronic component lead |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0312780B2 (en) | 1991-02-21 |
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