JPS63139100A - Member for producing compound semiconductor single crystal and production thereof - Google Patents

Member for producing compound semiconductor single crystal and production thereof

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Publication number
JPS63139100A
JPS63139100A JP28414786A JP28414786A JPS63139100A JP S63139100 A JPS63139100 A JP S63139100A JP 28414786 A JP28414786 A JP 28414786A JP 28414786 A JP28414786 A JP 28414786A JP S63139100 A JPS63139100 A JP S63139100A
Authority
JP
Japan
Prior art keywords
quartz
single crystal
compound semiconductor
aln
semiconductor single
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28414786A
Other languages
Japanese (ja)
Inventor
Masayoshi Aoyama
正義 青山
Seiji Mizuniwa
清治 水庭
Mitsuaki Onuki
大貫 光明
Sadahiko Sanki
参木 貞彦
Morio Hojo
北条 盛夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP28414786A priority Critical patent/JPS63139100A/en
Publication of JPS63139100A publication Critical patent/JPS63139100A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To produce the titled member causing no cracking and producing a small strain on the interface between the layers by forming a coating layer of BN, AlN or Al2O3 on the surface of a quartz member especially with an intermediate layer in-between. CONSTITUTION:A high frequency coil 2 is placed in an ion plating vessel 1 and a quartz member 9 is set in the coil 2 with the open end downward. Si in a crucible 3 is evaporated by heating with an electron gun 5 and O2 is introduced from a pipe 6 and ionized by high frequency plasma. N2 is further introduced from a pipe 7 and ionized and B or Al in a crucible 4 is evaporated by heating to form an intermediate layer of Si-O-B-N and/or Si-O-Al-N whose coeffts. of thermal expansion is between the coeffts. of thermal expansion of quartz and BN, AlN or Al2O3. The evaporation of Si is then stopped and a coating layer of BN, AlN or Al2O3 is formed.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は化合物半導体単結晶製造用部材及びその製造方
法に係り、待に1it−V族化合物のrf成に用いるボ
ート、ライナー管1反応管ボート支持台2反応管、ルツ
ボ、コンテナー等に関するものである。
Detailed Description of the Invention [Industrial Application Field] The present invention relates to a member for producing a compound semiconductor single crystal and a method for producing the same, and particularly relates to a boat, a liner tube, and a reaction tube used for RF synthesis of an IT-V group compound. Boat support stand 2 This relates to reaction tubes, crucibles, containers, etc.

[従来の技術] 従来から、この種の単結晶製造用の容器としては純度、
耐熱性及び加工性に優れた石英ガラスが主に用いられて
いる。ところが、石英ガラスはGaあるいはGaAsと
次の(1)式の反応が進み、GaAsに81が混入して
しまう。
[Prior Art] Conventionally, containers for producing single crystals of this type have been used to
Quartz glass, which has excellent heat resistance and workability, is mainly used. However, quartz glass undergoes a reaction with Ga or GaAs according to the following equation (1), and 81 is mixed into GaAs.

SiO2+4Ga −+ Si+ 2Ga20↑  −
(+)また、石英反応管を用いる場合には石英とGaあ
るいはGaAs内のSiが次の(2)式の反応を行ない
SiOガスが発生し、これがGaAs内へのSi混入の
原因となる。
SiO2+4Ga −+ Si+ 2Ga20↑ −
(+) Furthermore, when a quartz reaction tube is used, quartz and Ga or Si in GaAs undergo a reaction according to the following equation (2) to generate SiO gas, which causes Si to be mixed into GaAs.

Si+Si02→2SiO↑     ・・・ (2)
このSi汚染を防止するために石英ガラスの代わりにB
N、 AQN 、 Ajh03からなる容器が考えられ
る。
Si+Si02→2SiO↑ ・・・ (2)
To prevent this Si contamination, B was used instead of quartz glass.
A container consisting of N, AQN, Ajh03 is considered.

特に、半導体単結晶を!lI造する際に使用されるボー
トやルツボの材料としてはP−BNが用いられていた。
Especially semiconductor single crystals! P-BN was used as the material for boats and crucibles used in II construction.

しかし、BN、 AlN 、 M2O3製の反応容器や
ボートは溶接が難しくかつ高価であるという欠点があっ
た。
However, reaction vessels and boats made of BN, AlN, and M2O3 have the disadvantage that welding is difficult and expensive.

そこで石英ガラスの表面にBN、 AQNあるいはIV
!203をコーティングしてGaAs中へのSiの混入
防止を図る方法が以下の■〜■の各公報に提案されてい
る。
Therefore, BN, AQN or IV is applied to the surface of the quartz glass.
! A method of coating GaAs with 203 to prevent Si from being mixed into GaAs has been proposed in the following publications (1) to (2).

■ 特公昭49−42419号公報 ■ 特開昭55− 77748号公報 ■ 特開昭59−217700号公報 ■ 特開昭59−227800278 00号公報■0−255698号公報 しかしながら、BNやMLN 、 M2O3はSiO2
と大きく異なる熱膨張係数を有しているので、GaAs
単結晶成長による熱サイクルを受けるとコーテイング膜
にクラックが発生し充分な効果をあげることが出来なか
った。
■ Japanese Patent Publication No. 49-42419 ■ Japanese Patent Application Publication No. 77748-198 ■ Japanese Patent Publication No. 217700-1970 ■ Japanese Patent Publication No. 59-227800278 00 ■ Publication No. 0-255698 However, BN, MLN, M2O3 SiO2
GaAs has a thermal expansion coefficient significantly different from that of GaAs.
When subjected to thermal cycles due to single crystal growth, cracks occurred in the coating film and sufficient effects could not be achieved.

従来、この問題点を解決するために中間化合物を被覆す
る試みが行なわれている。例えば特開昭60−1416
96号公報ではSi3N4を介して8Nを形成し、これ
によりクラック発生防止に効果をあげる方法が本出願人
により提案された。
Conventionally, attempts have been made to coat intermediate compounds in order to solve this problem. For example, JP-A-60-1416
In Japanese Patent No. 96, the applicant proposed a method in which 8N is formed through Si3N4, which is effective in preventing the occurrence of cracks.

しかし、それでもなお熱サイクルを数多く繰り返すとク
ラックが入るという現象が認められた。
However, it was still observed that cracks appeared after repeated thermal cycles.

石英部材及びそのコーテイング材は高価なものであり、
使用可能回数の増加が望まれていた。
Quartz members and their coating materials are expensive;
It was hoped that the number of times it could be used would increase.

[発明が解決しようとする問題点] このように、石英部材にBN、 AQN 、 Al2O
3等のコーティングを施してもGaAs結晶成長による
熱サイクルを受けると、石英とコーテイング膜の熱膨張
係数の差でクラックが入り易いという問題があっだ。
[Problems to be solved by the invention] In this way, BN, AQN, and Al2O are used in the quartz member.
Even if a No. 3 coating is applied, there is a problem in that when subjected to thermal cycles due to GaAs crystal growth, cracks are likely to occur due to the difference in thermal expansion coefficient between the quartz and the coating film.

特に、従来はCVD法あるいはプラズマCVD法等で8
8. AQN 、 SiC、Si3N4等の化合物膜を
直接石英上に形成していたので、Si02− BN、 
Si02−AlN 、 Si02−3iC、Si02−
8i3N4等の界面に歪が集中し、クラックが発生し易
かった。
In particular, conventional methods such as CVD or plasma CVD have been used to
8. Since compound films such as AQN, SiC, and Si3N4 were formed directly on quartz, Si02-BN,
Si02-AlN, Si02-3iC, Si02-
Strain was concentrated at the interface of 8i3N4, etc., and cracks were likely to occur.

従ってSi汚染の少ない半導体単結晶を再現性良く製造
することが困難であった。
Therefore, it has been difficult to produce semiconductor single crystals with low Si contamination with good reproducibility.

かくして本発明の目的は前記した従来技術の問題点を解
消し、Si汚染のない化合物半導体単結晶を1qること
が出来る化合物半導体単結晶製造用部材及びその製造方
法を提供することにある。
SUMMARY OF THE INVENTION Thus, an object of the present invention is to solve the problems of the prior art described above and to provide a member for manufacturing a compound semiconductor single crystal and a method for manufacturing the same, which can produce 1 q of compound semiconductor single crystals free from Si contamination.

[問題点を解決するための手段] 本発明の化合物半導体単結晶製造用部材は上記目的を達
成するために、石英部材表面上にBN。
[Means for Solving the Problems] In order to achieve the above object, the compound semiconductor single crystal manufacturing member of the present invention includes BN on the surface of the quartz member.

At1NあるいはAl2O3からなる被覆層が設けられ
た化合物半導体単結晶製造用部材において、上記石英部
材と上記被覆層との間にその熱膨張係数が石英と上記被
覆層をなすBN、 AfLNあるいはM2O3との中間
の値を有するSi−0−B−N系物質、 Si −0−
M−N系物質あるいはこれらの複合組成の物質からなる
中間層を設けたものである。
In a compound semiconductor single crystal production member provided with a coating layer made of At1N or Al2O3, the thermal expansion coefficient between the quartz member and the coating layer is the same as that of quartz and BN, AfLN or M2O3 forming the coating layer. Si-0-B-N material with intermediate value, Si-0-
An intermediate layer made of an M--N type material or a composite composition thereof is provided.

また、このような部材は石英部材の表面上にその熱膨張
係数が石英とBN、 AlNあるいはM2O3との中間
の値を有するSi−0−B−N系物質、 Si −0−
A1−N系物質あるいはこれらの複合組成の物質からな
る中間層をイオンプレーティング法により形成した後、
該中間層の上にON、 AfLNあるいはM2O3から
なる被覆層を設Gプることにより製造される。
In addition, such a member includes a Si-0-B-N-based material, Si-0-, on the surface of the quartz member, whose coefficient of thermal expansion is intermediate between that of quartz, BN, AlN, or M2O3.
After forming an intermediate layer made of an A1-N material or a composite composition of these materials by an ion plating method,
It is manufactured by providing a coating layer made of ON, AfLN or M2O3 on the intermediate layer.

[作 用] 以上のように、石英部材と被覆層との間にこれら両者の
中間の熱膨張係数を有する中間層をイオンプレーティン
グ法によって形成することにより、GaAs結晶成長に
よる熱サイクルを加えた場合に各層の界面部に発生する
歪を小さくすることが可能となり、その結果クラックの
発生が防止される。
[Function] As described above, by forming an intermediate layer between the quartz member and the covering layer using the ion plating method, the intermediate layer has a coefficient of thermal expansion intermediate between the two, thereby applying a thermal cycle due to GaAs crystal growth. In this case, it becomes possible to reduce the strain that occurs at the interface between each layer, and as a result, the occurrence of cracks is prevented.

なお、中間層の組成は熱膨張係数による割れの防止の観
点から層面に垂直な方向に連続的に変化するのが望まし
く、多層の膜から構成しても良い。
Note that the composition of the intermediate layer preferably changes continuously in the direction perpendicular to the layer surface from the viewpoint of preventing cracks due to the coefficient of thermal expansion, and may be composed of a multilayer film.

[実施例] 以下、本発明の実施例を添付図面に従って説明する。[Example] Embodiments of the present invention will be described below with reference to the accompanying drawings.

実施例1 第1図は本発明の一実施例に係る化合物半導体単結晶製
造用部材の製造方法を実施するためのイオンプレーティ
ング装置の構成図である。
Embodiment 1 FIG. 1 is a configuration diagram of an ion plating apparatus for carrying out a method for manufacturing a member for manufacturing a compound semiconductor single crystal according to an embodiment of the present invention.

イオンプレーティング容器1内に高周波コイル2が設け
られており、高周波コイル2の下方に2つのルツボ3及
び4が横に並べて配置されている。さらに、これらのル
ツボ3及び4の下方に電子銃5が設けられると共にルツ
ボ3及び4の上部にはイオンプレーティング容器1の外
部から酸素導入管6及び窒素導入管7がそれぞれ導かれ
ている。また、イオンプレーティング容器1の内側面に
沿ってヒータ8が配設されている。
A high frequency coil 2 is provided in an ion plating container 1, and two crucibles 3 and 4 are arranged side by side below the high frequency coil 2. Furthermore, an electron gun 5 is provided below these crucibles 3 and 4, and an oxygen introduction pipe 6 and a nitrogen introduction pipe 7 are led from outside of the ion plating container 1 to the upper parts of the crucibles 3 and 4, respectively. Further, a heater 8 is arranged along the inner surface of the ion plating container 1.

このようなイオンプレーディング装置を用いてボート法
GaAs成長用の石英反応管内面にイオンプレーティン
グを行った。
Ion plating was performed on the inner surface of a quartz reaction tube for boat-method GaAs growth using such an ion plating apparatus.

まず、ルツボ3及び4内にそれぞれ蒸着元素となるSi
(純度99.999%)及び8 (純度99.999%
)を収容すると共に高周波コイル2内にその開口端を下
に向けて石英反応管9を配置した。この状態で、ルツボ
3内のSiを電子銃5で加熱蒸発さけると共に酸素導入
管6から02を導入し高周波プラズマによりイオン化反
応させ、透明な非晶¥’j rfJ膜を作製した。続い
て02の圧力を一定のまま電子銃5の出力を上げ、Si
の蒸着量を増加させてSiリッヂのSi −0躾を作製
した。
First, Si, which will be the vapor deposition element, is placed in the crucibles 3 and 4, respectively.
(purity 99.999%) and 8 (purity 99.999%)
), and a quartz reaction tube 9 was placed inside the high-frequency coil 2 with its open end facing downward. In this state, the Si in the crucible 3 was heated and evaporated with the electron gun 5, and 02 was introduced through the oxygen introduction tube 6 to cause an ionization reaction with high frequency plasma, thereby producing a transparent amorphous \'j rfJ film. Next, the output of the electron gun 5 was increased while keeping the pressure of 02 constant, and the Si
By increasing the amount of evaporated, a Si ridge of Si-0 was fabricated.

次に、窒素導入管7からN2を導入しイオン化反応させ
てSi−0−N系の膜を作製し、ざらにL+を導入した
まま02の導入を止め、Si−N系の膜〈一部Si3N
4)を作製した。次に、ルツボ4内の8を電子銃5で加
熱蒸発させてSi−B−N系の膜を作製した後、Siの
蒸発を止めB−N系の股を作製し、最後にBN膜を作製
した。
Next, N2 is introduced from the nitrogen introduction tube 7 and an ionization reaction is carried out to produce a Si-0-N film. Si3N
4) was produced. Next, 8 in the crucible 4 is heated and evaporated with an electron gun 5 to create a Si-B-N film, then the evaporation of Si is stopped and a B-N film is created, and finally the BN film is Created.

このようにして製造された石英反応管9及びP−BNボ
ートを用いて成長させたGaAs単結晶は、従来の石英
製ボートを用いた場合とほぼ同じ10310I2の転移
密度を有すると共に、Si混入が従来の1/10〜1/
100まで低減されていた。また、石英反応管9を数回
成長に使用しても割れは認められなかった。
The GaAs single crystal grown using the quartz reaction tube 9 and the P-BN boat produced in this way has a dislocation density of 10310I2, which is almost the same as when using a conventional quartz boat, and has no Si contamination. 1/10 to 1/ of conventional
It had been reduced to 100. Furthermore, no cracks were observed even when the quartz reaction tube 9 was used several times for growth.

実施例2 第1図に示したイオンプレーティング装置を用いてボー
ト法GaAs成長用の石英ボート内面にイオンプレーテ
ィングを行った。
Example 2 Ion plating was performed on the inner surface of a quartz boat for boat-method GaAs growth using the ion plating apparatus shown in FIG.

まず、蒸着元素であるSiを電子銃5で加熱蒸発させる
と共に酸素導入管6から02を導入し高周波プラズマに
よりイオン化反応させ、透明な非晶質薄膜を作製した。
First, Si, which is an evaporation element, was heated and evaporated with an electron gun 5, and 02 was introduced through an oxygen introduction tube 6, and an ionization reaction was caused by high frequency plasma to produce a transparent amorphous thin film.

続いて02の圧力を一定のまま電子銃5の出力を上げ、
Siの蒸着量を増□ 加させてSiリッチのSi−OWAを作製した。
Next, increase the output of the electron gun 5 while keeping the pressure of 02 constant.
A Si-rich Si-OWA was fabricated by increasing the amount of Si vapor deposited.

次に、窒素導入管7からN2を導入してイオン化反応さ
せ、Si−0−N系の膜を作製し、さらにN2を導入し
たまま02の導入を止め、5t−N系の膜(一部Si3
N4)を作製し、最後にBN膜を作製した。
Next, N2 is introduced from the nitrogen introduction tube 7 to cause an ionization reaction to produce a Si-0-N film.Furthermore, the introduction of 02 is stopped while N2 is introduced, and a 5t-N film (partially Si3
N4) was produced, and finally a BN film was produced.

このようにして製造されたボートと実施例1で作製した
石英反応管とを用いてGaASの結晶成長を行った結果
、Slの混入が従来の1/10〜1/100に低減され
ると共に従来と同様の103/cm2の転移密度を有す
る単結晶が得られた。
As a result of growing GaAS crystals using the boat manufactured in this manner and the quartz reaction tube manufactured in Example 1, the contamination of Sl was reduced to 1/10 to 1/100 of the conventional amount, and A single crystal with a dislocation density of 10 3 /cm 2 similar to that of 10 3 /cm 2 was obtained.

なお、蒸着源は2種に限るものではなく、多数種の蒸着
源を用いて多元系の物質を蒸着することもできる。
Note that the number of evaporation sources is not limited to two, and multiple types of evaporation sources may be used to evaporate multi-component substances.

特に、GaAs単結晶の成長用部材として、Ga、 へ
s以外の[、V族元素の化合物及び■、v族の多元系物
質を蒸着した部材を用いることにより、GaAs単結晶
の高純度化が可能となる。
In particular, by using a member for growing a GaAs single crystal, a member on which a compound of group V elements other than Ga and hesium, and a multi-element substance of group V is used, the purity of the GaAs single crystal can be increased. It becomes possible.

[発明の効果] 以上説明したように本発明によれば次の如き優れた効果
が発揮される。
[Effects of the Invention] As explained above, according to the present invention, the following excellent effects are exhibited.

n+  GaAs中へのSiの混入を防止することがで
き、絶縁抵抗の高いGaAsが効率よく得られる。
It is possible to prevent Si from being mixed into n+ GaAs, and GaAs with high insulation resistance can be obtained efficiently.

(2)  イオンプレーティング法により石英部材と最
外被覆層との間にこれらの中間の熱膨張係数を有する中
間層を形成させることにより、熱膨張差によるクラック
の発生が防止される。
(2) By forming an intermediate layer having a coefficient of thermal expansion intermediate between the quartz member and the outermost coating layer using the ion plating method, generation of cracks due to a difference in thermal expansion is prevented.

(3)  本発明の化合物半導体単結晶製造用部材は石
英部材を本体としているので安価で製造することができ
ると共に結晶成長時に界面制御を行ないやすく、高品質
の単結晶を得ることができる。
(3) Since the compound semiconductor single crystal manufacturing member of the present invention has a quartz member as its main body, it can be manufactured at low cost, and interface control can be easily performed during crystal growth, making it possible to obtain high-quality single crystals.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係る化合物半導体単結晶製
造用部材の製造方法を実施するためのイオンプレーティ
ング装置の構成図である。 図中、2は高周波コイル、3及び4はルツボ、5は電子
銃、6は酸素導入管、7は窒素導入管、9は石英反応管
である。
FIG. 1 is a configuration diagram of an ion plating apparatus for carrying out a method for manufacturing a member for manufacturing a compound semiconductor single crystal according to an embodiment of the present invention. In the figure, 2 is a high frequency coil, 3 and 4 are crucibles, 5 is an electron gun, 6 is an oxygen introduction tube, 7 is a nitrogen introduction tube, and 9 is a quartz reaction tube.

Claims (3)

【特許請求の範囲】[Claims] (1)石英部材表面上にBN、AlNあるいはAl_2
O_3からなる被覆層が設けられた化合物半導体単結晶
製造用部材において、上記石英部材と上記被覆層との間
にその熱膨張係数が石英と上記被覆層をなすBN、Al
NあるいはAl_2O_3との中間の値を有するSi−
O−B−N系物質、Si−O−Al−N系物質あるいは
これらの複合組成の物質からなる中間層を設けたことを
特徴とする化合物半導体単結晶製造用部材。
(1) BN, AlN or Al_2 on the surface of the quartz member
In a compound semiconductor single crystal manufacturing member provided with a coating layer made of O_3, the thermal expansion coefficient between the quartz member and the coating layer is the same as that of quartz and BN, Al, which forms the coating layer.
Si- with a value intermediate between N or Al_2O_3
1. A member for manufacturing a compound semiconductor single crystal, characterized in that an intermediate layer is formed of an O-B-N based material, a Si-O-Al-N based material, or a composite composition thereof.
(2)石英部材の表面上にその熱膨張係数が石英とBN
、AlNあるいはAl_2O_3との中間の値を有する
Si−O−B−n系物質、Si−O−Al−N系物質あ
るいはこれらの複合組成の物質からなる中間層をイオン
プレーティング法により形成した後、該中間層の上にB
N、AlNあるいはAl_2O_3からなる被覆層を設
けたことを特徴とする化合物半導体単結晶製造用部材の
製造方法。
(2) On the surface of the quartz member, the thermal expansion coefficient is different from that of quartz and BN.
, AlN or Al_2O_3, after forming an intermediate layer consisting of a Si-O-B-n-based material, a Si-O-Al-N-based material, or a composite composition thereof by an ion plating method. , B on top of the intermediate layer
A method for manufacturing a member for manufacturing a compound semiconductor single crystal, characterized in that a coating layer made of N, AlN or Al_2O_3 is provided.
(3)上記被覆層がイオンプレーティング法により形成
されることを特徴とする特許請求の範囲第2項記載の製
造方法。
(3) The manufacturing method according to claim 2, wherein the coating layer is formed by an ion plating method.
JP28414786A 1986-12-01 1986-12-01 Member for producing compound semiconductor single crystal and production thereof Pending JPS63139100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28414786A JPS63139100A (en) 1986-12-01 1986-12-01 Member for producing compound semiconductor single crystal and production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28414786A JPS63139100A (en) 1986-12-01 1986-12-01 Member for producing compound semiconductor single crystal and production thereof

Publications (1)

Publication Number Publication Date
JPS63139100A true JPS63139100A (en) 1988-06-10

Family

ID=17674777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28414786A Pending JPS63139100A (en) 1986-12-01 1986-12-01 Member for producing compound semiconductor single crystal and production thereof

Country Status (1)

Country Link
JP (1) JPS63139100A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02120292A (en) * 1987-04-27 1990-05-08 Soc Europ Propulsion <Sep> Composite material-made cartridge used in apparatus for single crystal growth

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02120292A (en) * 1987-04-27 1990-05-08 Soc Europ Propulsion <Sep> Composite material-made cartridge used in apparatus for single crystal growth

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