JPS63138986A - Surface packaging type semiconductor package - Google Patents
Surface packaging type semiconductor packageInfo
- Publication number
- JPS63138986A JPS63138986A JP61278610A JP27861086A JPS63138986A JP S63138986 A JPS63138986 A JP S63138986A JP 61278610 A JP61278610 A JP 61278610A JP 27861086 A JP27861086 A JP 27861086A JP S63138986 A JPS63138986 A JP S63138986A
- Authority
- JP
- Japan
- Prior art keywords
- bag
- package
- moisture
- magazine
- inner box
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 238000004806 packaging method and process Methods 0.000 title 1
- 230000035699 permeability Effects 0.000 claims description 3
- 229920000728 polyester Polymers 0.000 claims description 3
- 239000002250 absorbent Substances 0.000 claims description 2
- 230000002745 absorbent Effects 0.000 claims description 2
- 208000019901 Anxiety disease Diseases 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000000741 silica gel Substances 0.000 description 8
- 229910002027 silica gel Inorganic materials 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 238000005336 cracking Methods 0.000 description 2
- 238000007872 degassing Methods 0.000 description 2
- 239000003230 hygroscopic agent Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- OEPOKWHJYJXUGD-UHFFFAOYSA-N 2-(3-phenylmethoxyphenyl)-1,3-thiazole-4-carbaldehyde Chemical compound O=CC1=CSC(C=2C=C(OCC=3C=CC=CC=3)C=CC=2)=N1 OEPOKWHJYJXUGD-UHFFFAOYSA-N 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000002216 antistatic agent Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229920006267 polyester film Polymers 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、面実装型半導体パッケージのプリント基板な
どの実装用基板への実装に際しての当該パッケージ界面
剥離及びクラックを防止する技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technique for preventing peeling and cracking at the interface of a surface-mounted semiconductor package when the package is mounted on a mounting board such as a printed circuit board.
面実装型半導体パッケージ例えばスモールアウトライン
パッケージ（ＳＯＰ）やクワッドフラットパッケージ（
ＱＦＰ）やプラスチックリープイドチップキャリア（Ｐ
ＬＣＣ）にあっては、そのバグケージ内に収納されてい
る半導体チップの大型化に伴ない、増々小型薄型化し、
パンケージ強度が低下する傾向にある。Surface-mount semiconductor packages such as small outline packages (SOP) and quad flat packages (
QFP) and plastic leaped chip carriers (P
As the semiconductor chips housed in the bag cages (LCCs) have become larger, they have become increasingly smaller and thinner.
Pancage strength tends to decrease.
そして、当該パッケージをプリント基板などの実装用基
板に面装着するに、例えばハンダリフロ一時に、パッケ
ージに熱がかかると、パッケージ内に侵入した水分が急
激に体積膨張を起こし、パッケージ界面剥離及びクラッ
クを生せしめる。When the package is surface-mounted on a mounting board such as a printed circuit board, if heat is applied to the package during solder reflow, the moisture that has entered the package will rapidly expand in volume, causing delamination and cracks at the package interface. Bring forth.
従来その対策の一つとして、ハンダリフロー前に、例え
ば１２５°Ｃで長時間一般に１６〜２４ｈｒｓもの間ベ
ークするということが行われているが、ベークのための
炉を用意しなければならないし、なによりも、長時間の
ベークを要するために、作業能率の悪いものであった。Conventionally, one of the countermeasures has been to bake at 125°C for a long time, typically 16 to 24 hours, before solder reflow, but this requires a baking oven and Above all, it required long baking time, resulting in poor work efficiency.
なお、面実装型パッケージについて述べた文献の例とし
ては、１９８０年１月１５日（株）工業調査会発行ｒ
Ｉ Ｃ化実装技術ＪＰ１３５〜１５６があげられる。An example of a document that describes surface-mount packages is the one published by Industrial Research Institute Co., Ltd. on January 15, 1980.
Examples include IC packaging technology JP135-156.
本発明は面実装型パッケージのパッケージ界面剥離クラ
ックを防止する技術を提供することを目的とする。An object of the present invention is to provide a technique for preventing package interface peeling cracks in surface-mounted packages.
本発明の前記ならびにそのほかの目的と新規な特徴は、
本明細書の記述および添伺図面からあきらかになるであ
ろう。The above and other objects and novel features of the present invention include:
It will become clear from the description of this specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。A brief overview of typical inventions disclosed in this application is as follows.
本発明では、マガジンに収納した面実装型パッケージを
内装箱に入れ、当該内装箱を、例えば透湿度２．０ｇ／
ｍ”・２４ ｈｒｓ以下のｇ ＋）エステルをペースに
した表面固有抵抗が外側１０６Ω、内側１０１１Ω以下
の透明樹脂製袋体に入れ、脱気後、当該袋体の開口部を
熱シールするようにした。さらに、内装箱にはシリカゲ
ルのごとき吸湿剤を収納するようにした。In the present invention, a surface mount type package stored in a magazine is placed in an inner box, and the inner box is, for example,
m"・24 hrs or less g Furthermore, the inner box contained a moisture absorbent such as silica gel.
これにより、面実装型パッケージは、内装箱とその外側
の防湿性の袋体に納められ、さらに、脱気や熱シールに
より完全密封され、外部の湿度の影響を受けないので、
面倒なベーク作業を要せずして、ハンダリフローしても
パッケージ界面剥離及びクラックを生せしめない。特に
、本発明では透湿度が２．０９ ／ ｍ”・２４ ｈｒ
ｓ以下のポリエステルをペースにした樹脂製袋体とした
ので、防湿性が良く、また、ヒートシールが可能で、外
気の侵入を阻止する効果が高い。また、袋体は帯電防止
を考慮してその表面固有抵抗を内面１０１１Ω以下、外
面１０６Ω以下としている。さらに、本発明では、マガ
ジンと内装箱の壁面との間にシリカゲルをおき、当該シ
リカゲルにより湿分を吸収するようにしているので、面
装着型パッケージは、より一層、外部の湿気の影響を受
けない。As a result, the surface mount package is housed in an inner box and an outer moisture-proof bag, and is completely sealed by degassing and heat sealing, so it is not affected by external humidity.
To prevent package interface peeling and cracks even during solder reflow without requiring troublesome baking work. In particular, in the present invention, the moisture permeability is 2.09/m"・24 hr
Since the bag is made of resin with a polyester paste of s or less, it has good moisture resistance and can be heat-sealed, making it highly effective in preventing intrusion of outside air. In addition, the bag body has a surface resistivity of 10 11 Ω or less on the inner surface and 10 6 Ω or less on the outer surface in consideration of antistatic properties. Furthermore, in the present invention, silica gel is placed between the magazine and the wall of the inner box, and the silica gel absorbs moisture, so the surface-mounted package is even more susceptible to the influence of external moisture. do not have.
次に、本発明を、図面に示す実施例に基づいて説明する
。Next, the present invention will be explained based on embodiments shown in the drawings.
第２図に示すような紙製の内装箱１に、マガジン２を収
納する。当該マガジン２の一例は第３図に示す。第４図
に示すように、当該マガジン２内に面実装型半導体パッ
ケージ３を詰め、マガジン２の端部には、当該パッケー
ジ３のマガジン外部への突出をおさえるためにストッパ
ー４を装着する。A magazine 2 is stored in an inner box 1 made of paper as shown in FIG. An example of the magazine 2 is shown in FIG. As shown in FIG. 4, surface-mounted semiconductor packages 3 are packed in the magazine 2, and a stopper 4 is attached to the end of the magazine 2 to prevent the packages 3 from protruding outside the magazine.
マガジン２内には、当該パッケージ３が複数詰込されて
いる。A plurality of packages 3 are packed in the magazine 2.
内装箱１の壁面とマガジン２の側面との間に、第２図に
示すように、シリカゲル５を入れる。該シリカゲル５は
、マガジン２の端部側に入れると、湿気を吸収する上で
良く、また、蓋６のフランジ部７を内装箱１の内側に折
り込みして当該蓋６を閉じ、当該蓋６を持ち上げして当
該バ、ノケージ３を取出するに、当該蓋６の端部開口側
が最初に外気の湿分の影響を受けるので、当該開口側に
設けると良い。Silica gel 5 is placed between the wall of the inner box 1 and the side of the magazine 2, as shown in FIG. The silica gel 5 is good for absorbing moisture when placed on the end side of the magazine 2, and the flange portion 7 of the lid 6 is folded inside the inner box 1 to close the lid 6. When lifting the lid 6 to take out the cage 3, the opening side of the end of the lid 6 is first affected by the moisture in the outside air, so it is preferable to provide the lid 6 on the opening side.
当該内装箱１を、第５図に示すような、袋体８内に入れ
、脱り後、当該袋体８の開口部９を熱シールする。The inner box 1 is placed in a bag 8 as shown in FIG. 5, and after being removed, the opening 9 of the bag 8 is heat-sealed.
当該袋体８は、例えば透湿度２．０ｇ／ｍ”・２４ｈｒ
ｓ以下のポリエステルをペースにした透明導電袋により
構成されろ。The bag body 8 has a moisture permeability of 2.0 g/m"/24 hours, for example.
Constructed from a transparent conductive bag made of polyester with a weight of less than S.
当該袋体８を透明なものとしたのは、内装箱１表面に品
種や数量や製造ロット％などが書かれているときに、そ
の管理上有利であるからである。The reason why the bag 8 is made transparent is that it is advantageous in terms of management when the product type, quantity, manufacturing lot percentage, etc. are written on the surface of the inner box 1.
当該導電袋８を構成する樹脂フィルムの例としては、内
側から帯電防止剤練込ポリエチレン、ポリエステルフィ
ルム、カーボン導電層、アクリル系樹脂保護層、をラミ
ネートし、さらに、該フィルム上に塩化ビニリデンフィ
ルムをコーティングして成るものがあげられる。当該導
電袋８は、パッケージ３内のＩＣの帯電防止のために、
表面固有抵抗を外面１０６Ω以下および内面ともＩＱＩ
ＩΩ以下とする。An example of the resin film constituting the conductive bag 8 is one in which polyethylene kneaded with an antistatic agent, a polyester film, a carbon conductive layer, and an acrylic resin protective layer are laminated from the inside, and a vinylidene chloride film is further layered on the film. Examples include those made by coating. The conductive bag 8 is used to prevent the IC inside the package 3 from being charged.
The surface resistivity is IQI for both the outer surface 106Ω or less and the inner surface.
It should be less than IΩ.
当該導電袋８表面には、開封後には速やかに使用すべき
ことや湿度の低い環境下に再びおくことなどの注意書き
を記した印刷またはラベル１０を貼着する。A label 10 is printed or pasted on the surface of the conductive bag 8 with instructions such as that it should be used immediately after opening and that it should be placed in a low-humidity environment again.
本発明によれば、面実装型パッケージ３は防湿性の袋体
８内に納められ、さらに、脱気や熱シール９により完全
密封され、また、シリカゲル５により開口部側で湿分が
吸収され、外部の湿気の影響を受けないので、面倒なベ
ーク作業を要せずして、ハンダリフローしてもパッケー
ジ界面剥離及びクラックを生ずることを防止できる。According to the present invention, the surface-mounted package 3 is housed in a moisture-proof bag 8, and is completely sealed by degassing and heat sealing 9, and moisture is absorbed by the silica gel 5 on the opening side. Since it is not affected by external moisture, troublesome baking work is not required, and package interface peeling and cracking can be prevented even during solder reflow.
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.
例えば、シリカゲル以外の他の吸湿剤を使用してもよい
。For example, other hygroscopic agents other than silica gel may be used.
本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記のとうりであ
る。A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.
本発明だよれば外部の湿気の影響を受けないので、ベー
クなしでハンダリフローしてもパッケージ界面剥離クラ
ックなどの問題を生じない。According to the present invention, since it is not affected by external moisture, problems such as package interface peeling cracks do not occur even if solder reflows without baking.
第１図は本発明の実施例を示す包装体の斜視図、第２図
は本発明の実施例を示す内装箱の斜視図、第３図はマガ
ジンの一例斜視図、
第４図はマガジン端部の説明断面図、
第５図は袋体の一例説明図である。
１・・・内装箱、２・・・マガジン、３・・・面実装型
半導体パッケージ、４・・・ストッパー、５・・・シリ
カゲル（吸湿剤）、６・・・蓋、７・・・フランジ部、
８・・・袋体、９・・・袋体開口部（熱シール）、１０
・・・印刷またはラベル
代理人 弁理士 小 川 勝 男 −第 １
図
第゛ ３ 図Fig. 1 is a perspective view of a package showing an embodiment of the present invention, Fig. 2 is a perspective view of an inner box showing an embodiment of the invention, Fig. 3 is a perspective view of an example of a magazine, and Fig. 4 is a magazine end. Fig. 5 is an explanatory view of an example of the bag body. DESCRIPTION OF SYMBOLS 1...Inner box, 2...Magazine, 3...Surface mount type semiconductor package, 4...Stopper, 5...Silica gel (hygroscopic agent), 6...Lid, 7...Flange Department,
8...Bag body, 9...Bag body opening (heat seal), 10
...Printing or Label Agent Patent Attorney Katsuo Ogawa - 1st
Figure 3
Claims (1)
ンまたはトレーを収納し、かつ、吸湿剤を収納した内装
箱を、透明な防湿性で導電性の袋体内に入れ、脱気後、
該袋体の開口部を熱接合して成ることを特徴とする面実
装型半導体パッケージ包装体。 ２、袋体が、透湿度２．０ｇ／ｍ＾２・２４ｈｒｓ、Ｊ
ＩＳＺ０２０８ ４０℃、９０％ＲＨ以下の、ポリエス
テルをベースにした、表面固有抵抗が外側１０＾６Ω、
内側１０＾１＾１Ω以下の透明導電性袋より成り、かつ
、当該袋体表面に注意書きを印刷により表示して成る、
特許請求の範囲第１項記載の包装体。[Scope of Claims] 1. An inner box containing a magazine or tray filled with a large number of surface-mount semiconductor packages and a moisture absorbent is placed inside a transparent moisture-proof and conductive bag, and then removed. After feeling anxious,
A surface-mount semiconductor package package characterized in that the opening of the bag is thermally bonded. 2. The bag body has a moisture permeability of 2.0g/m^2・24hrs, J
ISZ0208 40℃, 90%RH or less, polyester-based, surface resistivity outside 10^6Ω,
Consisting of a transparent conductive bag with an inner diameter of 10^1^1Ω or less, and a cautionary note printed on the surface of the bag.
A package according to claim 1.
Priority Applications (27)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61278610A JPS63138986A (en) | 1986-11-25 | 1986-11-25 | Surface packaging type semiconductor package |
| KR1019870013166A KR960015106B1 (en) | 1986-11-25 | 1987-11-23 | Surface package type semiconductor package |
| EP87310344A EP0269410B1 (en) | 1986-11-25 | 1987-11-24 | Packaging of semiconductor elements |
| DE3750589T DE3750589T2 (en) | 1986-11-25 | 1987-11-24 | Packaging for semiconductor elements. |
| DE8787310344T DE3778499D1 (en) | 1986-11-25 | 1987-11-24 | PACKING FOR SEMICONDUCTOR ELEMENTS. |
| EP91202052A EP0458423B1 (en) | 1986-11-25 | 1987-11-24 | Packaging of semiconductor elements |
| DE3751687T DE3751687T2 (en) | 1986-11-25 | 1987-11-24 | Packaging for semiconductor elements |
| EP92110466A EP0512579B1 (en) | 1986-11-25 | 1987-11-24 | Packaging of semiconductor elements |
| US07/393,120 US4971196A (en) | 1986-11-25 | 1989-08-10 | Surface package type semiconductor package |
| US07/392,029 US5095626A (en) | 1986-11-25 | 1989-08-10 | Method of producing semiconductor memory packages |
| KR1019920012563A KR970007120B1 (en) | 1986-11-25 | 1992-07-15 | Supface package type semiconductor package |
| KR1019920012565A KR960016323B1 (en) | 1986-11-25 | 1992-07-15 | Surface package type semiconductor package |
| KR1019920012564A KR960014474B1 (en) | 1986-11-25 | 1992-07-15 | Surface package type semiconductor package |
| US07/915,233 US5274914A (en) | 1986-11-25 | 1992-07-20 | Method of producing surface package type semiconductor package |
| US07915496 US5295297B1 (en) | 1986-11-25 | 1992-07-20 | Method of producing semiconductor memory |
| SG39894A SG39894G (en) | 1986-11-25 | 1994-03-21 | Packaging of semiconductor elements |
| HK59394A HK59394A (en) | 1986-11-25 | 1994-06-23 | Packaging of semiconductor elements |
| US08/264,745 US5607059A (en) | 1986-11-25 | 1994-06-23 | Surface package type semiconductor package and method of producing semiconductor memory |
| HK28496A HK28496A (en) | 1986-11-25 | 1996-02-15 | Packaging of semiconductor elements |
| US08/712,559 US5803246A (en) | 1986-11-25 | 1996-09-13 | Surface package type semiconductor package and method of producing semiconductor memory |
| HK214096A HK214096A (en) | 1986-11-25 | 1996-12-12 | Packaging of semiconductor elements |
| US09/094,490 US5988368A (en) | 1986-11-25 | 1998-06-10 | Resist pattern forming method using anti-reflective layer resist pattern formed and method of etching using resist pattern and product formed |
| US09/387,049 US6223893B1 (en) | 1986-11-25 | 1999-08-31 | Surface package type semiconductor package and method of producing semiconductor memory |
| US09/843,937 US6443298B2 (en) | 1986-11-25 | 2001-04-30 | Surface package type semiconductor package and method of producing semiconductor memory |
| US10/207,052 US6981585B2 (en) | 1986-11-25 | 2002-07-30 | Surface package type semiconductor package and method of producing semiconductor memory |
| US10/207,086 US20030057113A1 (en) | 1986-11-25 | 2002-07-30 | Surface package type semiconductor package and method of producing semiconductor memory |
| US10/207,059 US20020174627A1 (en) | 1986-11-25 | 2002-07-30 | Surface package type semiconductor package and method of producing semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61278610A JPS63138986A (en) | 1986-11-25 | 1986-11-25 | Surface packaging type semiconductor package |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5292983A Division JP2501177B2 (en) | 1993-11-24 | 1993-11-24 | Mounting method of surface mount type semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63138986A true JPS63138986A (en) | 1988-06-10 |
Family
ID=17599674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61278610A Pending JPS63138986A (en) | 1986-11-25 | 1986-11-25 | Surface packaging type semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63138986A (en) |
-
1986
- 1986-11-25 JP JP61278610A patent/JPS63138986A/en active Pending
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