JPS63136659A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a high current amplification factor with less steps by forming the emitter, the collector of a lateral PNP bipolar transistor by the channel stopper diffusion and the P-channel source, drain diffusion of an N- channel MOS transistor. CONSTITUTION:Emitter 6, collector 7 of a lateral P-N-P bipolar transistor, and P-channel stopper 14 of an N-channel MOS transistor are formed by a simultaneous diffusion. The N-channel stopper 11 of a P-channel MOS transistor and the base 8 of a lateral PNP bipolar transistor are formed by a simultaneous diffusion. Then, the source 9, the drain 10 of the P-channel MOS transistor are diffused, the emitter 6, the collector 7 of lateral PNP bipolar transistor are simultaneously similarly diffused to form a lateral PNP transistor having high concentration regions 15, 16 of the same concentration and the same diffusion depth as the source, 9 and the drain 10 of the P-channel MOS transistor are formed. Thus, a current amplification factor hFE can be enhanced by double diffusions in the emitter, the collector of the bipolar transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a monolithic semiconductor integrated circuit comprising a lateral PNP bipolar transistor and a complementary MO8) transistor.

[Conventional technology]

Conventionally, a monolithic integrated circuit consisting of a lateral PNP type bipolar transistor and a complementary MOS transistor has a structure as shown in FIG. N-type buried diffusion layer 2 of opposite conductivity type to the two substrates
After that, an N-type epitaxy layer 3 of the opposite conductivity type is grown on the substrate 1, and further (2P-type impurities are selectively diffused to form an isolation diffusion layer 4, and an N-type buried diffusion layer 2 is formed). A P-well 5 of the opposite conductivity type is formed in a part of the epitaxial layer 3 that does not have a lateral conductivity type, and a lateral PNP type bipolar transistor consisting of an emitter 6, a collector 7, and a paste 8 is formed in the epitaxial layer 3 above the buried diffusion layer 2. A MOS (MOS) transistor is formed by forming a C, P channel source 9, and P'-'' in an epitaxial layer 3 separated from this bipolar transistor by an isolation diffusion layer 4, and using the surface of the epitaxial layer as a channel forming part. ,
Furthermore, a MOS transistor having a channel forming portion in the P-fer 5 and consisting of an N-channel source 12, an N-channel drain 13, and a P-channel stopper 4) is formed to form a complementary MO8 transistor.

A bipolar transistor has the characteristic that it can flow a large current compared to a MOS transistor, while a MOS transistor has a characteristic that it consumes less power and has a higher input impedance than a bipolar transistor. As a method of forming both on the same substrate and taking advantage of their respective characteristics, it is known to configure the logic circuit with a MOS type and the output circuit with a bipolar type.

[Problem that the invention seeks to solve]

When forming complementary MO8) transistors and lateral PNP bipolar transistors on the same chip, MOS
) A common method is to form the emitter and collector diffusions of a lateral PNP bipolar transistor at the same time as the source and drain diffusions of the transistor. The disadvantage is that the current amplification factor hFB is low.

In this respect, the present invention can form the complementary MO8 transistor in the same chip without making the manufacturing process more complicated than the conventional method. It is an object of the present invention to obtain a method for increasing the current amplification factor hFB of a lateral PNP type bipolar transistor.

[Means for solving problems]

The present invention simultaneously performs channel stopper P-type diffusion of a complementary MOS transistor in the emitter and collector regions of a lateral PNP-type bipolar transistor using the same method (:
Diffusion is formed, and the formed emitter and collector regions are further complementary to the P-channel source of the MO8) transistor,
This purpose is achieved by performing drain diffusion simultaneously (double diffusion) using the same method.

[Effect]

In the present invention, first, the emitter and collector regions of the lateral PNP bipolar transistor are created by directly utilizing the P-type diffusion process performed to form the channel stopper of the complementary MO8) transistor, and then the M
Utilizing the P-type diffusion process performed to form the P-channel source and drain of the OS transistor, further diffusion is performed in the emitter and collector regions of the previously formed lateral PNP bipolar transistor. This double diffusion forms emitter and collector regions with deep diffusion depth and high surface concentration.

〔Example〕

Next, embodiments of the present invention will be explained using two drawings.

Figures 1a to 1d show the manufacturing steps of the method of the present invention,
Components equivalent to those in FIG. 2 are given the same reference numerals.

First, in Fig. 1a, P-type silicon substrate] (specific resistance 1
N buried diffusion layer 2 (10 to 2
0010) is formed by selective diffusion, and the substrate 1 is formed on it by selective diffusion.
grow an N-epitaxial layer 3 over the entire surface of the
Furthermore, the isolation diffusion layer 4 is formed by selectively diffusing P-type impurities.

Next, as shown in FIG.
Form.

In the process shown in FIG.
4 from simultaneous diffusion C2, and P channel type MO
8) Simultaneously diffuse the N-channel stopper 1 of the transistor and the base 8 of the lateral PNP bipolar transistor. ] OI6 to IQC11, the diffusion depth is 2 to 3 μm, the surface impurity concentration of the N-type layer of the base 8 is 1011 to 1019 cm-”, and the diffusion depth is 2 to 3 μm.
Let it be μ shoulder.

Next C2 The step shown in Figure 1d (in 2, the P channel g
When the source 9 and drain of the MOS transistor are diffused by 1°, the inside of the lid 2 and the emitter 6 and collector 7 of the lateral PNP type bipolar transistor (diffusion is performed in the same way as the P-channel type MO8), and the source 9 and drain 10 of the transistor are High 1 degree region 15.1 with the same concentration and the same diffusion depth as
A lateral PNP type transistor having 6 is formed.

The surface impurity concentration of this P-type layer is 10'8~10 +I)
c, −”, the diffusion depth is 2-3 μm. Then N
2. Diffusion of the drain 13 of the channel type MO8 transistor. The surface impurity concentration of this N-type layer is 】0
! 0-10''cm-', the diffusion depth is 2-3 μm.

In this way (-in the emitter and collector of a bipolar transistor (diffuse I: therefore, the current amplification factor h
The reason why FB is improved is as follows.

In other words, if the emitter and collector are formed only by channel stopper diffusion of a MOS transistor, the subsequent L
Due to the long-term oxidation of OCO8 formation, boron is sucked out and the surface concentration decreases, resulting in a decrease in the current amplification factor hFE. However, since the P channel source and drain diffusion is performed after LOCO8 formation, there is less boron sucked out and the surface concentration decreases. is high and the emitter injection efficiency is improved, resulting in improved current amplification characteristics.

Also, the emitter and collector of a bipolar transistor are
When formed only by source and drain diffusion (
: Since the diffusion depth is shallow, the effective emitter area is small and the current capacity is small.

Therefore, the P-channel stopper diffusion with deep diffusion,
With a double-diffused emitter-collector configuration using highly doped P-channel source and drain diffusions, a lateral PNP bipolar transistor with a large current capacity and a large current amplification factor can be obtained.

〔Effect of the invention〕

According to the present invention, the emitter and collector of a lateral PNP type bipolar transistor are formed by channel stopper diffusion of an N-channel MO8 transistor/transistor and P-channel source and drain diffusion, thereby achieving a high current amplification rate with fewer steps than before. A BICMO8 type integrated circuit fully integrated circuit having lateral PNP type bipolar transistors is produced.

[Brief explanation of the drawing]

FIG. 1a M-d is an explanatory diagram of the manufacturing process of the present invention, and FIG. 2 is a sectional view of a monolithic semiconductor integrated circuit consisting of a conventional bipolar transistor and a complementary MO8) transistor. DESCRIPTION OF SYMBOLS 1...P-type silicon substrate, 2...N buried diffusion layer, 3...N epitaxial layer, 4.φ isolation diffusion layer, 5...p-fer, 6.
...Emitter, 7.Collector, 8.φ base, 9..Pf channel source 10..P channel drain, 11.-N channel stopper, 12
...N channel source, 13.-N channel drain, 14.-P channel stopper, 15...
Emitter high concentration region, ]6...Collector high concentration region. Figure 1 CQ,) (b) N Rikon diffusion layer! Silicon substrate Figure 1 (d)

Claims (1)

[Claims] 1) In a monolithic semiconductor integrated circuit in which an epitaxial growth layer of a conductivity type opposite to that of the semiconductor substrate is formed on a semiconductor substrate of one conductivity type, and a bipolar transistor and a complementary MOS transistor are formed on the epitaxial growth layer, a lateral PNP type bipolar The emitter and collector regions of the transistor are simultaneously diffused in the same process as the channel stopper P type diffusion of the complementary MOS transistor, and the formed emitter and collector regions are further diffused for the P channel source and drain of the complementary MOS transistor. A method for manufacturing a semiconductor integrated circuit characterized by performing diffusion simultaneously in the same process.