JPS63135467U - - Google Patents

Info

Publication number
JPS63135467U
JPS63135467U JP615488U JP615488U JPS63135467U JP S63135467 U JPS63135467 U JP S63135467U JP 615488 U JP615488 U JP 615488U JP 615488 U JP615488 U JP 615488U JP S63135467 U JPS63135467 U JP S63135467U
Authority
JP
Japan
Prior art keywords
image processing
processing circuit
video storage
images
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP615488U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP615488U priority Critical patent/JPS63135467U/ja
Publication of JPS63135467U publication Critical patent/JPS63135467U/ja
Pending legal-status Critical Current

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  • Image Input (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示すブロツク図、
第2図はその要部説明図、第3図は画像処理の動
作説明図である。 図中、1は第1のメモリ、2は第3のメモリ、
3は制御フアーム、4はパラメータレジスタ、5
はマトリクス、6は第2のメモリ、7はアドレス
演算回路、8はアドレスレジスタ、10は処理エ
リアである。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is an explanatory diagram of the main part thereof, and FIG. 3 is an explanatory diagram of the operation of image processing. In the figure, 1 is the first memory, 2 is the third memory,
3 is the control arm, 4 is the parameter register, 5
6 is a matrix, 6 is a second memory, 7 is an address calculation circuit, 8 is an address register, and 10 is a processing area.

Claims (1)

【実用新案登録請求の範囲】 読み取つた画像を2値化した形成で記憶するビ
デオストレージ1の必要な領域の画像のみを読み
出し、画処理を行なう様にした画像処理回路にお
いて、 該画処理を行なつたデータのみを記憶する該ビ
デオストレージより容量の小さい出力用のメモリ
2を設けたことを特徴とする画像処理回路。
[Scope of Claim for Utility Model Registration] An image processing circuit configured to read out only images from a necessary area of a video storage 1 that stores the read images in a binarized form and perform image processing. An image processing circuit characterized in that an output memory 2 having a smaller capacity than the video storage for storing only recorded data is provided.
JP615488U 1988-01-21 1988-01-21 Pending JPS63135467U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP615488U JPS63135467U (en) 1988-01-21 1988-01-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP615488U JPS63135467U (en) 1988-01-21 1988-01-21

Publications (1)

Publication Number Publication Date
JPS63135467U true JPS63135467U (en) 1988-09-06

Family

ID=30788405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP615488U Pending JPS63135467U (en) 1988-01-21 1988-01-21

Country Status (1)

Country Link
JP (1) JPS63135467U (en)

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