JPS6378478U - - Google Patents
Info
- Publication number
- JPS6378478U JPS6378478U JP17222486U JP17222486U JPS6378478U JP S6378478 U JPS6378478 U JP S6378478U JP 17222486 U JP17222486 U JP 17222486U JP 17222486 U JP17222486 U JP 17222486U JP S6378478 U JPS6378478 U JP S6378478U
- Authority
- JP
- Japan
- Prior art keywords
- image data
- display
- memory
- display memory
- image
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Studio Circuits (AREA)
Description
第1図は本考案の一実施例を示す回路ブロツク
図、第2図はそのマルチ画像表示態様を説明する
ための図、第3図は上記実施例の表示用メモリの
メモリマツプである。
2…表示用メモリ、3…書込み用アドレスカウ
ンタ、4…書込み制御用メモリ。
FIG. 1 is a circuit block diagram showing one embodiment of the present invention, FIG. 2 is a diagram for explaining its multi-image display mode, and FIG. 3 is a memory map of the display memory of the above embodiment. 2...Display memory, 3...Writing address counter, 4...Writing control memory.
Claims (1)
面分の表示用メモリに格納したのち順次読出して
マルチ画面表示を行なう画像表示装置に於て、前
記各画像データに対応する前記表示用メモリの書
込みアドレスを順次指定するアドレス指定手段と
、予め格納された前記各画像データの特定の領域
に対応する前記表示用メモリの書込み許容領域を
示すデータが前記アドレス指定手段によつて読出
される書込み制御用メモリと、この制御用メモリ
の出力データによつて前記各画像データの前記表
示用メモリへの書込みを制御する回路とを備え、
前記表示用メモリに前記各画像データの特定の領
域のみが格納されるようにしたことを特徴とする
画像表示装置のメモリ制御回路。 In an image display device that performs multi-screen display by time-axis compressing image data for multiple screens and storing it in a display memory for one screen and sequentially reading it out, the display memory corresponding to each image data is Address designation means for sequentially designating write addresses; and write control in which data indicating a write permissible area of the display memory corresponding to a specific area of each of the image data stored in advance is read by the address designation means. and a circuit for controlling writing of each of the image data to the display memory according to output data of the control memory,
A memory control circuit for an image display device, wherein only a specific area of each of the image data is stored in the display memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17222486U JPS6378478U (en) | 1986-11-10 | 1986-11-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17222486U JPS6378478U (en) | 1986-11-10 | 1986-11-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6378478U true JPS6378478U (en) | 1988-05-24 |
Family
ID=31108573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17222486U Pending JPS6378478U (en) | 1986-11-10 | 1986-11-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6378478U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0350968A (en) * | 1989-07-19 | 1991-03-05 | Matsushita Electric Ind Co Ltd | Television receiver |
JPH05225328A (en) * | 1991-07-22 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Apparatus and method for real-time mixing and anti-aliasing for multiple-source image |
-
1986
- 1986-11-10 JP JP17222486U patent/JPS6378478U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0350968A (en) * | 1989-07-19 | 1991-03-05 | Matsushita Electric Ind Co Ltd | Television receiver |
JPH05225328A (en) * | 1991-07-22 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Apparatus and method for real-time mixing and anti-aliasing for multiple-source image |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6378478U (en) | ||
JPH03121894U (en) | ||
JPS63107042U (en) | ||
JPS6088385U (en) | display device | |
JPS60130495U (en) | Video display device | |
JPH025794U (en) | ||
JPS5810133U (en) | display device | |
JPS62109194U (en) | ||
JPS5852586U (en) | display device | |
JPH0322472U (en) | ||
JPS6266474U (en) | ||
JPS595100U (en) | Use prevention device before storing main memory resident data | |
JPS59116989U (en) | Screen display control device | |
JPS6327963U (en) | ||
JPS63564U (en) | ||
JPS618365U (en) | terminal device | |
JPH0332871U (en) | ||
JPH0235242U (en) | ||
JPS63118646U (en) | ||
JPS5836455U (en) | Kanji output device | |
JPS6274290U (en) | ||
JPH0389482U (en) | ||
JPS6219694U (en) | ||
JPH01115785U (en) | ||
JPS5812895U (en) | Small electronic device with schedule notification function |