JPS63135070A - High voltage stabilizing device - Google Patents

High voltage stabilizing device

Info

Publication number
JPS63135070A
JPS63135070A JP28363986A JP28363986A JPS63135070A JP S63135070 A JPS63135070 A JP S63135070A JP 28363986 A JP28363986 A JP 28363986A JP 28363986 A JP28363986 A JP 28363986A JP S63135070 A JPS63135070 A JP S63135070A
Authority
JP
Japan
Prior art keywords
circuit
horizontal
output
synchronizing signal
high voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28363986A
Other languages
Japanese (ja)
Other versions
JPH0654949B2 (en
Inventor
Kazuo Tsukagoshi
塚越 和夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61283639A priority Critical patent/JPH0654949B2/en
Publication of JPS63135070A publication Critical patent/JPS63135070A/en
Publication of JPH0654949B2 publication Critical patent/JPH0654949B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To keep a high voltage output constant from a horizontal output circuit and a high voltage circuit even at no signal by discriminating the presence and absence of a synchronizing signal by a synchronizing signal discrimination circuit when no composite video signal exists and supplying a pseudo synchronizing signal from a synchronizing signal generating circuit by the output. CONSTITUTION:The emitter of a transistor 14 is connected to ground and a collector is connected to a +B power supply 17 via a load resistor 15 and connected to the input terminal of a synchronizing signal generating circuit 10 through a diode 10. When no horizontal synchronizing signal 11 is fed to a synchronizing signal discrimination circuit 9, a +B is supplied to the synchronizing signal generating circuit 10 to be in an operating state, and the pseudo synchronizing signal generated from the circuit 10 is fed to a phase detection circuit 7. Since the pseudo synchronizing signal and a comparison signal generated from a comparison signal generating circuit 6 make the phase comparison at the phase detection circuit 7, the correction voltage is almost kept constant and the horizontal oscillation frequency is not fluctuated and the stable high voltage is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、テレビジラン受像機において、無信号時に
も一定した高電圧を供給できる高圧安定化装置に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high voltage stabilizing device capable of supplying a constant high voltage even when there is no signal in a television receiver.

〔従来の技術〕[Conventional technology]

一般に、テレビジョン受像機における水平出力および高
圧安定化装置は第3図に示すように構成されている。こ
の第3図において、1は同期信号を含む複合映像信号、
2は複合映像信号1から同期信号のみをとりだす同期分
離回路である。
Generally, a horizontal output and high voltage stabilizing device in a television receiver is constructed as shown in FIG. In FIG. 3, 1 is a composite video signal including a synchronization signal;
2 is a synchronization separation circuit that extracts only a synchronization signal from the composite video signal 1;

一方、水平発振回路3より出力される信号で水平出力回
路4は水平偏向信号および高圧を発生させるようになっ
ており、この水平出力回路4より発生するパルスを高圧
回路5に加えて、そこで昇圧して高電圧を作るようにし
ている。
On the other hand, the horizontal output circuit 4 generates a horizontal deflection signal and high voltage using the signal output from the horizontal oscillation circuit 3. The pulses generated from the horizontal output circuit 4 are added to the high voltage circuit 5, where the voltage is boosted. to generate high voltage.

また、水平出力回路4から発生するパルスを比較信号発
生回路6に加え、この比較信号発生回路6で位相比較で
きるような信号を作るようにしている0位相検波回路7
は同期分離回路2からの同期信号と水平出力回路4で発
生するパルスを比較信号発生回路6を通してできる信号
とで位相比較し、位相の違いを電圧の高低で出力し、水
平発振回路3を制御するものである。
Further, the pulses generated from the horizontal output circuit 4 are added to the comparison signal generation circuit 6, and the zero phase detection circuit 7 generates a signal whose phase can be compared with the comparison signal generation circuit 6.
compares the phase of the synchronization signal from the synchronization separation circuit 2 and the pulse generated by the horizontal output circuit 4 with the signal generated through the comparison signal generation circuit 6, outputs the difference in phase as a high or low voltage, and controls the horizontal oscillation circuit 3. It is something to do.

また、18は位相検波回路7からの出力電圧をある一定
電圧以上にならないようにクリップするツェナーダイオ
ードである。
Further, 18 is a Zener diode that clips the output voltage from the phase detection circuit 7 so that it does not exceed a certain voltage.

次に動作について説明する。複合映像信号1を同期分離
回路2に取り入れ、そこで水平同期信号を取り出し、位
相検波回路7に取り入れている。
Next, the operation will be explained. A composite video signal 1 is input into a synchronization separation circuit 2, where a horizontal synchronization signal is extracted and input into a phase detection circuit 7.

一方、水平発振回路3は位相検波回路7からの出力電圧
により発振周波数の制御を受け、その出力発振波形によ
り水平出力回路4がドライブされる。
On the other hand, the oscillation frequency of the horizontal oscillation circuit 3 is controlled by the output voltage from the phase detection circuit 7, and the horizontal output circuit 4 is driven by the output oscillation waveform.

また、水平出力回路4で発生する水平パルスを高圧回路
5では、トランスなどで昇圧し、陰極線管に高電圧を供
給し、比較信号発生回路6では前記水平パルスを積分し
、鋸歯状波を作り、位相検波回路7に供給している。
Further, a high voltage circuit 5 boosts the horizontal pulse generated by the horizontal output circuit 4 using a transformer or the like to supply a high voltage to the cathode ray tube, and a comparison signal generating circuit 6 integrates the horizontal pulse to generate a sawtooth wave. , are supplied to the phase detection circuit 7.

位相検波回路7では、水平同期信号と比較信号発生回路
6で発生する鋸歯状波信号とで位相を比較し、位相差が
ある場合には、それに対応する補正電圧を生じるように
してあり、この補正電圧で水平発振回路3を制御してい
る。
The phase detection circuit 7 compares the phases of the horizontal synchronization signal and the sawtooth wave signal generated by the comparison signal generation circuit 6, and if there is a phase difference, generates a corresponding correction voltage. The horizontal oscillation circuit 3 is controlled by the correction voltage.

たとえば、複合映像信号lが無くなった場合、つまり無
信号状態になった場合、位相検波回路7では位相比較の
ための水平同期信号が供給されないため、補正電圧は一
定に保たれず、フリーラン状態となる。
For example, when the composite video signal l disappears, that is, when there is no signal, the phase detection circuit 7 is not supplied with a horizontal synchronization signal for phase comparison, so the correction voltage is not kept constant, and a free-run state occurs. becomes.

もし、仮に水平発振回路3は補正電圧が上昇すると、発
振周波数が低くなるように構成されていた場合、水平出
力パルス電圧と水平発振周波数f、との間には、 VCP″t/rw の関係があるため、高圧回路5の出力高電圧は上昇し異
常高圧となる。
If the horizontal oscillation circuit 3 is configured so that the oscillation frequency decreases as the correction voltage increases, the relationship between the horizontal output pulse voltage and the horizontal oscillation frequency f is VCP''t/rw. Therefore, the output high voltage of the high voltage circuit 5 increases and becomes abnormally high voltage.

ここで、ツェナーダイオード18は位相検波回路7から
の補正電圧がある一定電圧以上になるとツェナー電圧以
上にならないようにクリップし、異常高圧とならないよ
うにしている。
Here, when the correction voltage from the phase detection circuit 7 exceeds a certain voltage, the Zener diode 18 clips so that the voltage does not exceed the Zener voltage, thereby preventing an abnormally high voltage.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の高圧安定装置は以上のように構成されているため
、無信号時にはある一定の高圧以上にならないが、やは
り高圧の変動を防ぐことはできず、水平出力回路4およ
び高圧回路5などの素子に異常に負荷がかかったり実際
の画像も同期がとれず、見ずらくなるという問題を生じ
ていた。
Since the conventional high voltage stabilizer is configured as described above, the voltage does not exceed a certain level when there is no signal, but it is still unable to prevent fluctuations in the high voltage, and the elements such as the horizontal output circuit 4 and the high voltage circuit 5 This resulted in problems such as an abnormal load being placed on the images and the actual images being out of sync, making them difficult to view.

この発明は、かかる問題点を解決するためになされたも
ので、無信号時にも水平出力回路および高圧回路からの
高電圧出力を一定に保つことのできる高圧安定装置を得
ることを目的とする。
The present invention was made to solve these problems, and an object of the present invention is to provide a high voltage stabilizing device that can maintain a constant high voltage output from a horizontal output circuit and a high voltage circuit even when there is no signal.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る高圧安定化装置は、複合映像信号が無く
なった無信号時に同期信号がないことを検出する同期信
号判別回路と、この同期信号判別回路の出力により無信
号時にも同期信号を位相検波回路に供給する位相検波回
路とを設けたものである。
The high-voltage stabilizing device according to the present invention includes a sync signal discriminator circuit that detects the absence of a sync signal when there is no signal when the composite video signal is gone, and a sync signal detecting circuit that detects the phase of the sync signal even when there is no signal by using the output of this sync signal discriminator circuit. A phase detection circuit for supplying signals to the circuit is provided.

〔作 用〕[For production]

この発明においては、同期信号判別回路により複合映像
信号のないことを判別して同期信号のないことを検出す
ると同期信号発生回路に出力し、同期信号発生回路は無
信号時にも疑似的な同期信号を発生させて位相検波回路
に出力することにより、位相検波回路からの補正電圧を
一定に保ち、水平または垂直発振周波数も一定になり、
高電圧も変動せず安定に保たれる。
In this invention, the synchronization signal discriminating circuit determines the absence of a composite video signal, and when it detects the absence of a synchronization signal, it outputs it to the synchronization signal generation circuit, and the synchronization signal generation circuit generates a pseudo synchronization signal even when there is no signal. By generating and outputting to the phase detection circuit, the correction voltage from the phase detection circuit is kept constant, and the horizontal or vertical oscillation frequency is also kept constant.
High voltage remains stable without fluctuations.

〔実施例〕〔Example〕

以下、この発明の高圧安定化装置の実施例を図について
説明する。第1図はその一実施例の構成を示すブロック
図で諷り、構成の説明に際し、第3図と同一部分には同
一符号を付してその説明を省略し、第1図とは異なる部
分を主体に述べる。
Embodiments of the high-pressure stabilizing device of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of one embodiment, and when explaining the configuration, the same parts as in FIG. I will mainly discuss.

この第1図において、8はこの発明によって新たに付加
されたブロックであり、同期分離回路2から水平同期信
号が出力されているかを判別する同期信号判別回路9と
、この同期信号判別回路9から同期信号が無いと判断さ
れた場合に、疑似的に等価な同期信号を発生して位相検
波回路7に出力する同期信号発生回路10とで構成され
ている。
In FIG. 1, 8 is a block newly added according to the present invention, which includes a synchronous signal discriminating circuit 9 that determines whether a horizontal synchronous signal is output from the synchronous separating circuit 2, and The synchronization signal generation circuit 10 generates a pseudo-equivalent synchronization signal and outputs it to the phase detection circuit 7 when it is determined that there is no synchronization signal.

また、第2図はこの発明における同期信号の有無を判別
する同期信号判別回路9の一実施例を示す回路図である
。この第2図において、水平同期信号11は抵抗器12
とコンデンサ13との積分器を介してスイッチング動作
を行うトランジスタ14のベースに供給するようになっ
ている。
Further, FIG. 2 is a circuit diagram showing an embodiment of the synchronization signal discriminating circuit 9 for determining the presence or absence of a synchronization signal according to the present invention. In this FIG. 2, the horizontal synchronizing signal 11 is connected to the resistor 12.
The signal is supplied to the base of a transistor 14 that performs a switching operation via an integrator consisting of a capacitor 13 and a capacitor 13.

トランジスタ14のエミッタはアースされ、コレクタは
負荷抵抗器15を介して十Bの電源17に接続されてい
るとともに、ダイオード16を通して同期信号発生回路
10の入力端に接続されている。
The emitter of the transistor 14 is grounded, and the collector is connected to a 10B power supply 17 through a load resistor 15 and to the input end of the synchronizing signal generating circuit 10 through a diode 16.

次に動作について説明する。第1図において、複合映像
信号1が無く・なった場合、つまり、無信号時に同期分
離回路2からは水平同期信号11(第2図)は出力され
ず、同期信号判別回路9への供給は無くなる。
Next, the operation will be explained. In FIG. 1, when the composite video signal 1 disappears, that is, when there is no signal, the horizontal synchronization signal 11 (FIG. 2) is not output from the synchronization separation circuit 2, and the supply to the synchronization signal discrimination circuit 9 is It disappears.

ここで、第2図において、同期信号判別回路9の詳細な
動作について説明する。水平同期信号11が供給されて
いる場合、抵抗器12とコンデンサ13によりある時定
数で水平同期信号11は積分される。
Now, referring to FIG. 2, the detailed operation of the synchronization signal discriminating circuit 9 will be explained. When the horizontal synchronizing signal 11 is supplied, the horizontal synchronizing signal 11 is integrated by a resistor 12 and a capacitor 13 with a certain time constant.

この積分された電圧はトランジスタ14のベースに供給
されるため、トランジスタ14はオン状態となり、コレ
クタ電流が流れ、負荷抵抗器15には電位差が生じ、同
期信号発生回路10には、十B電圧が供給されず、動作
しない状態にある。
Since this integrated voltage is supplied to the base of the transistor 14, the transistor 14 is turned on, a collector current flows, a potential difference is generated in the load resistor 15, and a voltage of 10B is generated in the synchronization signal generation circuit 10. Not supplied and in non-operational condition.

水平同期信号11が供給されない場合、トランジスタ1
4はカットオフ状態となり、負荷抵抗器15の両端には
電位差は生じないため、ダイオード16を介して同期信
号発生回路10には十B電圧が供給され、動作状態とな
る。
If horizontal synchronization signal 11 is not supplied, transistor 1
4 is in a cut-off state, and no potential difference occurs between both ends of the load resistor 15. Therefore, a voltage of 10 B is supplied to the synchronizing signal generating circuit 10 via the diode 16, and the synchronizing signal generating circuit 10 becomes in an operating state.

ここで、説明を再び第1図に戻す、水平同期信号11が
同期信号判別回路9に供給されない場合、上述のように
同期信号発生回路10に十Bが供給され、動作状態とな
り、位相検波回路7には同期信号発生回路10で作成さ
れる疑似的な同期信号が供給されることになる。
Here, the explanation returns to FIG. 1 again. When the horizontal synchronization signal 11 is not supplied to the synchronization signal discrimination circuit 9, 10B is supplied to the synchronization signal generation circuit 10 as described above, and the phase detection circuit 7 is supplied with a pseudo synchronization signal generated by the synchronization signal generation circuit 10.

位相検波回路7では、この疑似同期信号と比較信号発生
回路6から発生する比較信号とで位相比較するため、補
正電圧はほぼ一定に保たれ、水平発振周波数も変動せず
に安定した高電圧も得ることができる。
Since the phase detection circuit 7 compares the phase of this pseudo synchronization signal with the comparison signal generated from the comparison signal generation circuit 6, the correction voltage is kept almost constant, and the horizontal oscillation frequency does not change and a stable high voltage is also generated. Obtainable.

また、上記実施例では、水平同期信号についての場合の
み説明したが、垂直同期信号についても同様のことが考
えられる。
Further, in the above embodiment, only the horizontal synchronizing signal was explained, but the same can be considered for the vertical synchronizing signal.

つまり、垂直同期信号と垂直出力波形とで位相検波し、
同期の安定化をしている場合、やはり無信号時に垂直同
期信号が無くなるため、垂直発振周波数は変動し、垂直
出力は不安定となり、出力回路の素子などに異常な負荷
がかかると考えられる。
In other words, phase detection is performed using the vertical synchronization signal and the vertical output waveform,
When synchronization is stabilized, the vertical synchronization signal disappears when there is no signal, so the vertical oscillation frequency fluctuates, the vertical output becomes unstable, and it is thought that an abnormal load will be placed on the elements of the output circuit.

そこで、この発明の装置によれば、垂直同期信号がない
場合、疑似的に垂直同期信号を作成すれば、複合映像信
号がない場合でも、安定した垂直発振を行わせることが
できる。
Therefore, according to the apparatus of the present invention, if a vertical synchronization signal is created in a pseudo manner when there is no vertical synchronization signal, stable vertical oscillation can be performed even when there is no composite video signal.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したとおり、複合映像信号がない場
合に同期信号の有無を同期信号判別回路で判別し、その
出力により同期信号発生回路からの疑似的な同期信号を
供給できるため、無信号時にも水平または垂直発振周波
数を一定に保つことができるとともに、高電圧も変動せ
ず一定にすることができる。
As explained above, in this invention, when there is no composite video signal, the presence or absence of a synchronization signal is determined by the synchronization signal discriminating circuit, and the output can supply a pseudo synchronization signal from the synchronization signal generation circuit. Also, the horizontal or vertical oscillation frequency can be kept constant, and the high voltage can also be kept constant without fluctuation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の高圧安定化装置の一実施例のブロッ
ク図、第2図は同上高圧安定化装置における同期信号判
別回路の詳細な回路図、第3図は従来の高圧安定化装置
のブロック図である。 2・・・同期分離回路、3・・・水平発振回路、4・・
・水平出力回路、5・・・高圧回路、6・・・比較信号
発生回路、7・・・位相検波回路、9・・・同期信号判
別回路、10・・・同期信号発生回路。 なお、図中同一符号は同一または相当部分を示す。
Fig. 1 is a block diagram of an embodiment of the high voltage stabilizing device of the present invention, Fig. 2 is a detailed circuit diagram of a synchronization signal discrimination circuit in the same high voltage stabilizing device, and Fig. 3 is a block diagram of a conventional high voltage stabilizing device. It is a block diagram. 2...Synchronization separation circuit, 3...Horizontal oscillation circuit, 4...
- Horizontal output circuit, 5... High voltage circuit, 6... Comparison signal generation circuit, 7... Phase detection circuit, 9... Synchronization signal discrimination circuit, 10... Synchronization signal generation circuit. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 映像信号からの同期信号と、水平出力回路からの水平パ
ルスまたは垂直出力回路からの垂直パルスとの位相を検
波しその検波出力電圧に応じて水平発振回路または垂直
発振回路を制御する位相検波回路と、上記水平発振回路
または垂直発振回路の出力で駆動される水平出力回路ま
たは垂直出力回路と、この水平出力回路または垂直出力
回路で発生するパルスを高電圧化する高圧回路と、上記
水平出力回路または垂直出力回路の出力から上記位相検
波回路に比較する信号を出力する比較信号発生回路と、
上記同期信号の有無を判別する判別回路と、判別回路か
らの出力により疑似的に同期信号を発生して上記位相検
波回路に出力する同期信号発生回路とを具備した高圧安
定化装置。
A phase detection circuit that detects the phase of a synchronization signal from a video signal and a horizontal pulse from a horizontal output circuit or a vertical pulse from a vertical output circuit and controls a horizontal oscillation circuit or a vertical oscillation circuit according to the detected output voltage. , a horizontal output circuit or a vertical output circuit driven by the output of the horizontal oscillation circuit or the vertical oscillation circuit, a high voltage circuit that increases the voltage of pulses generated by the horizontal output circuit or the vertical output circuit, and the horizontal output circuit or the vertical oscillation circuit. a comparison signal generation circuit that outputs a comparison signal from the output of the vertical output circuit to the phase detection circuit;
A high voltage stabilizing device comprising: a discrimination circuit that discriminates the presence or absence of the synchronization signal; and a synchronization signal generation circuit that generates a pseudo synchronization signal based on the output from the discrimination circuit and outputs it to the phase detection circuit.
JP61283639A 1986-11-26 1986-11-26 High pressure stabilizer Expired - Fee Related JPH0654949B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61283639A JPH0654949B2 (en) 1986-11-26 1986-11-26 High pressure stabilizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61283639A JPH0654949B2 (en) 1986-11-26 1986-11-26 High pressure stabilizer

Publications (2)

Publication Number Publication Date
JPS63135070A true JPS63135070A (en) 1988-06-07
JPH0654949B2 JPH0654949B2 (en) 1994-07-20

Family

ID=17668125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61283639A Expired - Fee Related JPH0654949B2 (en) 1986-11-26 1986-11-26 High pressure stabilizer

Country Status (1)

Country Link
JP (1) JPH0654949B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS513174A (en) * 1974-06-24 1976-01-12 Nippon Electric Co HANDOTA ISOCHI
JPS5453828A (en) * 1977-10-06 1979-04-27 Mitsubishi Electric Corp High tension protective circuit
JPS6218873A (en) * 1985-07-17 1987-01-27 Victor Co Of Japan Ltd Oscillation frequency control voltage generating circuit of horizontal deflecting and oscillating circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS513174A (en) * 1974-06-24 1976-01-12 Nippon Electric Co HANDOTA ISOCHI
JPS5453828A (en) * 1977-10-06 1979-04-27 Mitsubishi Electric Corp High tension protective circuit
JPS6218873A (en) * 1985-07-17 1987-01-27 Victor Co Of Japan Ltd Oscillation frequency control voltage generating circuit of horizontal deflecting and oscillating circuit

Also Published As

Publication number Publication date
JPH0654949B2 (en) 1994-07-20

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