JPS63133572A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

BACKGROUND OF THE INVENTION Field of the Invention This invention relates to high voltage semiconductor integrated circuits. More specifically, the present invention relates to high voltage integrated circuits using lateral charge control structures.

Description of the Prior Art Low power devices such as logic circuits, microprocessors and various other digital and analog circuits have traditionally been isolated from high power devices such as high voltage drivers and power switching circuits for electrical equipment. This separation between high-power and low-power devices prevents the space and cost advantages of integrated circuit technology used in low-power, smart devices from being advantageously exploited in high-power/high-voltage applications. Furthermore, digital control of high power devices is increasing in many fields, further increasing the desire to combine low power and high power capabilities into a single IC.

Over the past few years, the possibility of combining low power devices and high power/high voltage devices on one integrated circuit chip has been developed.

These so-called "small power" devices have numerous applications ranging from electroluminescent displays and electronically controlled motors to robotics and factory automation.

One approach to HVIC (high voltage integrated circuit) devices is to use substantially low voltage integrated circuit technology for high voltage applications. Such HVIC devices must overcome the tendency of high operating voltages to breakdown the pn junction within the device, ie, to cause large reverse currents to flow through this junction. Therefore, a primary goal of HVIC design is to increase the breakdown voltage of the IC while remaining compatible with low voltage IC manufacturing techniques. One solution to HVIC technology is to use lateral charge control (LCC) to allow lateral high voltage devices to be formed on the same integrated circuit as the low voltage devices while essentially using low voltage integrated circuit technology. ) structure is used. LCC approaches for high voltage devices include a blocking or drift region between the high voltage contact and the rest of the semiconductor device. This drift region extends across the depletion region of the pn junction which is reverse biased by the high voltage, thus significantly increasing the breakdown voltage of the junction. In one approach, the drift region is created with a thin, lightly doped epitaxial layer separating high and low pressure regions.

When deciding how heavily to dope the drift region,
There are conflicting factors in the desire to widen the pn junction depletion region. If the drift region is doped too heavily, the junction depletion region becomes too small, thus lowering the breakdown voltage of the device. On the other hand, if the drift region is doped too lightly, the depletion region extends over the entire length of the drift region into the heavily doped high voltage contact region. This creates a strong electric field at the junction, which also lowers the breakdown voltage. Usually, as a trade-off, the drift region is made long enough to avoid the effects described below. However, this method has the drawback of increasing the on-resistance of the device and increasing the surface area of the semiconductor required for the device. These two adverse effects are even more important in dense HVIC devices. This is because the on-resistance increases the heat generated in the circuit for large currents and the extra semiconductor surface area required is
This is because it conflicts with the desire for highly densely packed circuits.

SUMMARY OF THE INVENTION The present invention provides an improved high voltage integrated circuit (HV IC) with improved high voltage breakdown characteristics.

Additionally, the present invention provides an improved HVIC with a shorter lateral charge control drift region and reduced surface area.

Additionally, the present invention provides an improved lateral charge control HVIC with reduced on-resistance and reduced power consumption characteristics.

Additionally, the present invention provides an improved lateral charge control HVIC that can be manufactured without extra process steps relative to conventional HVICs.

The improved high voltage integrated circuit of this invention utilizes a lateral drift region surrounding high voltage contact areas in the circuit. These drift regions are divided into a number of zones that have reduced doping levels and conductivity from the high voltage contact regions. The doping profile of the multi-section drift region is selected such that, for an applied reverse bias voltage at maximum operating level, the depletion region extends over substantially the entire length of the drift region. Alternatively, a continuously varying doping profile may be used in the lateral drift region instead of a doping zone.

Lateral drift regions with multiple zones can be created using a mask with a diffusion window of varying dimensions to create multiple zones.
It can be manufactured in one process step. Alternatively, multiple mask steps may be used to form the doped areas.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a conventional high voltage diode using a lateral charge control (LCC) structure. LCC approaches for high voltage integrated circuits provide blocking regions in lateral semiconductor devices between high and low voltage portions of the IC. This LC
The C method uses bipolar semiconductor devices and FETs (field effect transistors) formed as part of the HVIC structure.
It can be used for any device. Therefore, the high-voltage diode shown in FIG. 1 is only one example of an LCC system for controlling high-voltage devices in an integrated circuit, and is the simplest structure among them.

A p-type substrate 1 lightly doped with a high-voltage diode in FIG.
0, which has a relatively thin epitaxial layer 12 of lightly doped n-type semiconductor. The diode of FIG. 1 also has a heavily doped n-dos region 14, which is coupled to a high voltage (eg, 500 volts) source 16. As shown, a heavily doped p-decade region 18 is electrically coupled to a second voltage source (eg, ground) 20. Epitaxial layer 12 typically surrounds n-domain region 14 when viewed from above. For example, the diode may be donut-shaped and the n-domain region 14 forms a localized region in the center of the donut.

The diode shown in Figure 1 has two np junctions, namely region 1.
8 and 12, with a vertical junction 22 and a horizontal junction 24. As a well-known fundamental consequence of the physics of semiconductor devices, a depletion region, ie, a region substantially depleted of majority carriers, is formed at the junction between p-type and n-type semiconductors. Simply put, this depletion region causes holes to move from the p-shaded region to the n-shaded region and electrons to move from the n-shaded region to the p-shaded region due to the excess of majority carriers in each region. It happens because of something. This diffusion of the majority carriers across the p-n junction causes the excess of positive charge in the n-shaded region adjacent to the junction and the excess of negative charge in the p-shaded region adjacent to the junction to spread beyond that of the majority carriers. This continues until a potential barrier is created that prevents diffusion. In this region, the carriers that have already diffused through the junction combine with carriers of opposite charge (ie, holes and electrons combine), leaving a region substantially free of majority carriers.

It is the size of the depletion region and its associated potential barrier across this junction that makes the diode rectifying. Similarly, it is the size of the depletion region and the electric field strength that determine the avalanche breakdown voltage of the diode, ie, the voltage at which the diode begins to conduct in the reverse direction.

Since the breakdown voltage of the diode shown in FIG. 1 is approximately a function of the size of the depletion region in the epitaxial drift region 12, the goal of the LCC approach for HVICs is to , to create a large depletion region. The dimensions of the depletion region in the epitaxial layer 12 for a given reverse bias voltage are the dimensions of the lateral np junction 2 between the epitaxial layer 12 and the substrate 10.
4 and the vertical pn junction 22 between the cathode 18 and the epitaxial layer 12.

Epitaxial layer 12 is chosen to be relatively thin compared to substrate layer 10 so that the effect of the lateral np junction between epitaxial layer 12 and substrate 10 lowers the surface electric field of the diode, thus increasing the breakdown voltage of the device. It has become. The dimensions of the depletion regions resulting from these two np junctions are also affected by the reverse bias voltage applied to the junctions and the relative doping strengths of the adjacent n and p shadow regions.

E, J, Wildy, p, v, g1/-1T, published in IEDM19g2, pages 268 to 271.
The paper by P. Chau and H. R. Chan, “Implanted RES
Please refer to ``Model Creation and Process Implementation of URF Devices''.

The competing factors in determining the doping concentration of drift region 12 can be understood by considering the electric field at the surface of the diode for various doping concentrations of region 12. This is because it is the magnitude of the electric field that determines the breakdown voltage of the diode, ie, minimizing the electric field for a given voltage 16 will maximize the breakdown voltage of the device. FIG. 2 shows, for the diode of FIG. 1, the effect that varying the doping level of the drift region has on the surface electric field. For the critical electric field E corresponding to diode breakdown, the magnitude and spatial r changes are qualitatively shown. ff! The qualitative characteristics of the surface electric field shown in Figure 2 reflect the well-known quantitative results obtained by numerical models. Phillips J,
Res. 35.1-13 (1980) J, A
, Ables et al., "Thin Layer High Pressure Devices".

In FIG. 2, the voltage applied to n+ region 14 corresponds to the desired operating voltage and is constant in FIGS. 2a, 2b, and 2c. FIG. 2a shows the case where the drift region 12a is too heavily doped.

The depletion region extends only a short distance into the drift region 12 and twists, creating a voltage gradient over this relatively short distance. The electric field reaches a peak 25a at the pn junction 22, which exceeds the breakdown field E, e,r. Therefore, the breakdown voltage is lower than the desired operating voltage.

FIG. 2b shows the case where the drift region 12b is too lightly doped. The depletion region extends over the length of the drift region 12 into the heavily doped region 14 . in this case,
n+ type region 14 in which a portion of the depletion region is heavily doped;
It only penetrates a very short distance. The short distance that the n+ type region 14 depletion region penetrates is due to the presence of a very large number of majority carriers in this heavily doped region 14. To deplete this region, a very large number of majority carriers must be depleted per unit length of the population of the depleted region. Therefore, a region having a large polarization charge per unit length is generated. As a result, the depletion region becomes strongly doped region 1
4, a large voltage gradient occurs. This voltage gradient corresponds to a large electric field 25b, which exceeds E 2 and thus indicates that the breakdown voltage r 2 is lower than the desired operating voltage.

In Figure 2c, the surface electric field is shown for a desired doping level. As a result, ideally the surface electric field has a symmetrical Cr peak electric field 25c that is much smaller than E. However, in reality, it is difficult to provide such an ideal doping distribution for the drift region 12c. Variations from the optimum doping quickly lead to the situation shown in FIG. 2a or 2b.

In conventional schemes, the mechanism to avoid the two conflicting problems mentioned above is to deform the region such that a large depletion region is obtained for the desired reverse bias voltage without crowding the heavily doped region 14. Drift region 12 is made long enough to allow light doping of drift region 12. However, this method increases the on-resistance of the device and therefore
increases the heat generated. Furthermore, the drift region 12 is n
Increasing the cross-sectional length of the drift region 12, since it surrounds the +-shaped high pressure region 14, significantly increases the overall surface area required for the HVIC.

FIG. 3 shows a cross-sectional view of a high voltage diode using the improved LCC type design of the present invention. The improved HVIC diode includes a highly doped n+ region 26 coupled to a high voltage source 16. A second lower circuit voltage, e.g. the ground 20 is heavily doped p
+Shape region 28 is combined. Heavily doped p+ and n+ regions 2826 are separated by a lateral drift region 34 formed on a lightly doped p-type semiconductor substrate 32. The lateral drift region 34 is divided into a number of zones 34a to 34n in which the doping concentration, ie, the concentration of available majority carriers, varies. Area 3
Region 4a has the lightest doping concentration among the n regions, and region 34b has a slightly higher doping concentration. The doping level of areas 34a to 34n is n+
The doping level of area 34n increases toward the n+ type region 26, and the doping level of the area 34n can approach the doping level of the n+ type region 26. A depletion region formed by vertical pn junction 30 between region 28 and drift region 34 extends along drift region 30 a distance determined by the doping level, ie, majority carrier concentration, of regions 34a-34n. Thus, varying the relative doping levels of regions 3ja to 34n, the depletion region extends substantially the entire length of drift region 34, but n+ type region 2
By not including 6 people, it is possible to select the size of the depletion region for a given applied reverse bias voltage. For the reasons previously mentioned, this prevents large voltage gradients at the interface between drift region 34 and heavily doped regions 26 and 28, thus increasing the breakdown voltage of the diode. Instead, the multiple doping zones allow drift region 34 to be made significantly shorter, for example 30 to 40% shorter, than would otherwise be required for a given operating voltage. This shortening of the drift region 34 results in a corresponding decrease in the on-resistance of the device, resulting in a
surface area becomes significantly smaller.

FIG. 4 shows one example of a suitable lateral doping profile for the multi-section lateral drift region of the present invention. The vertical axis shows the doping concentration Q/A expressed in charge per unit area. Note in this regard that it is the total charge per unit surface area of the drift region that is meaningful, and that thicker drift regions must be compensated for by lighter doping concentrations. The horizontal axis of FIG. 4 indicates the distance along the lateral drift region measured from the vertical pn junction. As can be seen from this figure, the various doping zones z1 to Zn approximate a flattened parabolic curve. However, the curve shown in FIG. 4 is only one example, and many variations are possible in which the doping concentration increases monotonically toward the high voltage contact region. Figure 4 shows n-
It shows a doping distribution that changes from n+ to
It is also possible to vary the doping concentration on the upper and lower sides.

As can be seen from FIG. 4, the various doping zones z1 to z
The widths of n are not necessarily of the same dimension, and the least doped zone z1 may extend a considerable distance along the lateral drift region from the pn junction. For example, area z1
Assuming that the doping level of is close to the optimum level shown in FIG. As shown in the figure, the doping level is gradually increased to the doping level of the n+ type high voltage contact region.
The level may be increased.

The number of zones used for the lateral drift region is substantially dependent on the manufacturing method, with a higher number of zones resulting in a more smoothly varying doping profile. Alternatively, a smoothly varying doping profile may be used without using separate zones. However, significant improvements in breakdown voltage are possible even when fewer areas are used, and substantial improvements are obtained even with only two doped areas in the lateral drift region. Preferred embodiments use five or more lateral doping zones. The number of zones used is also related to the voltage level of the HVIC. For example, 1,
A 200 volt application would require more area than a 200 volt application to ensure that avalanche failure does not occur.

FIG. 5 shows a high voltage MOSFET device using the multi-section drift region of the present invention. A high voltage MOSFET has an n+ decadal rain region 36 coupled to a high voltage source 16, an extended p+ decadal source region 38, and an ndeque source region 4o formed within the base region 38. Base region 3B and drain region 36 are separated by a drift region 42 consisting of multiple sections. As in the improved high voltage diode shown in FIG. 3, the doping concentration of the zones increases from zone 1, 42a, to zone n, 42n. A multi-area lateral drift region 42 is formed over a lightly doped p-type substrate 44 .

An oxide layer 46 is formed over the multi-section lateral drift region 42 . A portion of oxide layer 46 is covered with gate electrode 48 . This gate electrode is aligned over a portion of base region 38.

Additionally, a conductive contact 50 is provided over source region 40 and a portion of base region 38 . Apart from the advantages provided by the multi-section drift region 42, the operation of the improved HVIC MOSFET is conventional, especially apart from the increased breakdown voltage and reduced surface area.

FIG. 6 shows a high voltage lateral bipolar transistor using the multi-section lateral charge control region of the present invention. A high voltage bipolar transistor has an n+ rector region 52 coupled to a high voltage source 16, a p+ dec base region 54 coupled to a base electrode 56, and an n+ emitter region 58, the emitter region being a base region. It can be formed on the surface of a part of 54. Emitter region 58 should be large enough to allow emitter contact electrode 60 to be formed thereon without shorting to base region 54. The high voltage contact regions, collector region 52 and base region 54, are separated by a lateral drift region 62 consisting of multiple zones. A multi-section lateral drift region 62 has a plurality of sections 62a-62n of varying doping concentration and conductivity.

The doping level in the first zone 62a is chosen to be the lowest and the doping level increases towards the high voltage collector region 52. The area adjacent collector region 52, ie area 62n, therefore has the highest doping concentration and the highest concentration of majority carriers. Emitter region 58, base region 54, lateral drift region 64, and collector region 52 are all preferably formed on lightly doped p-type substrate region 64. The thickness of lateral drift region 62 is preferably chosen to be significantly smaller than substrate region 64;
For example, it can be about 5 to 10 microns.

FIG. 7 shows a masking process that can form the multi-area lateral drift region of the present invention in a single masking process. Is the process shown in Figure 3? as part of the fabrication of an improved HVIC diode such as that described above. A partially formed diode already has a p+ region 28 and an n+ region 26 formed on the p'' substrate 32. Also shown is a mask layer 66 having openings 68a-68n of varying size through which ion implantation can be performed. When forming an n-type lateral drift region in the illustrated process, an arsenic or phosphorous ion implantation process can be performed through mask layer 66. Holes 68a to 68n
The dimensions increase toward the n-domain region 26, such that the doping level becomes stronger in areas closer to the n-domain region 26. The number and spacing of holes 68a-68n can be varied to create a more smoothly varying doping profile for the lateral drift region as desired. Using a large number of dimensionally varying apertures provides a substantially continuously varying doping profile. Another method using a single mask for creating a varying doping profile, either zoned or continuously varying, was described on February 5, 1985.
Pending U.S. patent application serial number box 698 filed on
It is described in No. 495. Additionally, for example in low pressure applications, the n-dos region 26 can optionally be made in the same masking step as the lateral drift region 30 by simply providing a large hole in the mask 66 above the region 26.

Alternatively, the ion implantation step may be performed into an n-type epitaxial φ drift layer 70 formed by conventional methods. Alternatively, the drift layer 30 may be made by diffusion or implantation rather than epitaxially.

In this manner, the ion implantation process need only be performed in areas where the doping is desired to be stronger than in the n-shadow region 70, such as area z2 to 2° in FIG.

Alternatively, multiple areas of the lateral drift region of the present invention may be provided in multiple mask steps, and a separate mask may be used for each area.

This invention applies to the high-voltage diode and MOS described above.
It will be appreciated that in addition to FET and bipolar devices, other high voltage devices using LCC structures can be used as well. For example, the invention is equally applicable to high voltage JPET (junction field effect transistor) and IGT (insulated gate transistor) devices. Furthermore, although the invention has been described in the context of horizontal HVIC devices, it is possible to combine such devices with vertical high power devices in a single integrated circuit. Furthermore, the illustrated embodiments of high voltage diodes, bipolar transistors and MOSFEs
Although the case where T is an n-type drift region and an n-type high-voltage contact region formed on a p-type substrate has been described, it can also be applied to a p-type drift region and a p+-type pressure contact region on an n-type substrate, or as is well known to those skilled in the art. It will be appreciated that other combinations using semiconductor materials may be used as well.

Therefore, this invention is not limited to the embodiments described above, since within its scope it is possible to take various other configurations, the number of which is too large to be exemplified. It should not be interpreted as such. It is, therefore, to be understood that the scope of the invention is limited only by the scope of the claims that follow.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a conventional high voltage diode using a lateral charge control structure; Figures 2a, 2b and 2c are surface electric fields for varying doping concentrations and lengths of the drift region of the diode in Figure 1; FIG. 3 is a cross-sectional view of a high-voltage diode of the present invention using multiple doping regions in the lateral drift region; FIG. A graph showing an example of lateral doping distribution. Figure 5 is a cross-sectional view of a high-voltage lateral MOSFET of the present invention. Figure 6 is a cross-sectional view of a high-voltage lateral bipolar transistor of the present invention. Figure 7 is a lateral diagram of a high-voltage diode. FIG. 3 is a cross-sectional view illustrating one mask step used to create multiple zones in the drift region. Explanation of main symbols 26: n+ type region 8: p+ type region 2: p type substrate 34 drift region

Claims (1)

[Claims] 1) In a semiconductor device used with a high-voltage power supply, a substrate region made of a semiconductor material of a first conductivity type, and a semiconductor material formed on the substrate region and having more conductivity than the substrate region. a second region of semiconductor material of the first conductivity type doped to have a second conductivity type; and a second region of semiconductor material of the first conductivity type formed on the substrate region and electrically coupled to the high voltage source. a high voltage contact region of semiconductor material; and a second electrical conductor extending laterally between a second region of semiconductor material of the first conductivity type and a first region of semiconductor material of the second conductivity type. a drift region of semiconductor material of a type, and a plurality of doped regions having varying doping concentrations are formed within the drift region, the doping concentrations of the doped regions being from the high voltage region to the first conductivity type. A semiconductor device reduced to a second region of semiconductor material. 2) In the semiconductor device described in claim 1),
A semiconductor device in which the drift region has at least three doping zones. 3) In the semiconductor device described in claim 1),
A semiconductor device in which the plurality of doping zones form a varying doping distribution approximating a flat parabolic curve, the distribution increasing from a predetermined doping concentration to a doping concentration of the high voltage contact region. 4) In the semiconductor device described in claim 1),
A semiconductor device in which the drift region has at least five doping zones. 5) In the semiconductor device described in claim 1),
A semiconductor device in which the drift region has a thickness of less than 10 microns. 6) In a high voltage MOSFET device for use with a high voltage source, a substrate region of lightly doped semiconductor material having a first conductivity type and a source of semiconductor material having a second conductivity type formed on the substrate region; a base region of a semiconductor material having the first conductivity type formed on the substrate region and doped to be more conductive than the substrate region; a base region on the substrate region; a drain region of a semiconductor material having the second conductivity type formed on the substrate region between the base region and the drain region; and a semiconductor material having the second conductivity type formed on the substrate region between the base region and the drain region. and having a number of regions of varying doping concentration, such that the doping concentration varies from a lightly doped level adjacent to the base region to a more heavily doped level adjacent to the drain region. a thin drift region; an insulating layer formed over the drift region and a portion of the base region; a conductive gate electrode formed above the base region and over a portion of the insulating layer; and over the drain region. a high voltage MOSFET device having a conductive drain contact formed therein and electrically coupled to the high voltage source, and a conductive source contact region formed over the source region and a portion of the base region. 7) A high voltage MOSFET device according to claim 6), wherein the doping level of the region varies from the base region to the drain region with a doping distribution approximating a monotonically increasing S-shaped curve. MOSFE
T device. 8) A high voltage MOSFET device according to claim 6), wherein the thin drift region has at least three zones of varying doping level.
T device. 9) In the high voltage MOSFET device according to claim 6), the semiconductor material of the first conductivity type is p-type silicon, and the semiconductor material of the second conductivity type is n-type silicon. MOSFET device. 10) High-pressure MOSFET described in claim 6)
A high voltage MOSFET device, wherein the semiconductor material having a first conductivity type is n-type silicon and the semiconductor material having a second conductivity type is p-type silicon. 11) Lateral charge controlled high voltage integration for use with a high voltage power supply, such that a plurality of high voltage contact regions of material of a first conductivity type are laterally separated from a low voltage region of semiconductor material of a second conductivity type. a thin drift region of semiconductor material having the first conductivity type surrounding each of the high voltage contact regions and laterally separating the contact regions from the low voltage regions; A lateral charge controlled high voltage integrated circuit device in which the region has a varying doping concentration that decreases with distance from the high voltage contact region. 12) In the lateral charge control high voltage integrated circuit device according to claim 11), the doping distribution is such that the doping concentration of majority carriers in the drift region decreases with distance from the high voltage contact region. Lateral charge control high-voltage integrated circuit device that changes in many ways. 13) In the lateral charge controlled high voltage integrated circuit device according to claim 11), the thin drift region is divided into separate sections, each section having a respective section from the high voltage region. A lateral charge controlled high voltage integrated circuit device having a doping level that varies with distance. 14) In the lateral charge controlled high voltage integrated circuit device according to claim 11), the high voltage contact region is composed of n^+ doped silicon, and the thin drift region is further lightly doped. A lateral charge controlled high voltage integrated circuit device constructed of n-type silicon. 15) In the lateral charge control high voltage integrated circuit device according to claim 11), the high voltage contact region is p^+ type silicon, and the thin drift region is further made of lightly doped p type silicon. A lateral charge controlled high voltage integrated circuit device is formed. 16) In a high voltage bipolar transistor device, a lightly doped substrate region of semiconductor material having a first conductivity type; and a base region of semiconductor material having the first conductivity type formed on the substrate region. an emitter region of a semiconductor material having a second conductivity type formed on the substrate region, optionally adjacent to or over a portion of the base region; and spaced apart from the base region. a collector region of the semiconductor material having the second conductivity type formed on the substrate region; and a collector region of the semiconductor material having the second conductivity type formed on the substrate region between the collector region and the base region. a thin drift region, the doping level of the thin drift region varying between the base region and the collector region such that the doping level is higher near the collector region; High voltage bipolar transistor device. 17) having a plurality of vertical rectifying junctions between laterally spaced regions of semiconductor material having a first conductivity type and a second conductivity type, such that selected regions are coupled to a high voltage; A lateral high voltage integrated circuit device having a lateral voltage blocking region provided at each junction adjacent to a region of high voltage, the lateral voltage blocking region coupled to the high voltage region. a lateral high voltage integrated circuit device comprising a semiconductor material having a conductivity type of a region, the blocking region having a doping concentration of majority carriers, the concentration varying from the vertical junction to the region coupled to the high voltage; . 18) In the lateral high voltage integrated circuit device according to claim 17), the doping concentration of majority carriers in the lateral voltage blocking region is monotonous from the vertical junction to the region coupled to the high voltage. The number of high-voltage integrated circuit devices is increasing.