JPS6313340B2 - - Google Patents

Info

Publication number
JPS6313340B2
JPS6313340B2 JP9314781A JP9314781A JPS6313340B2 JP S6313340 B2 JPS6313340 B2 JP S6313340B2 JP 9314781 A JP9314781 A JP 9314781A JP 9314781 A JP9314781 A JP 9314781A JP S6313340 B2 JPS6313340 B2 JP S6313340B2
Authority
JP
Japan
Prior art keywords
substrate
insulating film
temperature
vapor phase
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9314781A
Other languages
Japanese (ja)
Other versions
JPS57208146A (en
Inventor
Kazutaka Kamitake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP9314781A priority Critical patent/JPS57208146A/en
Publication of JPS57208146A publication Critical patent/JPS57208146A/en
Publication of JPS6313340B2 publication Critical patent/JPS6313340B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【発明の詳細な説明】 本発明は化合物半導体装置の製造工程に於ける
基板結晶への絶縁膜形成方法に関するものであ
り、特に砒化ガリウム、インジウムリン、ガリウ
ムリン等の比較的低温で分解して基板結晶の化学
量論的組成がくずれ易い化合物半導体基板へ高温
での気相成長法による良質なる絶縁膜を形成し、
かつ基板結晶の化学量論的組成及び形成された絶
縁膜中への基板構成元素等の不純物の拡散を極力
抑える方法を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an insulating film on a substrate crystal in the manufacturing process of compound semiconductor devices. We form high-quality insulating films by vapor phase growth at high temperatures on compound semiconductor substrates whose stoichiometric composition of substrate crystals is easily distorted.
The present invention also provides a method for minimizing the stoichiometric composition of the substrate crystal and the diffusion of impurities such as substrate constituent elements into the formed insulating film.

従来、一般に上記化合物半導体への絶縁膜、例
えばシリコン窒化膜では、 (1) スパツタ法(反応性スパツタ、プラズマスパ
ツタ等) (2) 気相成長法(熱反応気相成長、プラズマ反応
気相成長等) 等が用いられている。スパツタ法により形成した
窒化膜では熱処理により気泡やクラツクが発生し
易く、また熱歪の発生、絶縁膜構成元素からの内
部拡散、スパツタによる歪発生等の好ましくない
現象が見出されている。またプラズマ気相成長膜
でも熱歪の発生、高温熱処理による絶縁膜組成元
素の半導体基板への内部拡散等同様である。
Conventionally, insulating films such as silicon nitride films for the above compound semiconductors have generally been formed using (1) sputtering methods (reactive sputtering, plasma sputtering, etc.), (2) vapor phase growth methods (thermal reactive vapor phase epitaxy, plasma reactive vapor phase growth, etc.). growth, etc.) are used. In nitride films formed by sputtering, bubbles and cracks are likely to occur during heat treatment, and undesirable phenomena such as thermal distortion, internal diffusion from elements constituting the insulating film, and distortion due to sputtering have been found. In addition, the same problem occurs in plasma vapor-deposited films, such as occurrence of thermal strain and internal diffusion of insulating film composition elements into the semiconductor substrate due to high-temperature heat treatment.

しかしながら上記成長方法は化合物半導体への
絶縁膜形成という観点からは基板構成元素の分解
が問題とならない程度の比較的低温で行なえると
いう利点があり、絶縁膜の膜質、特に基板結晶の
分解温度以上の高温熱処理(熱分解臨界温度)で
の熱歪、クラツク等を発生させないことが問題と
ならないような場合には良好な形成方法と考えら
れる。
However, from the viewpoint of forming an insulating film on a compound semiconductor, the above growth method has the advantage that it can be performed at a relatively low temperature to the extent that decomposition of the constituent elements of the substrate is not a problem. It is considered to be a good forming method in cases where there is no problem of not causing thermal distortion, cracks, etc. during high-temperature heat treatment (thermal decomposition critical temperature).

一方、熱反応気相成長法は上記膜質に関して
は、一般に基板結晶の熱分解臨界温度付近又はそ
れ以上で成長させるため、良好であるが、基板結
晶が高温、長時間熱処理されているために化合物
半導体基板結晶の熱分解等による基板結晶の特性
を損ねていた。
On the other hand, the thermal reaction vapor phase growth method is good in terms of the film quality as it is generally grown near or above the thermal decomposition critical temperature of the substrate crystal, but because the substrate crystal is heat treated at high temperature and for a long time, it The properties of the semiconductor substrate crystal were impaired due to thermal decomposition of the semiconductor substrate crystal.

本発明はこの相反する特質を熱反応気相成長法
により解決する方法を提供するものである。
The present invention provides a method for solving these contradictory characteristics using a thermal reaction vapor phase growth method.

本発明の特徴を要約すると (1) 基板結晶を所望の気相成長温度まで加熱する
までの時間並びに絶縁膜形成後基板の熱分解臨
界温度又は基板内不純物原子等の拡散が無視し
うる温度に降温されるまでの時間が極めて短時
間であること(双方とも10秒程度以内)。
To summarize the features of the present invention, (1) the time required to heat the substrate crystal to the desired vapor phase growth temperature, and the time required to heat the substrate crystal to the desired vapor phase growth temperature, and the time required to reach the thermal decomposition critical temperature of the substrate after forming the insulating film, or the temperature at which the diffusion of impurity atoms in the substrate can be ignored. The time it takes for the temperature to drop is extremely short (within about 10 seconds for both).

(2) 基板結晶のみを高温に加熱できる(コールド
ウオール型)こと。
(2) Only the substrate crystal can be heated to a high temperature (cold wall type).

(3) 絶縁膜形成速度を気相成長法に供せられる反
応ガスモル比を上げて極力高温度(50〜100
Å/sec)で成長すること。
(3) To increase the rate of insulating film formation, increase the molar ratio of the reactant gas used in the vapor phase growth method and increase the temperature as high as possible (50 to 100%).
Å/sec).

という点にある。That's the point.

従来一般の熱反応気相成長は、カーボン板、石
英板上に載せられた半導体基板結晶を石英管を通
して抵抗加熱炉、又は高周波誘導加熱、赤外線加
熱炉等により数分〜数10分加熱して所望温度に達
せしめた後、反応ガスを上記石英管中へ導入する
ことにより気相成長を行なつているため、加熱炉
自身の熱容量及び基板結晶を支持するサセブター
等の熱容量が大きく、所望温度までの到達時間並
びに気相成長終了後の降温時間が長くなり、はな
はだ化合物半導体結晶の特性を損ねている。
In conventional thermal reaction vapor phase growth, a semiconductor substrate crystal placed on a carbon plate or quartz plate is passed through a quartz tube and heated for several minutes to several tens of minutes in a resistance heating furnace, high-frequency induction heating, infrared heating furnace, etc. After reaching the desired temperature, vapor phase growth is performed by introducing the reaction gas into the quartz tube, so the heat capacity of the heating furnace itself and the heat capacity of the susceptor etc. that supports the substrate crystal are large, and the desired temperature is The time it takes to reach this point and the time it takes to cool down after the completion of vapor phase growth become longer, which impairs the properties of the compound semiconductor crystal.

本発明ではかかる欠点を化合物半導体基板結晶
裏面に 1 アルゴン、ネオン等の不活性ガスを1014
1016atoms/cm2程度、かつ加速エネルギー50kev
以上にて注入を行なうことにより単結晶を非晶
質化する。
In the present invention, this drawback can be solved by applying an inert gas such as argon or neon to the back surface of the compound semiconductor substrate crystal.
10 16 atoms/cm 2 and acceleration energy 50 kev
By performing the implantation as described above, the single crystal is made amorphous.

2 アルミナ、石英粉等によるバフ研摩を行ない
加工歪層を形成する。
2 Perform buffing with alumina, quartz powder, etc. to form a strained layer.

等により非晶質層もしくは多結晶層を形成する
ことにより、後で説明するような赤外線照射に際
して熱吸収効率を向上せしむること及び、基板結
晶支持台として赤外線(波長1〓m〜4〓m程度)に対
して熱吸収の少ない例えば赤外線透過率の高い透
明石英製にてかつ熱容量の小さいものとする。ま
た加熱炉としては炉自身の熱容量を小さくして基
板結晶の昇温、降温を短時間内に行なうため高出
力タングステンランプより発生させた赤外線を
Au、Pt等のメツキを施した赤外線反射鏡にて該
半導体基板表面に均一照射されるよう集光させる
ものとする。
By forming an amorphous layer or a polycrystalline layer by forming an amorphous layer or a polycrystalline layer, it is possible to improve the heat absorption efficiency during infrared irradiation as will be explained later . It is made of transparent quartz, for example, which has a high infrared transmittance and has a low heat absorption, and has a small heat capacity. In addition, as a heating furnace, in order to reduce the heat capacity of the furnace itself and raise and lower the temperature of the substrate crystal within a short time, infrared rays generated by a high-power tungsten lamp are used.
The light is focused using an infrared reflecting mirror plated with Au, Pt, etc. so that the surface of the semiconductor substrate is uniformly irradiated with the light.

第1図に本発明一実施例の装置断面をまた第2
図に基板結晶断面図を示す。また第3図に赤外線
ランプのエネルギー分光分布図例を示す。高出力
タングステンランプ等の赤外線ランプ2はAu又
はPtを表面にメツキした反射鏡5を取り付けら
れ、その内部空間に透明石英支持台3に支持され
透明石英管4に封入された基板結晶2を設置して
いる。
FIG. 1 shows a cross section of the device according to one embodiment of the present invention, and FIG.
The figure shows a cross-sectional view of the substrate crystal. Further, FIG. 3 shows an example of an energy spectral distribution diagram of an infrared lamp. An infrared lamp 2 such as a high-output tungsten lamp is equipped with a reflector 5 whose surface is plated with Au or Pt, and a substrate crystal 2 supported by a transparent quartz support 3 and sealed in a transparent quartz tube 4 is installed in its internal space. are doing.

赤外線加熱では赤外線の光エネルギーを基板加
熱の熱エネルギーに変換して用いるため、効率よ
く熱エネルギーに変換するには上記赤外線エネル
ギー分布図に示されている波長内特に0.5〜2〓m
度の光に対する基板側の光吸収の大きいものが良
好となる。
Infrared heating uses infrared light energy to convert it into thermal energy for substrate heating, so in order to efficiently convert it into thermal energy, it is necessary to use light within the wavelength range shown in the above infrared energy distribution map, especially around 0.5 to 2〓 m . The higher the light absorption on the substrate side, the better.

そこで従来はこのような赤外線加熱方法を用い
る場合はカーボン板等の吸収係数の大きい材料で
できたサセプター上に試料基板を載せて、主にカ
ーボン板に赤外線を吸収させて加熱し、かかる熱
を熱伝達させることにより試料基板を加熱させて
いた。かかる方法ではサセプター自身の熱容量に
もとずく昇温ならびに降温速度の遅れをきたし、
化合物半導体特に砒化ガリウム、インジウムリン
等の基板結晶の分解速度の大きいものでは絶縁膜
形成温度に達する前に基板結晶が分解してしまう
という欠点がある。
Conventionally, when using this type of infrared heating method, the sample substrate is placed on a susceptor made of a material with a high absorption coefficient, such as a carbon plate, and the carbon plate is heated mainly by absorbing infrared rays, thereby dissipating the heat. The sample substrate was heated by heat transfer. Such a method causes a delay in the rate of temperature rise and temperature drop based on the heat capacity of the susceptor itself,
Compound semiconductors, particularly those such as gallium arsenide and indium phosphide, whose substrate crystals decompose at a high rate, have the disadvantage that the substrate crystals decompose before reaching the insulating film forming temperature.

そこで本発明は、かかる欠点を除去して良質な
高温での気相成長絶縁膜を形成するに当り高出力
タングステンランプ等の赤外線ランプ1のエネル
ギーの量的に多い1〜2〓m程度の波長に於ける光
吸収係数を高め、しかも前記昇温、降温特性を改
善して化合物半導体の分解を極力抑える為に絶縁
膜形成基板2そのものに前述した方法等により非
晶質層2′を設ける。この非晶質層2′は化合物半
導体の種類によつても多少吸収係数は変ると考え
られるが1〜2〓m程度の波長に対する吸収係数は
その化合物半導体の単結晶状態と比較して概して
大きく赤外光→熱変換効率が大きくなる。
Therefore, the present invention aims at eliminating such drawbacks and forming a high-quality vapor phase grown insulating film at a high temperature by using a wavelength of about 1 to 2〓 m , which has a large amount of energy in an infrared lamp 1 such as a high-output tungsten lamp. An amorphous layer 2' is provided on the insulating film forming substrate 2 itself by the method described above, etc., in order to increase the light absorption coefficient in the insulating film formation substrate 2 itself, and to improve the temperature rise and temperature fall characteristics to suppress decomposition of the compound semiconductor as much as possible. The absorption coefficient of this amorphous layer 2' is thought to vary somewhat depending on the type of compound semiconductor, but the absorption coefficient for wavelengths of about 1 to 2 m is generally larger than that of the single crystal state of the compound semiconductor. Infrared light → heat conversion efficiency increases.

この特徴を利用することにより従来用いられて
いたカーボン板等の光吸収板を用いずに主に絶縁
膜形成基板のみを効率よく加熱することが出来る
ため、加熱される物体の熱容量が化合物半導体基
板2のそれとほぼ等しくなり、従来問題となつて
いた昇温、降温特性を著しく改良することが出来
る。
By utilizing this feature, it is possible to efficiently heat only the insulating film forming substrate without using the conventionally used light absorption plate such as a carbon plate. It is almost equal to that of No. 2, and it is possible to significantly improve the temperature rise and temperature fall characteristics, which had been a problem in the past.

また、本発明では、上記方法により化合物半導
体基板2の加熱を行なうか所望温度に達せしめた
後気相成長絶縁膜を形成させるに際し反応ガス中
の絶縁膜成分ガスモル比を上げることにより成長
速度を50〜100Å/secと従来一般に用いられてい
る成長速度50〜100Å/minより著しく上げるこ
とにより所望膜厚形成時間を従来の約1/60程度に
短縮させることにより高温状態に於ける化合物半
導体基板2の熱変成、不純物元素の拡散、等に起
こる時間を極力短時間に抑えることに特徴があ
る。また本発明は上記化合物半導体への絶縁膜形
成方法への適用のみならずあらゆる化合物半導体
特に高温にて分解され易い性質のある材料の加熱
方法として適用出来るものである。
Further, in the present invention, when forming a vapor phase growth insulating film after heating the compound semiconductor substrate 2 by the above method or reaching a desired temperature, the growth rate is increased by increasing the gas molar ratio of the insulating film components in the reaction gas. By increasing the growth rate of 50 to 100 Å/sec, which is significantly higher than the conventionally used growth rate of 50 to 100 Å/min, the time required to form a desired film thickness can be shortened to about 1/60 of the conventional rate, thereby improving the ability of compound semiconductor substrates in high-temperature conditions. A feature of this method is that the time required for thermal metamorphosis, diffusion of impurity elements, etc. (2) is kept as short as possible. Furthermore, the present invention can be applied not only to the method of forming an insulating film on a compound semiconductor as described above, but also as a method of heating any compound semiconductor, especially a material that is easily decomposed at high temperatures.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本製造方法を用いる装置の一実施例を
示す断面図、第2図は半導体基板結晶の断面図、
第3図は赤外線ランプのエネルギー分光分布図で
ある。 1……赤外線ランプ、2……基板結晶、2′…
…非晶質又は多結晶半導体層、3……透明石英支
持台、4……透明石英管、5……反射鏡。
FIG. 1 is a sectional view showing an example of a device using this manufacturing method, FIG. 2 is a sectional view of a semiconductor substrate crystal,
FIG. 3 is an energy spectral distribution diagram of an infrared lamp. 1...Infrared lamp, 2...Substrate crystal, 2'...
...Amorphous or polycrystalline semiconductor layer, 3...Transparent quartz support, 4...Transparent quartz tube, 5...Reflector.

Claims (1)

【特許請求の範囲】[Claims] 1 化合物半導体基板へ気相成長法にてシリコン
酸化膜、シリコン窒化膜等の絶縁膜を形成するに
際し、基板結晶裏面に非晶質層若しくは多結晶層
を形成した半導体基板に赤外線を収束照射させる
ことにより、該基板結晶のみを所望温度に達せし
めた後に該半導体基板へ気相成長法により絶縁膜
を形成しむることを特徴とする化合物半導体への
絶縁膜形成方法。
1. When forming an insulating film such as a silicon oxide film or a silicon nitride film on a compound semiconductor substrate by vapor phase growth, the semiconductor substrate with an amorphous layer or polycrystalline layer formed on the back surface of the substrate crystal is irradiated with focused infrared rays. A method for forming an insulating film on a compound semiconductor, comprising: forming an insulating film on the semiconductor substrate by a vapor phase growth method after only the substrate crystal has reached a desired temperature.
JP9314781A 1981-06-17 1981-06-17 Forming method for insulating film to compound semiconductor Granted JPS57208146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9314781A JPS57208146A (en) 1981-06-17 1981-06-17 Forming method for insulating film to compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9314781A JPS57208146A (en) 1981-06-17 1981-06-17 Forming method for insulating film to compound semiconductor

Publications (2)

Publication Number Publication Date
JPS57208146A JPS57208146A (en) 1982-12-21
JPS6313340B2 true JPS6313340B2 (en) 1988-03-25

Family

ID=14074415

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9314781A Granted JPS57208146A (en) 1981-06-17 1981-06-17 Forming method for insulating film to compound semiconductor

Country Status (1)

Country Link
JP (1) JPS57208146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0528104Y2 (en) * 1987-05-20 1993-07-19

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4560420A (en) * 1984-06-13 1985-12-24 At&T Technologies, Inc. Method for reducing temperature variations across a semiconductor wafer during heating
US6594446B2 (en) 2000-12-04 2003-07-15 Vortek Industries Ltd. Heat-treating methods and systems
US9627244B2 (en) 2002-12-20 2017-04-18 Mattson Technology, Inc. Methods and systems for supporting a workpiece and for heat-treating the workpiece
JP5718809B2 (en) 2008-05-16 2015-05-13 マトソン テクノロジー、インコーポレイテッド Method and apparatus for preventing destruction of workpieces

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0528104Y2 (en) * 1987-05-20 1993-07-19

Also Published As

Publication number Publication date
JPS57208146A (en) 1982-12-21

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