JPS63133071A - Current-frequency converter - Google Patents

Abstract

PURPOSE:To compensate offset voltage and to reduce an error even when an input current value is minute, by detecting the offset voltage of the operational amplifier in an integration means to apply the same to the non-reversal input terminal of the operational amplifier. CONSTITUTION:The current from an input terminal 1 is integrated by an integrator consisting of a capacitor 2 and an operational amplifier 3 and FF 7 is set by the output of a comparator 6. A pulse of a definite time width is generated from an one-shot circuit 8 by the output of FF 7 to reset FF 7 and a switch 4 is closed and the integration capacitor 2 is discharged by a constant current source 5. The voltage between a ground terminal and the reversal terminal of the operational amplifier 3 is applied to a resistor 30 and the current flowing by the voltage is integrated by an operational amplifier 10 and a capacitor 20 to be applied to the non-reversal input terminal of the operational amplifier 3. By this method, the voltage of the input terminal 1 is always held to a ground potential and offset voltage is compensated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a current-frequency converter (17F converter).

[Prior Art] Conventionally, as this type of I/F converter, a circuit having a configuration as shown in FIG. 2 is known. In Figure 2, 1
is an input terminal, 2 is an integrating capacitor, 3 is an operational amplifier, 4
is a switch, 5 is a constant current source, 6 is a comparator, 7 is a flip-flop, 8 is a one-shot circuit, and 9 is an output terminal! Here, the capacitor 2 is connected between the input and output terminals of the operational amplifier 3 to form an integrator, and the current input from the input terminal 1 is integrated. The integral output is sent to comparator 6.
The voltage is compared with a predetermined constant voltage, and the flip-flop 7 is set based on the comparison output.

The Q output of the flip-flop 7 is taken out from the output terminal 9 and is also supplied to the trigger input terminal T of the one-shot circuit 8. The one-shot circuit 8 generates a pulse with a fixed time width from the output terminal Q, and the pulse output causes the switch 4 to be activated.
is turned on and off, thereby controlling the discharge of the integrating capacitor 2 via the current source 5. The inverted pulse from the output terminal Q of the one-shot circuit 8 is supplied to the reset input terminal R of the flip-flop 7.

FIG. 3 shows operating waveforms of various parts to explain the operation of the circuit shown in FIG. 2. In FIG. 3, waveform (a) is the waveform of the input terminal input manually from input terminal 1, waveform (b) is the output voltage of operational amplifier 3, that is, a waveform of the integral output, and waveform (c) is the output voltage of comparator 6. The waveform (b) is the output voltage waveform of the flip-flop 7. T1 is the non-operating time of the flip-flop 7, and T2 is the operating time.

Next, the operation will be explained using FIGS. 2 and 3.
The current (a) manually input from the input terminal 1 is passed through an integrator made up of a capacitor 2 and an operational amplifier 3 for a period T1.
The output voltage (b) expressed by the following equation is obtained.

T1 110s --(1) ■. , value i of output voltage (b): Input terminal C: Capacitance of integrating capacitor 2 The output voltage (b) is compared with a constant voltage in a comparator 6 to obtain a comparison output voltage (c). Output voltage (C)
The blip prop 7 is set by , and an output voltage (d) is generated. This flip-flop output voltage (d
) is supplied to the output terminal 9 and the one-shot circuit 8,
This one-shot circuit 8 generates a pulse with a constant time width T2. The flip-flop 7 is reset by a pulse from the one-shot circuit 8, the switch 4 is closed, and the integrating capacitor 2 is discharged by the constant current source 5. Due to this discharge, the voltage of the integral output (b) comes to be expressed by the following equation.

I: Discharge current of constant current source 5 From equations (1) and (2), -1T1= (i-I)T2 T2 -', (72 in Tl) s+= (3)
Here, since the frequency f is f = −(4) TI”T2, it is expressed as from equations (3) and (4),
It can be seen that an output frequency f proportional to the input terminal I can be obtained.

[Problems to be Solved by the Invention] By the way, equation (5) represents the case where the components such as the operational amplifier constituting the circuit shown in the second diagram are used in an ideal state, and when the circuit is actually used. , an error occurs in equation (5) due to errors in the parts used. In particular, the offset voltage V of the operational amplifier 3. , is the following (6)
As shown in the equation, it has a large influence on the error.

For this reason, there is a drawback that the error becomes large, especially when the input terminal i is minute.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a current-frequency converter that eliminates the above-mentioned conventional drawbacks and has fewer errors even at minute input terminal values.

[Means for Solving the Problems] In order to achieve such an object, the present invention includes a first integrating means for integrating an input current, and a comparator for comparing the integrated current value with a reference value. a current-to-frequency converter comprising: a means for timing a predetermined time from the start of the integration of the integrator; and a means for discharging the integrated current in the integrator when the predetermined time has been elapsed; a resistor for detecting the offset voltage in the first integrating means; a second integrating means for integrating the voltage detected by the resistor;
and means for supplying the output from the integrating means to the first integrating means with a polarity that cancels out the offset voltage in the first integrating means.

[Function j] In this invention, the offset voltage of the first integrating means, for example, the offset voltage of its operational amplifier, is detected by the offset voltage detection resistor, and the second integrating means is caused to perform the integrating operation in accordance with the offset voltage of the first integrating means, for example, the offset voltage of its operational amplifier. Since the integral output of the second integrating means is applied to the first integrating means with a polarity that reduces the offset voltage, the error in current-frequency conversion can be reduced even in the case of a minute input current.

[Examples] Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which an input terminal 1
An offset voltage detection resistor 30 is connected between the inverting input terminal of the second operational amplifier lO and the inverting input terminal of the second operational amplifier lO. This operational amplifier 10
A capacitor 20 is connected between the input and output terminals of. The output terminal of operational amplifier IO is connected to the non-inverting input terminal of operational amplifier 3, and the non-inverting input terminal of operational amplifier 10 is grounded.

The rest of the configuration in FIG. 1 is the same as that in FIG. 3, so the explanation thereof will be omitted here.

Since the non-inverting input terminal of the operational amplifier IO is grounded, the voltage between the ground terminal and the inverting terminal of the operational amplifier 3 is applied to the resistor 30. The current flowing due to this voltage is integrated by the operational amplifier 10 and the capacitor 2o, and is applied to the non-inverting input terminal of the operational amplifier 3.

Due to these connections, the following voltage appears at the output terminal of the operational amplifier 10.

V: 1 voltage between the output voltage of the operational amplifier lO and the input terminal 1 and the ground R: The resistance value of the offset detection resistor 30 C: The capacitance of the capacitor 20 If the integration time t is constant in equation (7), V is V,
is proportional to , and the polar phase is reversed. Since this output power V is applied to the non-inverting input terminal of the operational amplifier 3, the voltage V is compensated, and the voltage at the input terminal 1 is always kept at ground potential, thereby compensating the offset voltage.

Note that although the flip-flop 7 and the one-shot circuit 8 measure a certain period of time T2, such time measurement can also be implemented using a conventional counter.

[Effects of the Invention] As is clear from the above, according to the present invention, the offset voltage of the operational amplifier in the first integrating means is controlled by the second integrating means including the offset voltage detection resistor, the second operational amplifier, and the capacitor. This is detected and added to the non-inverting input terminal of the operational amplifier in the first integrating means to compensate for the offset voltage, so errors caused by the offset voltage can be reduced, and therefore, even against minute input currents. Current-frequency conversion can be performed without increasing errors.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional example, and FIG. 3 is a signal waveform diagram showing signal waveforms at various parts in FIG. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Integrating capacitor, 3... Operational amplifier, 4... Switch, 5... Constant current source, 6... Comparator, 7... Flip-flop, 8... ...One-shot circuit, 9...Output terminal, 0...Second operational amplifier for offset voltage compensation,
20... Capacitor, 30... Resistor. Figure 2 of the circuit diagram of this example of roasting

Claims (1)

[Claims] a first integrating means for integrating an input current; a comparator for comparing the integrated current value with a reference value; a means for measuring a certain period of time from the start of integration by the integrating means; a resistor for detecting an offset voltage in the first integrating means and a voltage detected by the resistor; and means for discharging the integrated current in the integrating means when timed. and means for supplying the output from the second integrating means to the first integrating means with a polarity that cancels out the offset voltage in the first integrating means. A current-frequency converter characterized by: