JPS63128697A - Method of molding hybrid integrated circuit - Google Patents
Method of molding hybrid integrated circuitInfo
- Publication number
- JPS63128697A JPS63128697A JP61274643A JP27464386A JPS63128697A JP S63128697 A JPS63128697 A JP S63128697A JP 61274643 A JP61274643 A JP 61274643A JP 27464386 A JP27464386 A JP 27464386A JP S63128697 A JPS63128697 A JP S63128697A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- substrates
- metal substrates
- metal
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 6
- 238000000465 moulding Methods 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims description 33
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 23
- 239000011347 resin Substances 0.000 claims description 21
- 229920005989 resin Polymers 0.000 claims description 21
- 239000000843 powder Substances 0.000 claims description 7
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(イ)産業上の利用分野
本発明は混成集積回路のモールド方法に関し、特に二枚
の金属基板からなる混成集積回路のモールド方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method for molding a hybrid integrated circuit, and more particularly to a method for molding a hybrid integrated circuit comprising two metal substrates.
(ロ)従来の技術
従来の混成集積回路の接着方法は、第2図a及び第2図
すに示す如く、良熱伝導性の優れた二枚の金属基板(1
1)(12)例えばアルミニウム基板表面を陽極酸化し
て基板(11)(12)を離間させポリイミド等の絶縁
フィルム(13)を貼着し、その絶縁フィルム(13)
上に導電路(14)及び外部リード(15)を半田付け
するパッドを形成する。次に導電路(14)上に回路素
子(17)を固着し、パッド上に外部リード(15)を
半田付けした後、基板(11)(12)の離間部分の絶
縁フィルム(13)を折曲げ基板(11)(12)の金
属露出面を当接させた後に樹Jl(16)でモールドし
て接着固定を行なっていた。(b) Prior art The conventional method of bonding a hybrid integrated circuit is to bond two metal substrates (1
1) (12) For example, anodize the surface of the aluminum substrate, separate the substrates (11) and (12), and attach an insulating film (13) such as polyimide to the insulating film (13).
Pads are formed on top to which conductive paths (14) and external leads (15) are soldered. Next, after fixing the circuit element (17) on the conductive path (14) and soldering the external lead (15) on the pad, fold the insulating film (13) on the separated parts of the board (11) and (12). After the exposed metal surfaces of the bent substrates (11) and (12) were brought into contact, they were molded with wood Jl (16) and fixed with adhesive.
上述した同様の技術は特公昭60−11809号公報に
記載されている。A technique similar to that described above is described in Japanese Patent Publication No. 11809/1983.
従来この様な折曲げ基板の樹脂モールドは基板(11)
(12)の反対主面を当接固着した後、基板(11)(
12)を所定の温度に加熱し基板(11)(12)をパ
ウダ樹脂が充填された樹脂槽に垂直に浸し、加熱された
基板(11)(12)にパウダ樹脂が解けて付若しモー
ルドされるものである。Conventionally, such a resin mold for a bent board is a board (11).
After contacting and fixing the opposite main surface of (12), the substrate (11) (
12) is heated to a predetermined temperature and the substrates (11) and (12) are vertically immersed in a resin bath filled with powder resin, and the powder resin is melted and attached to the heated substrates (11 and 12). It is something that will be done.
(ハ)発明が解決しようとする問題点
しかしながら、従来のモールド方法で基板エッチまでコ
ーティングしようとすると外部リードの端部まで樹脂コ
ーティングきれ、PCB基板等の取付は基板へ取付けた
場合、外部リードに付着した樹脂が妨げとなり実装高さ
が高くなってしまう欠点があった。(c) Problems to be solved by the invention However, when trying to coat the edges of the board using the conventional molding method, the resin coating ends up reaching the ends of the external leads. There is a drawback that the attached resin becomes a hindrance and increases the mounting height.
(ニ)問題点を解決するための手段
本発明は上述した点に鑑みてなされたものであり、第1
図aに示す如く、離間して配置した二枚の金属基板(1
)(2)上に絶縁フィルム(3)を貼着し、次に第1図
すに示す如く、絶縁フィルム(3)上に所望形状の導電
路(4)を形成し、次に第1図Cに示す如く、導電路(
4)上に回路素子(5)及び一方の金属基板(2)端部
に外部リード(6)を固着し、次に第1図dに示す如く
、金属基板(1)(2)間の絶縁フィルム(3)を曲折
して金属基板(1)(2)の金属露出面を当接固定して
金属基板(1)(2)を所定温度に加熱し、第1図eに
示す如く、所定角を有した固定部材(7)に外部リード
(6)を挿入しパウダ樹脂(8)が充填された樹脂槽(
9)の垂直方向に対し所定角を有して樹脂槽(9)に浸
してモールドし解決する。(d) Means for solving the problems The present invention has been made in view of the above-mentioned points.
As shown in Figure a, two metal substrates (1
)(2), an insulating film (3) is pasted on the insulating film (3), and then a conductive path (4) of a desired shape is formed on the insulating film (3) as shown in FIG. As shown in C, the conductive path (
4) Fix the circuit element (5) on top and the external lead (6) to the end of one metal substrate (2), then as shown in Figure 1d, insulate between the metal substrates (1) and (2). The film (3) is bent and the exposed metal surfaces of the metal substrates (1) and (2) are fixed in contact with each other, and the metal substrates (1) and (2) are heated to a predetermined temperature, as shown in Figure 1e. The external lead (6) is inserted into the fixed member (7) having corners, and the resin tank (8) filled with powder resin (8) is inserted.
9) is immersed in a resin bath (9) at a predetermined angle with respect to the vertical direction and molded.
(本)作用
斯上の如く、所定の角度を有した固定部材に外部リード
を挿入し樹脂槽に所定の角度をつけて浸すことで外部リ
ードのフレーム部分に樹脂が付着しなくなるものであ。(Book) Operation As described above, by inserting the external lead into a fixing member having a predetermined angle and immersing it in the resin bath at a predetermined angle, resin will not adhere to the frame portion of the external lead.
(へ)実施例
以下に第1図a乃至第1図fに示した実施例に基づいて
本発明の詳細な説明する。(F) EXAMPLE The present invention will be described in detail below based on the example shown in FIGS. 1a to 1f.
先ず、第1図aに示す如く、金属基板(1)(2)の夫
々の厚みだけ金属基板(1)(2)を離間きせる。金属
基板(1)(2)は良熱伝導性の優れた厚さ0.5〜1
.0■厚のアルミニウム基板を用いてその表面に酸化ア
ルミニウム膜で被覆した後、金属基板(1バ2)を結合
する様に金属基板(1)(2)上にポリイミド樹脂等の
絶縁フィルム(3)を貼着°する。First, as shown in FIG. 1a, the metal substrates (1) and (2) are separated by the respective thicknesses of the metal substrates (1) and (2). The metal substrates (1) and (2) have a thickness of 0.5 to 1 with excellent thermal conductivity.
.. After using an aluminum substrate with a thickness of 0.0 cm and coating its surface with an aluminum oxide film, an insulating film (3 ) to paste.
次に第1図すに示す如く、絶縁フィルム(3)上に導電
路(4)となる銅箔を貼着して銅箔を所定のパターンに
エツチングして所望形状の導電路(4)を形成する。導
電路(4)は夫々の基板(1)(2)上に跨る様に形成
され、一方の基板(2)の端部に外部リード(6)を固
着するための複数のパッドが形成きれる。Next, as shown in Figure 1, a copper foil that will become a conductive path (4) is pasted on the insulating film (3), and the copper foil is etched into a predetermined pattern to form a conductive path (4) in a desired shape. Form. The conductive path (4) is formed so as to span over the respective substrates (1) and (2), and a plurality of pads for fixing external leads (6) are formed at the end of one substrate (2).
次に第1図Cに示す如く、導電路(4〉上にトランジス
タ、チップ抵抗、チップコンデンサ等の複数の回路素子
(5)を半日]で固着する。更にパッド上には外部回路
との接続を行なうための外部り一ド(6)が固着される
。Next, as shown in Figure 1C, multiple circuit elements (5) such as transistors, chip resistors, and chip capacitors are fixed on the conductive path (4) for half a day. An external guide (6) for performing this is fixed.
次に第1図dに示す如く、夫々の金属基板(1)(2)
の離間部分の絶縁フィルム(3)を折曲げて夫々の基板
(1)(2)の金属露出面を当接させて接着剤等を用い
て一体化固定した後、基板(1)(2)を所定温度例え
ば140〜150°Cに加熱する。Next, as shown in Fig. 1d, the respective metal substrates (1) (2)
After bending the insulating film (3) at the separated part of the substrates (1) and (2) and bringing the exposed metal surfaces of the respective substrates (1) and (2) into contact with each other and fixing them together using an adhesive or the like, the substrates (1) and (2) is heated to a predetermined temperature, for example, 140 to 150°C.
次に第1図eに示す如く、所定角を有した固定部材(7
)に外部リード(6)を挿入する。固定部材(7)は金
属で形成され、外部リード(6)が挿入される挿入面(
9)には所定の角度が設けられている。Next, as shown in Figure 1e, a fixing member (7
) insert the external lead (6). The fixing member (7) is made of metal and has an insertion surface (
9) is provided with a predetermined angle.
その角度は基板(1)(2)の高さによって定められる
。角度を有した固定部材り7)の挿入面(9)に外部リ
ード(6)を挿入する。その際外部リード(6)はクリ
ップ(10)で固定される。パウダ樹脂〈8)が充填さ
れた樹脂槽(9)に基板(1)(2)を降下させ、引上
げると第1図fの如く、基板(1)(2)と外部リード
(6)とのエッチ部分にパウダ樹脂(8)が付着されな
い。The angle is determined by the height of the substrates (1) and (2). The external lead (6) is inserted into the insertion surface (9) of the fixed member 7) having an angle. At this time, the external lead (6) is fixed with a clip (10). When the substrates (1) and (2) are lowered into the resin tank (9) filled with powder resin (8) and pulled up, the substrates (1) and (2) and the external leads (6) are separated as shown in Figure 1 f. The powder resin (8) is not attached to the etched portion.
(ト)発明の効果
上述した如く、本発明によれば、固定部材の外部リード
挿入面に所定の角度を設けることで樹脂槽に斜めに浸せ
ることにより、基板と外部リードとのエツチング部分に
樹脂が付着しなくなり、小型化の混成集積回路を提供す
ることができる。(G) Effects of the Invention As described above, according to the present invention, by providing a predetermined angle on the external lead insertion surface of the fixing member, the fixing member can be immersed in the resin bath obliquely, thereby preventing the etching between the board and the external lead. Since the resin does not adhere, it is possible to provide a compact hybrid integrated circuit.
第1図a乃至第1図fは本発明の実施例を示す断面図、
第2図a乃至第2図すは従来例を示す断面図である。
(1)(2)・・・金属基板、 (3)・・・絶縁フィ
ルム、(4)・・・導電路、 (5)・・・回路素子、
(6)・・・外部リード、 (7)・・・固定部材、
(8)・・・パウダ樹脂、(9)・・・樹脂槽、 (
10)・・・クリップ。
出願人 三洋電機株式会社外1名
代理人 弁理士 西野卓嗣 外1名
第1図8
第1図b
第1図d
第1図e
第1図f
第2図a
第2図bFigures 1a to 1f are cross-sectional views showing embodiments of the present invention;
FIGS. 2A to 2A are cross-sectional views showing a conventional example. (1) (2)...Metal substrate, (3)...Insulating film, (4)...Conducting path, (5)...Circuit element,
(6)...external lead, (7)...fixing member,
(8)...Powder resin, (9)...Resin tank, (
10)...Clip. Applicant Sanyo Electric Co., Ltd. and one other agent Patent attorney Takuji Nishino and one other person Fig. 1 8 Fig. 1 b Fig. 1 d Fig. 1 e Fig. 1 f Fig. 2 a Fig. 2 b
Claims (1)
ムを貼着し、該フィルム上に所望形状の導電路を形成し
、該導電路上に回路素子及び前記一方の金属基板端部に
外部リードを固着し、前記二枚の金属基板間の絶縁フィ
ルムを曲折し前記金属基板の金属露出面を当接固定して
前記二枚の金属基板を所定温度に加熱し、パウダ樹脂が
充填された樹脂槽の垂直方向に対して所定の角度を有し
て前記二枚の金属基板を前記樹脂槽内に浸し樹脂モール
ドすることを特徴とする混成集積回路のモールド方法。(1) An insulating film is pasted on two metal substrates placed apart, a conductive path of a desired shape is formed on the film, and a circuit element and an end of the one metal substrate are attached on the conductive path. The external leads are fixed, the insulating film between the two metal substrates is bent, the exposed metal surfaces of the metal substrates are brought into contact and fixed, and the two metal substrates are heated to a predetermined temperature, and the powder resin is filled. A method for molding a hybrid integrated circuit, characterized in that the two metal substrates are immersed in the resin tank at a predetermined angle with respect to the vertical direction of the resin tank and resin-molded.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61274643A JPS63128697A (en) | 1986-11-18 | 1986-11-18 | Method of molding hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61274643A JPS63128697A (en) | 1986-11-18 | 1986-11-18 | Method of molding hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63128697A true JPS63128697A (en) | 1988-06-01 |
Family
ID=17544563
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61274643A Pending JPS63128697A (en) | 1986-11-18 | 1986-11-18 | Method of molding hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63128697A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992058A (en) * | 1982-11-17 | 1984-05-28 | Matsushita Electric Ind Co Ltd | Coating method for integrated circuit parts |
-
1986
- 1986-11-18 JP JP61274643A patent/JPS63128697A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992058A (en) * | 1982-11-17 | 1984-05-28 | Matsushita Electric Ind Co Ltd | Coating method for integrated circuit parts |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0570316B2 (en) | ||
JPS5998591A (en) | Method of connecting both-side circuit | |
JPS63128697A (en) | Method of molding hybrid integrated circuit | |
JPH0442937Y2 (en) | ||
JPH043500Y2 (en) | ||
JPS5830187A (en) | Both-side printed board and method of connecting same | |
JPS6153852B2 (en) | ||
JPH0442938Y2 (en) | ||
JPH0445253Y2 (en) | ||
JPS6341054A (en) | Bonding method of hybrid integrated circuit | |
JPS5848496A (en) | Miniature electronic circuit part | |
JPS59172290A (en) | Method of connecting both-side printed circuit board | |
JPH0412680Y2 (en) | ||
JP2771575B2 (en) | Hybrid integrated circuit | |
JPS6334281Y2 (en) | ||
JPH0143872Y2 (en) | ||
JPS60242693A (en) | Printed circuit board and method of producing same | |
JPS60129897A (en) | Miniature electronic device | |
JPH0423321Y2 (en) | ||
JPS62140496A (en) | Bonding of hybrid integrated circuit | |
JPS62117335A (en) | Bonding method for hybrid integrated circuit | |
JPS61199694A (en) | Manufacture of hybrid integrated circuit | |
JPS6362397A (en) | Manufacture of hybrid integrated circuit | |
JPS60154590A (en) | Flexible electric circuit board | |
JPS5976497A (en) | Method of producing thick film circuit |