JPS63124756U - - Google Patents

Info

Publication number
JPS63124756U
JPS63124756U JP1626887U JP1626887U JPS63124756U JP S63124756 U JPS63124756 U JP S63124756U JP 1626887 U JP1626887 U JP 1626887U JP 1626887 U JP1626887 U JP 1626887U JP S63124756 U JPS63124756 U JP S63124756U
Authority
JP
Japan
Prior art keywords
flat package
pins
pin
reference number
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1626887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1626887U priority Critical patent/JPS63124756U/ja
Publication of JPS63124756U publication Critical patent/JPS63124756U/ja
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のフラツトパツケージICの実
施例を示す平面図。第2図、第3図は本考案のフ
ラツトパツケージICの他の実施例を示す平面図
。第4図は、従来のフラツトパツケージICを示
す平面図。 11…フラツトパツケージIC本体、12…ピ
ン、13…基準番号ピン、14…1番ピンを示す
マーク、21…フラツトパツケージIC本体、2
2…ピン、23…1番ピンを示すマーク、31…
フラツトパツケージIC本体、32…ピン、33
…基準番号ピン、34…1番ピンを示すマーク、
41…フラツトパツケージIC本体、42…ピン
、43…基準番号ピン、44…1番ピンを示すマ
ーク。
FIG. 1 is a plan view showing an embodiment of the flat package IC of the present invention. 2 and 3 are plan views showing other embodiments of the flat package IC of the present invention. FIG. 4 is a plan view showing a conventional flat package IC. 11... Flat package IC body, 12... Pin, 13... Reference number pin, 14... Mark indicating pin 1, 21... Flat package IC body, 2
2...pin, 23...mark indicating pin 1, 31...
Flat package IC body, 32...pin, 33
...Standard number pin, 34...Mark indicating pin 1,
41...Flat package IC body, 42...Pin, 43...Reference number pin, 44...Mark indicating No. 1 pin.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フラツトパツケージICの構造において、IC
からでるピンのうち基準番号となるピンの端子長
を他のピンとは異なる長さとしたことを特徴とす
るフラツトパツケージIC。
In the structure of a flat package IC, the IC
A flat package IC characterized in that the terminal length of the pin serving as a reference number among the pins coming out from the flat package IC is different from that of the other pins.
JP1626887U 1987-02-06 1987-02-06 Pending JPS63124756U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1626887U JPS63124756U (en) 1987-02-06 1987-02-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1626887U JPS63124756U (en) 1987-02-06 1987-02-06

Publications (1)

Publication Number Publication Date
JPS63124756U true JPS63124756U (en) 1988-08-15

Family

ID=30807970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1626887U Pending JPS63124756U (en) 1987-02-06 1987-02-06

Country Status (1)

Country Link
JP (1) JPS63124756U (en)

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