JPS6312262B2 - - Google Patents

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Publication number
JPS6312262B2
JPS6312262B2 JP1627780A JP1627780A JPS6312262B2 JP S6312262 B2 JPS6312262 B2 JP S6312262B2 JP 1627780 A JP1627780 A JP 1627780A JP 1627780 A JP1627780 A JP 1627780A JP S6312262 B2 JPS6312262 B2 JP S6312262B2
Authority
JP
Japan
Prior art keywords
voltage
capacitive element
circuit
measured
conductance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1627780A
Other languages
Japanese (ja)
Other versions
JPS56112662A (en
Inventor
Seijiro Nosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KUWANO ELECTRIC INSTR
Original Assignee
KUWANO ELECTRIC INSTR
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KUWANO ELECTRIC INSTR filed Critical KUWANO ELECTRIC INSTR
Priority to JP1627780A priority Critical patent/JPS56112662A/en
Publication of JPS56112662A publication Critical patent/JPS56112662A/en
Publication of JPS6312262B2 publication Critical patent/JPS6312262B2/ja
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2688Measuring quality factor or dielectric loss, e.g. loss angle, or power factor
    • G01R27/2694Measuring dielectric loss, e.g. loss angle, loss factor or power factor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Description

【発明の詳細な説明】 本発明は容量素子の損失測定装置に関する。[Detailed description of the invention] The present invention relates to a capacitive element loss measuring device.

容量素子の損失測定装置として従来、第1図に
つき以下述べる構成のものが提案されている。
Conventionally, an apparatus for measuring loss of a capacitive element has been proposed with the configuration described below with reference to FIG.

即ち、 e0=E0sinωt ……(1) で表わされる(但しE0は振幅、ωは角周波数、
tは時間)交流定電圧e0の得られる交流定電圧源
1を有し、それに、静電容量CPとコンダクタン
スgとの並列等価回路で表わされる被測定容量素
子2を通じて、電流−電圧変換回路3の入力側が
接続され、而してこの電流−電圧変換回路3の出
力側より、交流定電圧源1側より被測定容量素子
2を通じて供給される交流電流に基き、 e1=−E0RS(ωCPcosωt+gsinωt) ……(2) で表わされる、被測定容量素子2の静電容量CP
に比例した交流電圧及びコンダクタンスgに比例
した交流電圧の和(ベクトル和)の交流電圧e1
得られる様になされている。この場合電流−電圧
変換回路3は、被測定容量素子2を通じて交流定
電圧源1に接続されている入力端子aと、接地に
接続されている入力端子aとは逆極性の入力端子
bと、入力端子aとは逆極性の出力端子cとを有
する演算増幅器4と、その出力端子c及び入力端
子a間に接続せる抵抗RSとよりなる。
That is, e 0 = E 0 sinωt ...(1) (where E 0 is the amplitude, ω is the angular frequency,
t is time) It has an AC constant voltage source 1 that can obtain an AC constant voltage e0 , and current-voltage conversion is performed through a capacitive element 2 to be measured represented by a parallel equivalent circuit of a capacitance C P and a conductance g. Based on the AC current that is connected to the input side of the circuit 3 and is supplied from the output side of the current-voltage conversion circuit 3 from the AC constant voltage source 1 side through the capacitive element 2 to be measured, e 1 = -E 0 R S (ωC P cosωt + gsinωt) ...(2) The electrostatic capacitance of the capacitive element 2 to be measured, C P
The AC voltage e 1 is the sum (vector sum) of the AC voltage proportional to the conductance g and the AC voltage proportional to the conductance g. In this case, the current-voltage conversion circuit 3 has an input terminal a connected to the AC constant voltage source 1 through the capacitive element 2 to be measured, an input terminal b connected to the ground and having the opposite polarity to the input terminal a, It consists of an operational amplifier 4 having an output terminal c having a polarity opposite to that of an input terminal a, and a resistor R S connected between the output terminal c and the input terminal a.

又交流定電圧源1に、移相回路5の入力側が接
続され、而してこの移相回路5の出力側より、交
流定電圧e0に基き e3=−E0/R1ωC1sin(ωt−π/2)=E0/R1ωC1cos
ωt ……(3) で表わされる、交流定電圧e0に対して90°の位相
差を有する交流電圧e3が得られる様になされてい
る。この場合移相回路5は、入力端子aと、接地
に接続されている入力端子aとは逆極性の入力端
子bと、入力端子aとは逆極性の出力端子cとを
有する演算増幅器6と、一端が演算増幅器6の入
力端子aに、他端が交流定電圧源1に接続されて
なる抵抗R1と、演算増幅器6の出力端子c及び
入力端子a間に接続せる容量C1とよりなる。
Also, the input side of the phase shift circuit 5 is connected to the AC constant voltage source 1, and from the output side of the phase shift circuit 5, based on the AC constant voltage e 0 , e 3 = -E 0 /R 1 ωC 1 sin (ωt−π/2)=E 0 /R 1 ωC 1 cos
The arrangement is such that an AC voltage e 3 having a phase difference of 90° with respect to an AC constant voltage e 0 expressed as ωt ( 3 ) is obtained. In this case, the phase shift circuit 5 includes an operational amplifier 6 having an input terminal a, an input terminal b connected to ground and having a polarity opposite to that of the input terminal a, and an output terminal c having a polarity opposite to the input terminal a. , a resistor R 1 having one end connected to the input terminal a of the operational amplifier 6 and the other end connected to the AC constant voltage source 1, and a capacitor C 1 connected between the output terminal c and the input terminal a of the operational amplifier 6. Become.

而して電流−電圧変換回路3より得られる交流
電圧e1が必要に応じて極性反転を伴う増幅器7を
通じて乗算回路8の一方の入力端子に供給され、
一方乗算回路8の他方の入力端子に移相回路5よ
り得られる交流電圧e3が必要に応じて増幅器9を
通じて供給され、依つて乗算回路8より交流電圧
e1及びe3に基き E1=K1K3E0 2RSCP/2R1C1 ……(4) で表わされる、被測定容量素子2の静電容量CP
に比例した直流電圧E1が得られるようになされ
ている。この場合乗算回路8は e4=K1e1・K3e3 =K1E0RS(ωCPcosωt+gsinωt)・K3E0/R1ωC1cos
ωt =K1K3E0 2RSCP(1+cos2ωt)/2R1C1+K1K3E0 2RSgs
in2ωt/2R1ωC1 =K1K3E0 2RSCP/2R1C1+K1K3E0 2RS(ωCPcos2ωt+gs
in2ωt)/2R1ωC1……(5) で表わされる(但しK1及びK3は定数)、交流電圧
e1に基く電圧と交流電圧e3に基く電圧との積の出
力e4の得られる様に構成された乗算回路本体10
と、その出力側に接続された出力e4に基き(4)式で
表わされる直流電圧E1の得られる様に構成され
た低域波器11とよりなる。
The alternating current voltage e1 obtained from the current-voltage conversion circuit 3 is supplied to one input terminal of the multiplier circuit 8 through an amplifier 7 with polarity reversal as required.
On the other hand, the AC voltage e3 obtained from the phase shift circuit 5 is supplied to the other input terminal of the multiplier circuit 8 through an amplifier 9 as required, and the AC voltage e3 is supplied from the multiplier circuit 8 as required.
Based on e 1 and e 3 , E 1 = K 1 K 3 E 0 2 R S C P /2R 1 C 1 ...(4) The capacitance C P of the capacitive element 2 to be measured is expressed as
A DC voltage E 1 proportional to the voltage E 1 can be obtained. In this case, the multiplier circuit 8 is e 4 =K 1 e 1・K 3 e 3 =K 1 E 0 R S (ωC P cosωt+gsinωt)・K 3 E 0 /R 1 ωC 1 cos
ωt =K 1 K 3 E 0 2 R S C P (1 + cos2ωt) / 2R 1 C 1 +K 1 K 3 E 0 2 R S gs
in2ωt/2R 1 ωC 1 =K 1 K 3 E 0 2 R S C P /2R 1 C 1 +K 1 K 3 E 0 2 R S (ωC P cos2ωt+gs
in2ωt)/2R 1 ωC 1 ...(5) (however, K 1 and K 3 are constants), AC voltage
Multiplier circuit main body 10 configured to obtain output e 4 of the product of the voltage based on e 1 and the voltage based on AC voltage e 3
and a low frequency converter 11 configured to obtain a DC voltage E 1 expressed by equation (4) based on the output e 4 connected to its output side.

又電流−電圧変換回路3より得られる交流電圧
e1が必要に応じて上述せる極性反転を伴う増幅器
7を通じて他の乗算回路12の一方の入力端子に
供給され、一方乗算回路12の他方の入力端子に
交流定電圧源1よりの交流定電圧e0が必要に応じ
て増幅器13を通じて供給され、依つて乗算回路
12より交流電圧e0及びe1に基き、 E2=K0K1E0 2RSg/2 ……(6) で表わされる被測定容量素子2のコンダクタンス
gに比例した直流電圧E2が得られる様になされ
ている。この場合乗算回路12は e5=K0e0・K1e1 =K0E0sinωt・K1E0RS(ωCPcosωt+gsinωt) =K0K1E0 2RSωCPsin2ωt/2+K0K1E0 2RSg(1−cos
2ωt)/2 =K0K1E0 2RSg/2+K0K1E0 2RS(ωCPsin2ωt−gsin2
ωt)/2……(7) で表わされる(但しK0及びK1は定数)、交流電圧
e0に基く出力及び交流電圧e1に基く出力の積の出
力e5の得られる様に構成された乗算回路本体14
と、その出力側に接続された出力e5に基き(6)式で
表わされる直流電圧E2の得られる様に構成され
た低域波器15とよりなる。
Also, the AC voltage obtained from the current-voltage conversion circuit 3
e 1 is supplied to one input terminal of another multiplier circuit 12 through the amplifier 7 with polarity inversion described above as necessary, and an AC constant voltage from the AC constant voltage source 1 is supplied to the other input terminal of the multiplier circuit 12. e 0 is supplied through the amplifier 13 as necessary, and based on the AC voltages e 0 and e 1 from the multiplier circuit 12, E 2 = K 0 K 1 E 0 2 R S g/2 ...(6) A DC voltage E 2 proportional to the conductance g of the capacitive element 2 to be measured is obtained. In this case, the multiplier circuit 12 is e 5 =K 0 e 0・K 1 e 1 =K 0 E 0 sinωt・K 1 E 0 R S (ωC P cosωt+gsinωt) =K 0 K 1 E 0 2 R S ωC P sin2ωt/ 2+K 0 K 1 E 0 2 R S g(1-cos
2ωt)/2 =K 0 K 1 E 0 2 R S g/2+K 0 K 1 E 0 2 R S (ωC P sin2ωt−gsin2
ωt)/2...(7) (where K 0 and K 1 are constants), AC voltage
Multiplier circuit main body 14 configured to obtain output e 5 which is the product of the output based on e 0 and the output based on AC voltage e 1
and a low frequency converter 15 connected to its output side and configured to obtain a DC voltage E 2 expressed by equation (6) based on the output e 5 .

更に乗算回路8及び12より得られる直流電圧
E1及びE2が演算回路23の除算回路24に供給
され、これより直流電圧E1及びE2に基き、 E2/E1=K0K1E0 2RSg/2・2R1C1/K1K3E0 2RSCP =K0R1C1/K3・g/CP=g/ω0CP=tan〓=D……(8
) で表わされる被測定容量素子2の損失Dを表わす
出力Qが得られる様になされている。
Furthermore, the DC voltage obtained from multiplier circuits 8 and 12
E 1 and E 2 are supplied to the division circuit 24 of the arithmetic circuit 23, and from this, based on the DC voltages E 1 and E 2 , E 2 /E 1 =K 0 K 1 E 0 2 R S g/2・2R 1 C 1 /K 1 K 3 E 0 2 R S C P =K 0 R 1 C 1 /K 3・g/C P =g/ω 0 C P =tan〓=D……(8
) The output Q representing the loss D of the capacitive element 2 to be measured is obtained.

以上が従来提案されている容量素子の損失測定
装置であるが、斯る容量素子の損失測定装置の場
合、演算回路23の除算回路24より得られる出
力Qにより被測定容量素子2の並列等価回路でみ
たg/ω0CP=Dで表わされる損失Dを判知し得
るものであるが、出力Qが直流電圧E1及びE2
除算により得られる出力であり、而してその直流
電圧E1及びE2の得られる乗算回路8及び12に
対する夫々交流電圧e3及びe0と乗算される交流電
圧が、被測定容量素子2の静電容量CP及びコン
ダクタンスgの値に応じたレベルをとる交流電圧
e1である為、乗算回路8及び12より直流電圧E1
及びE2を被測定容量素子2の静電容量CP及びコ
ンダクタンスgの値に関せず高分解能で得るに困
難を伴い、依つて判知し得る損失Dを被測定容量
素子2の静電容量CP及びコンダクタンスgの値
に関せず高分解能で得ることが出来ないという欠
点を有していた。
The above is a conventionally proposed loss measuring device for a capacitive element. It is possible to determine the loss D expressed as g/ω 0 C P =D, but since the output Q is the output obtained by dividing the DC voltages E 1 and E 2 , the DC voltage The AC voltages multiplied by the AC voltages e 3 and e 0 for the multiplier circuits 8 and 12 obtained by E 1 and E 2 , respectively, are at a level corresponding to the values of the capacitance C P and conductance g of the capacitive element 2 to be measured. AC voltage that takes
Since e 1 , the DC voltage E 1 from multiplier circuits 8 and 12
and E 2 are difficult to obtain with high resolution regardless of the values of the capacitance C P and conductance g of the capacitive element 2 to be measured. It has the disadvantage that high resolution cannot be obtained regardless of the values of capacitance C P and conductance g.

依つて本発明は斯る欠点のない新規な容量素子
の損失測定装置を提案せんとするもので、以下詳
述する所より明らかとなるであろう。
Therefore, the present invention aims to propose a novel capacitive element loss measuring device free from such drawbacks, which will become clear from the detailed description below.

第2図には本発明による容量素子の損失測定装
置の一例を示し、第1図との対応部分には同一符
号を附して示すも、第1図にて前述せる(1)式で表
わされる交流定電圧e0の得られる交流定電圧源1
を有し、それに静電容量CPとコンダクタンスg
との並列等価回路で表わされる被測定容量素子2
を通じて、第1図にて前述せると同様に演算増幅
器4及び抵抗RSよりなる電流−電圧変換回路3
の入力側が接続され、而してこの電流−電圧変換
回路3の出力側より、第1図にて前述せると同様
に前述せる(2)式で表わされる、被測定容量素子2
の静電容量CPに比例した交流電圧及びコンダク
タンスgに比例した交流電圧の和の交流電圧e1
得られる様になされている。
FIG. 2 shows an example of a loss measuring device for a capacitive element according to the present invention. Corresponding parts to those in FIG. AC constant voltage source 1 that provides an AC constant voltage e 0
has a capacitance C P and a conductance g
capacitive element 2 to be measured represented by a parallel equivalent circuit with
Through the current-voltage conversion circuit 3 consisting of an operational amplifier 4 and a resistor R S as described above in FIG.
The input side of the current-voltage conversion circuit 3 is connected, and from the output side of the current-voltage conversion circuit 3, the capacitive element 2 to be measured is
An AC voltage e 1 is obtained which is the sum of an AC voltage proportional to the capacitance CP and an AC voltage proportional to the conductance g.

又交流定電圧源1に、第1図にて前述せると同
様に演算増幅器6、抵抗R1及び容量C1よりなる
移相回路5の入力側が接続され、而してこの移相
回路5の出力側より、第1図にて前述せると同様
に前述せる(3)式で表わされる交流定電圧e0に対し
て90゜の位相差を有する交流電圧e3が得られる様
になされている。
Also, the input side of a phase shift circuit 5 consisting of an operational amplifier 6, a resistor R 1 and a capacitor C 1 is connected to the AC constant voltage source 1 as described above in FIG. From the output side, an AC voltage e 3 having a phase difference of 90° with respect to the AC constant voltage e 0 expressed by equation (3) described above is obtained in the same way as shown in FIG. 1. .

而して電流−電圧変換回路3よりの交流電圧e1
が必要に応じて極性反転を伴う増幅器7を通じ
て、入力電圧のレベルの変化によるも略々一定レ
ベルを有する出力電圧の得られる様になされた増
幅回路31に供給され、依つてこの増幅回路31
より、交流電圧e1に基き、 e2=K2E0RS(ωCPcosωt+gsinωt)……(9) で表わされる(但しK2は係数)略々一定レベル
を有する交流電圧e2が得られる様になされてい
る。この場合交流電圧e2が略々一定レベルを有す
るということは、 で表わされる交流電圧e2の絶対値|e2|が略々一
定のレベルを有するということであるが、斯る交
流電圧e2が得られる様になされた増幅回路31
は、被測定容量素子2の静電容量CP及びコンダ
クタンスgが予定の範囲内で変化しても、即ち(9)
式のCP及びgが予定の範囲内で変化しても、こ
れに応じて係数K2(増幅度)が変化して、交流電
圧e2が略々一定レベルで得られる様になされた所
謂AGC機能を有する増幅回路の構成でなる。
Therefore, the AC voltage e 1 from the current-voltage conversion circuit 3
is supplied to an amplifier circuit 31, which is configured to obtain an output voltage having a substantially constant level even when the level of the input voltage changes, through an amplifier 7 with polarity reversal as necessary;
Therefore, based on the AC voltage e 1 , an AC voltage e 2 having an approximately constant level is obtained, which is expressed as e 2 = K 2 E 0 R S (ωC P cosωt + gsinωt) (9) (where K 2 is a coefficient). It is being done as it should be done. In this case, the AC voltage e 2 has an approximately constant level, which means that This means that the absolute value of the AC voltage e 2 expressed by |e 2 | has a substantially constant level.
(9) Even if the capacitance C P and conductance g of the capacitive element 2 to be measured change within the expected range, (9)
Even if C P and g in the equation change within the expected range, the coefficient K 2 (amplification degree) changes accordingly, so that the AC voltage e 2 can be obtained at a substantially constant level. It consists of an amplifier circuit with AGC function.

又上述せる述くに増幅回路31より得られる
略々一定レベルを有する交流電圧e2が、第1図に
て前述せると同様の乗算回路本体10及び低域
波器11よりなる乗算回路8の一方の入力側に供
給され、一方乗算回路8の他方の入力側に移相回
路5より得られる前述せる(3)式で表わされる交流
電圧e3が第1図にて前述せると同様に必要に応じ
て増幅器9を通じて供給され、依つて乗算回路8
より、交流電圧e2及びe3に基き、第1図にて前述
せる(4)式に準じた E1′=K2K3E0 2RSCP/2R1C1 ……(4)′ で表わされる、被測定容量素子2の静電容量CP
に比例した直流電圧E1′が得られる様になされて
いる。この場合乗算回路8の乗算回路本体10よ
りは第1図にて前述せる(5)式に準じた e4′=e2・K3e3 =K2E0RS(ωCPcosωt+gsinωt)・K3E0/R1ωC1cos
ωt =K2K3E0 2RSCP(1+cos2ωt)/2R1C1+K2K3E0 2RSgs
in2ωt/2R1ωC1 =K2K3E0 2RSCP/2R1C1+K2K3E0 2RS(ωCPcos2ωt+gs
in2ωt)/2R1ωC1……(5)′ で表わされる交流電圧e4′が得られる様になされ、
これに応じて低域波器11より上述せる(4)′式
で表わされる直流電圧E1′が得られる様になされ
ているものである。
Furthermore, the AC voltage e 2 having a substantially constant level obtained from the amplifier circuit 31 mentioned above is applied to one side of the multiplication circuit 8 consisting of the multiplication circuit main body 10 and the low frequency amplifier 11 similar to those mentioned above in FIG. The AC voltage e 3 expressed by the equation (3) mentioned above, which is supplied to the input side of one multiplier circuit 8 and obtained from the phase shift circuit 5 to the other input side of the multiplier circuit 8, is required as described above in FIG. is supplied through the amplifier 9 accordingly, and thus the multiplier circuit 8
Therefore, based on the AC voltages e 2 and e 3 , E 1 ′=K 2 K 3 E 0 2 R S C P /2R 1 C 1 ……(4 )', the capacitance C P of the capacitive element 2 to be measured, expressed as
It is designed so that a DC voltage E 1 ' proportional to can be obtained. In this case, from the multiplier circuit main body 10 of the multiplier circuit 8, e 4 ′=e 2・K 3 e 3 =K 2 E 0 R S (ωC P cosωt+gsinωt)・K 3 E 0 /R 1 ωC 1 cos
ωt =K 2 K 3 E 0 2 R S C P (1 + cos2ωt) / 2R 1 C 1 +K 2 K 3 E 0 2 R S gs
in2ωt/2R 1 ωC 1 =K 2 K 3 E 0 2 R S C P /2R 1 C 1 +K 2 K 3 E 0 2 R S (ωC P cos2ωt+gs
in2ωt)/2R 1 ωC 1 ……(5)′ The alternating current voltage e 4 ′ is obtained,
Correspondingly, the DC voltage E 1 ' expressed by the above-mentioned equation (4)' is obtained from the low frequency converter 11.

更に増幅回路31より得られる略々一定レベル
を有する交流電圧e2が、第1図にて上述せると同
様の乗算回路本体14及び低域波器15よりな
る乗算回路12の一方の入力側に供給され、一方
乗算回路12の他方の入力側に交流定電圧源1よ
り得られる前述せる(1)式で表わされる交流定電圧
e0が第1図にて前述せると同様に必要に応じて増
幅器13を通じて供給され、依つて乗算回路12
より、交流電圧e2及びe0に基さ第1図にて前述せ
る(6)式に準じた E2′=K0K2E0 2RSg/2R1C1 ……(6)′ で表わされる、被測定容量素子2のコンダクタン
スgに比例した直流電圧E2′が得られる様になさ
れている。この場合乗算回路12の乗算回路本体
14よりは第1図にて前述せる(7)式に準じた e5′=K0e0・e2 =K0E0sinωt・K2E0RS(ωCPcosωt+gsinωt) =K0K2E0 2RSωCPsin2ωt/2+K0K2E0 2RSg(1−cos
2ωt)/2 =K0K2E0 2RSg/2+K0K2E0 2RS(ωCPsin2ωt−gcos2
ωt)/2……(7)′ で表わされる交流電圧e5′が得られる様になされ、
これに応じて低域波器15より上述せる(6)′式
で表わされる直流電圧E2′が得られる様になされ
ているものである。
Furthermore, the AC voltage e 2 having a substantially constant level obtained from the amplifier circuit 31 is applied to one input side of the multiplier circuit 12 consisting of the multiplier circuit main body 14 and the low-frequency amplifier 15 similar to those described above in FIG. The AC constant voltage expressed by the above-mentioned equation (1) obtained from the AC constant voltage source 1 is supplied to the other input side of the multiplier circuit 12.
e 0 is supplied via the amplifier 13 as required, as described above in FIG.
Therefore, E 2 ′=K 0 K 2 E 0 2 R S g / 2R 1 C 1 ……(6) based on the AC voltages e 2 and e 0 and according to equation (6) shown above in FIG. A DC voltage E 2 ', which is proportional to the conductance g of the capacitive element 2 to be measured, is obtained. In this case, from the multiplier circuit body 14 of the multiplier circuit 12, e 5 '=K 0 e 0・e 2 =K 0 E 0 sinωt・K 2 E 0 R S according to equation (7) described above in FIG. (ωC P cosωt+gsinωt) =K 0 K 2 E 0 2 R S ωC P sin2ωt/2+K 0 K 2 E 0 2 R S g(1−cos
2ωt)/2 =K 0 K 2 E 0 2 R S g/2+K 0 K 2 E 0 2 R S (ωC P sin2ωt−gcos2
ωt)/2...(7)' The alternating current voltage e 5 ' is obtained.
Correspondingly, the DC voltage E 2 ' expressed by the above-mentioned equation (6)' is obtained from the low frequency converter 15.

又乗算回路8及び12より得られる直流電圧
E1′及びE2′が第1図の場合と同様に演算回路23
の除算回路24に供給され、これより直流電圧
E1′及びE2′に基き E2′/E1′=K0K2E0 2RSg/2・2R1C1/K2K3E0 2RSCP =K0R1C1/K3・g/CP=g/ω0CP=tan〓=D……(8
)′ で表わされる、第1図の場合の被測定容量素子2
の損失Dを表わす出力Qと同じ、被測定容量素子
2の損失Dを表わす出力Q′が得られる様になさ
れている。
Also, the DC voltage obtained from multiplier circuits 8 and 12
E 1 ′ and E 2 ′ are connected to the arithmetic circuit 23 as in the case of FIG.
is supplied to the division circuit 24, from which the DC voltage
Based on E 1 ′ and E 2 ′, E 2 ′ / E 1 ′ = K 0 K 2 E 0 2 R S g/2・2R 1 C 1 /K 2 K 3 E 0 2 R S C P = K 0 R 1 C 1 /K 3・g/C P =g/ω 0 CP =tan〓=D……(8
)', the capacitive element 2 to be measured in the case of Fig. 1
The output Q' representing the loss D of the capacitive element 2 to be measured is the same as the output Q representing the loss D of the capacitive element 2 to be measured.

以上が本発明による容量素子の損失測定装置の
一例構成であるが、斯る構成によればその演算回
路23の除算回路24から直流電圧E1′及びE2′の
除算により得られる出力Q′が、第1図の場合の
出力Qと同じであるので、その出力Q′により第
1図の場合と同様に被測定容量素子2の並列等価
回路でみたg/ω0CP=Dで表わされる損失Dを
判知し得ること明らかである。
The above is an example of the configuration of the capacitive element loss measuring device according to the present invention. According to this configuration, the output Q' obtained from the division circuit 24 of the arithmetic circuit 23 by dividing the DC voltages E 1 ' and E 2 ' is the same as the output Q in the case of Fig. 1, so the output Q' can be expressed as g/ω 0 C P = D as seen in the parallel equivalent circuit of the capacitive element 2 under test, as in the case of Fig. 1. It is clear that it is possible to determine the loss D that occurs.

然し乍ら第2図にて上述せる本発明による容量
素子の損失測定装置の場合、出力Q′が直流電圧
E1′及びE2′の除算により得られる出力であり、而
してその直流電圧E1′及びE2′の得られる乗算回路
8及び12に対する夫々交流電圧e3及びe0と乗算
される交流電圧が、被測定容量素子2の静電容量
CP及びコンダクタンスgの値に関せず略略一定
レベルをとる交流電圧e2である為、乗算回路8及
び12より夫々直流電圧E1′及びE2′を被測定容量
素子2の静電容量CP及びコンダクタンスgの値
に関せず高分解能で得る様になすことが、乗算回
路8及び12に対する夫々交流電圧e3及びe0と乗
算される交流電圧が、被測定容量素子2の静電容
量CP及びコンダクタンスgの値に応じて変化す
るレベルをとる交流電圧e1である第1図にて上述
せる従来の場合に比し、容易であり、依つて出力
Q′を被測定容量素子2の静電容量CP及びコンダ
クタンスgの値に関せず、第1図にて上述せる従
来の場合の出力Qに比し、高分解能で得る様にな
すこと容易であるものである。
However, in the case of the capacitive element loss measuring device according to the present invention as shown in FIG.
These are the outputs obtained by dividing E 1 ' and E 2 ', and are then multiplied by the AC voltages e 3 and e 0 to the resulting multiplier circuits 8 and 12, respectively . The AC voltage is the capacitance of the capacitive element 2 to be measured.
Since the AC voltage e 2 is at a substantially constant level regardless of the values of C P and conductance g, the DC voltages E 1 ' and E 2 ' are applied to the capacitance of the capacitive element 2 to be measured from the multiplier circuits 8 and 12, respectively. In order to obtain high resolution regardless of the values of C P and conductance g, the AC voltage multiplied by the AC voltages e 3 and e 0 for the multiplier circuits 8 and 12, respectively, is This is easier than the conventional case described above in FIG .
Regardless of the values of the capacitance C P and conductance g of the capacitive element 2 to be measured, it is easy to obtain Q' with a higher resolution than the output Q in the conventional case described above in Fig. 1. It is something that is.

依つて第2図にて上述せる本発明による容量素
子の損失測定装置の場合、出力Q′より判知し得
る被測定容量素子2の損失Dを、被測定容量素子
2の静電容量CP及びコンダクタンスgの値に関
せず、第1図にて上述せる従来の場合に比し高分
解能を有するものとすることが出来るという大な
る特徴を有するものである。
Therefore, in the case of the capacitive element loss measuring device according to the present invention described above in FIG . Regardless of the value of the conductance g, the present invention has the great feature that it can provide higher resolution than the conventional case described above with reference to FIG.

尚上述に於ては本発明の1つの例を示したに留
まり、例えば乗算回路8及び12の夫々と除去回
路24との間に必要に応じて増幅回路を介挿する
ことも出来、又乗算回路8及び12をその乗算回
路本体10及び14をして同期検波回路本体に代
えた同期検波回路に置換せる構成とすることも出
来、その他本発明の精神を脱することなしに種々
の変型変更をなし得るであろう。
The above description has only shown one example of the present invention, and for example, an amplifier circuit may be inserted between each of the multiplier circuits 8 and 12 and the removal circuit 24 as necessary, and It is also possible to replace the circuits 8 and 12 with a synchronous detection circuit in which the multiplier circuit bodies 10 and 14 are replaced with the synchronous detection circuit body, and various other modifications and changes may be made without departing from the spirit of the present invention. will be able to do it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の容量素子の損失測定装置を示す
系統図、第2図は本発明による容量素子の損失測
定装置の一例を示す系統図である。 図中1は交流定電圧源、2は被測定容量素子、
CPは静電容量、gはコンダクタンス、3は電流
−電圧変換回路、5は移相回路、8及び12は乗
算回路、10及び14は乗算回路本体、11及び
15は低域波器、31は増幅回路を夫々示す。
FIG. 1 is a system diagram showing a conventional capacitive element loss measuring device, and FIG. 2 is a system diagram showing an example of a capacitive element loss measuring device according to the present invention. In the figure, 1 is an AC constant voltage source, 2 is a capacitive element to be measured,
C P is capacitance, g is conductance, 3 is a current-voltage conversion circuit, 5 is a phase shift circuit, 8 and 12 are multiplication circuits, 10 and 14 are multiplication circuit bodies, 11 and 15 are low frequency amplifiers, 31 indicate amplifier circuits, respectively.

Claims (1)

【特許請求の範囲】 1 交流定電圧源と、 被測定容量素子を通じて上記交流定電圧源に接
続され、上記交流定電圧源側より上記被測定容量
素子を通じて供給される交流電流に基き、上記被
測定容量素子の静電容量に比例した交流電圧及び
コンダクタンスに比例した交流電圧の和の第1の
交流電圧を得る様になされた電流−電圧変換回路
と、 上記第1の交流電圧に基き、そのレベルが変化
しても略々一定レベルを有する第2の交流電圧を
得る様になされたAGC機能を有する増幅回路と、 上記交流定電圧源より得られる交流定電圧に対
して90゜の位相差を有する第3の交流電圧を得る
様になされた移相回路と、 上記第2及び第3の交流電圧に基き、上記被測
定容量素子の静電容量に比例した第1の直流電圧
を得る様になされた第1の乗算回路又は同期検波
回路と、 上記交流定電圧源より得られる交流電圧と上記
第2の交流電圧とに基き、上記被測定容量素子の
コンダクタンスに比例した第2の直流電圧を得る
様になされた第2の乗算回路又は同期検波回路
と、 上記第1及び第2の交流電圧に基き、その第2
の直流電圧を第1の直流電圧で除算してなる上記
被測定容量素子の損失を表す出力を得る様になさ
れた演算回路とを具備する事を特徴とする容量素
子の損失測定装置。
[Scope of Claims] 1. An AC constant voltage source connected to the AC constant voltage source through a capacitance element to be measured, and based on an AC current supplied from the AC constant voltage source side through the capacitance element to be measured. a current-voltage conversion circuit configured to obtain a first alternating voltage that is the sum of an alternating current voltage proportional to the capacitance of the measuring capacitive element and an alternating current voltage proportional to the conductance; An amplifier circuit with an AGC function configured to obtain a second AC voltage having a substantially constant level even when the level changes, and a phase difference of 90° with respect to the AC constant voltage obtained from the AC constant voltage source. a phase shift circuit configured to obtain a third alternating current voltage having the above-mentioned second and third alternating current voltages; a second DC voltage proportional to the conductance of the capacitive element to be measured, based on the AC voltage obtained from the AC constant voltage source and the second AC voltage; a second multiplier circuit or a synchronous detection circuit designed to obtain
A loss measuring device for a capacitive element, comprising: an arithmetic circuit configured to obtain an output representing loss of the capacitive element to be measured, which is obtained by dividing a DC voltage of 1 by a first DC voltage.
JP1627780A 1980-02-13 1980-02-13 Measuring apparatus for loss of capacity element Granted JPS56112662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1627780A JPS56112662A (en) 1980-02-13 1980-02-13 Measuring apparatus for loss of capacity element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1627780A JPS56112662A (en) 1980-02-13 1980-02-13 Measuring apparatus for loss of capacity element

Publications (2)

Publication Number Publication Date
JPS56112662A JPS56112662A (en) 1981-09-05
JPS6312262B2 true JPS6312262B2 (en) 1988-03-18

Family

ID=11912047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1627780A Granted JPS56112662A (en) 1980-02-13 1980-02-13 Measuring apparatus for loss of capacity element

Country Status (1)

Country Link
JP (1) JPS56112662A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111373U (en) * 1983-12-27 1985-07-27 東芝熱器具株式会社 small induction motor
JP2685748B2 (en) * 1986-07-11 1997-12-03 日本ヒューレット・パッカード株式会社 Circuit constant measuring instrument
IT1400649B1 (en) * 2010-06-29 2013-06-28 Techimp Technologies S A Ora Techimp Technologies S R L INSTRUMENT AND PROCEDURE FOR MEASURING THE TANDELTA OF AN INSULATOR
IT1400650B1 (en) * 2010-06-29 2013-06-28 Techimp Technologies S A Ora Techimp Technologies S R L INSTRUMENT AND PROCEDURE FOR MEASURING THE TANDELTA OF AN INSULATOR.
CA2905584C (en) * 2013-03-12 2016-06-14 Nissan Motor Co., Ltd. Impedance measuring device and control method for impedance measuring device

Also Published As

Publication number Publication date
JPS56112662A (en) 1981-09-05

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