JPS6245500B2 - - Google Patents

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Publication number
JPS6245500B2
JPS6245500B2 JP1627580A JP1627580A JPS6245500B2 JP S6245500 B2 JPS6245500 B2 JP S6245500B2 JP 1627580 A JP1627580 A JP 1627580A JP 1627580 A JP1627580 A JP 1627580A JP S6245500 B2 JPS6245500 B2 JP S6245500B2
Authority
JP
Japan
Prior art keywords
voltage
capacitive element
circuit
measured
capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1627580A
Other languages
Japanese (ja)
Other versions
JPS56112660A (en
Inventor
Seijiro Nosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KUWANO ELECTRIC INSTR
Original Assignee
KUWANO ELECTRIC INSTR
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KUWANO ELECTRIC INSTR filed Critical KUWANO ELECTRIC INSTR
Priority to JP1627580A priority Critical patent/JPS56112660A/en
Publication of JPS56112660A publication Critical patent/JPS56112660A/en
Publication of JPS6245500B2 publication Critical patent/JPS6245500B2/ja
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Description

【発明の詳細な説明】 本発明は容量素子の静電容量測定装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for measuring capacitance of a capacitive element.

容量素子の静電容量測定装置として従来、第1
図につき以下述べる構成のものが提案されてい
る。
Conventionally, the first capacitance measuring device for capacitive elements
The configuration described below with reference to the figure is proposed.

即ち e0=E0sinωt ………(1) で表わされる(但しE0は振幅、ωは角周波数、
tは時間)交流定電圧e0の得られる交流定電圧源
1を有し、それに、静電容量Cpとコンダクタン
スgとの並列等価回路で表わされる被測定容量素
子2を通じて、電流―電圧変換回路3の入力側が
接続され、而してこの電流―電圧変換回路3の出
力側より、交流定電圧源1側より被測定容量素子
2を通じて供給される交流電流に基き e1=−E0RS(ωCPcosωt+gsinωt)
………(2) で表わされる、被測定容量素子2の静電容量CP
に比例した交流電圧及びコンダクタンスgに比例
した交流電圧の和(ベクトル和)の交流電圧e1
得られる様になされている。この場合電流―電圧
変換回路3は、被測定容量素子2を通じて交流定
電圧源1に接続されている入力端子aと、接地に
接続されている入力端子aとは逆極性の入力端子
bと、入力端子aとは逆極性の出力端子cとを有
する演算増幅器4と、その出力端子c及び入力端
子a間に接続せる抵抗RSとよりなる。
That is, e 0 = E 0 sinωt (1) (where E 0 is the amplitude, ω is the angular frequency,
t is time) It has an AC constant voltage source 1 that can obtain an AC constant voltage e 0 , and current-voltage conversion is performed through a capacitive element 2 to be measured represented by a parallel equivalent circuit of a capacitance C p and a conductance g. The input side of the circuit 3 is connected, and from the output side of this current-voltage conversion circuit 3, based on the AC current supplied from the AC constant voltage source 1 side through the capacitive element 2 to be measured, e 1 = -E 0 R S (ωC P cosωt+gsinωt)
......(2) The electrostatic capacitance C P of the capacitive element 2 to be measured is expressed as
The AC voltage e 1 is the sum (vector sum) of the AC voltage proportional to the conductance g and the AC voltage proportional to the conductance g. In this case, the current-voltage conversion circuit 3 has an input terminal a connected to the AC constant voltage source 1 through the capacitive element 2 to be measured, an input terminal b connected to the ground and having the opposite polarity to the input terminal a, It consists of an operational amplifier 4 having an output terminal c having a polarity opposite to that of an input terminal a, and a resistor R S connected between the output terminal c and the input terminal a.

又交流定電圧源1に、移相回路5の入力側が接
続され、而してこの移相回路5の出力側より、交
流定電圧e0に基き e3=−E/RωCsin(ωt−π/2)=E
ωCcosωt… ……(3) で表わされる、交流定電圧e0に対して90゜の位相
差を有する交流電圧e3が得られる様になされてい
る。この場合移相回路5は、入力端子aと、接地
に接続されている入力端子aとは逆極性の入力端
子bと、入力端子aとは逆極性の出力端子cとを
有する演算増幅器6と、一端が演算増幅器6の入
力端子aに、他端が交流定電圧源1に接続されて
なる抵抗R1と、演算増幅器6の出力端子c及び
入力端子a間に接続せる容量C1よりなる。
Also, the input side of the phase shift circuit 5 is connected to the AC constant voltage source 1, and from the output side of the phase shift circuit 5, based on the AC constant voltage e0 , e 3 =-E 0 /R 1 ωC 1 sin (ωt−π/2)=E 0 /
R 1 ωC 1 cosωt (3) An AC voltage e 3 having a phase difference of 90° with respect to an AC constant voltage e 0 is obtained. In this case, the phase shift circuit 5 includes an operational amplifier 6 having an input terminal a, an input terminal b connected to ground and having a polarity opposite to that of the input terminal a, and an output terminal c having a polarity opposite to the input terminal a. , consisting of a resistor R 1 whose one end is connected to the input terminal a of the operational amplifier 6 and the other end connected to the AC constant voltage source 1, and a capacitor C 1 connected between the output terminal c and the input terminal a of the operational amplifier 6. .

而して電流―電圧変換回路3より得られる交流
電圧e1が必要に応じて極性反転を伴う増幅器7を
通じて乗算回路8の一方の入力端子に供給され、
一方乗算回路8の他方の入力端子に移相回路5よ
り得られる交流電圧e3が必要に応じて増幅器9を
通じて供給され、依つて乗算回路8より交流電圧
e1及びe3に基き E1=K /2P ………(4) で表わされる、被測定容量素子2の静電容量CP
に比例した直流電圧E1が得られる様になされて
いる。この場合乗算回路8は e4=K1e1・K3e3=K1E0RS(ωCPcosωt+gsinωt)・K3/RωCcosωt =K (1+cos2ωt)/2R+K gsin2ωt/2
ωC =K /2R+K (ωCcos2ωt+gsin2ωt)
/2RωC……(5) で表わされる(但しK1及びK3は定数)、交流電圧
e1に基く電圧と交流電圧e3に基く電圧との積の出
力e4の得られる様に構成された乗算回路本体10
と、その出力側に接続された出力e4に基き(4)式で
表わされる直流電圧E1の得られる様に構成され
た低域波器11とよりなる。
The AC voltage e 1 obtained from the current-voltage conversion circuit 3 is then supplied to one input terminal of the multiplier circuit 8 through an amplifier 7 with polarity inversion as required.
On the other hand, the AC voltage e3 obtained from the phase shift circuit 5 is supplied to the other input terminal of the multiplier circuit 8 through an amplifier 9 as required, and the AC voltage e3 is supplied from the multiplier circuit 8 as required.
Based on e 1 and e 3 , E 1 = K 1 K 3 E 0 2 R S C P /2P 1 C 1 ......(4) The capacitance C P of the capacitive element 2 to be measured is expressed as
It is designed to obtain a DC voltage E 1 proportional to . In this case, the multiplier circuit 8 is e 4 =K 1 e 1・K 3 e 3 =K 1 E 0 R S (ωC P cosωt+gsinωt)・K 3 E 0 /R 1 ωC 1 cosωt = K 1 K 3 E 0 2 R S C P (1+cos2ωt)/2R 1 C 1 +K 1 K 3 E 0 2 R S gsin2ωt/2
R 1 ωC 1 =K 1 K 3 E 0 2 R S C P /2R 1 C 1 +K 1 K 3 E 0 2 R S (ωC P cos2ωt+gsin2ωt)
/2R 1 ωC 1 ...(5) (however, K 1 and K 3 are constants), AC voltage
Multiplier circuit main body 10 configured to obtain output e 4 of the product of the voltage based on e 1 and the voltage based on AC voltage e 3
and a low frequency converter 11 configured to obtain a DC voltage E 1 expressed by equation (4) based on the output e 4 connected to the output side thereof.

以上が従来提案されている容量素子の静電容量
測定装置であるが、斯る容量素子の静電容量測定
装置の場合、乗算回路8より得られる直流電圧
E1により被測定容量素子2の並列等価回路でみ
た静電容量CPを判知し得るものであるが、乗算
回路8特にその乗算回路本体10を、1つの信号
のみを一義的に取扱う電流―電圧変換回路3、移
相回路5、増幅器7及び9等と同程度に高い精度
を有するものとするのは、それが2つの信号を取
扱う複雑な回路構成となる等の理由で困難を判う
ものである。
The above is a capacitance measuring device for a capacitive element that has been proposed conventionally.
Although the capacitance C P seen in the parallel equivalent circuit of the capacitive element 2 to be measured can be determined by E1 , the multiplier circuit 8, particularly the multiplier circuit main body 10, can be determined by the current that uniquely handles only one signal. - It is difficult to determine the accuracy of voltage conversion circuit 3, phase shift circuit 5, amplifiers 7 and 9, etc. because it requires a complex circuit configuration that handles two signals. Is Umono.

従つて第1図にて上述せる従来の装置の場合、
乗算回路8より得られる直流電圧E1により判知
し得る静電容量CPを高い精度を有するものとす
ることが出来ないという欠点を有していた。
Therefore, in the case of the conventional device described above in FIG.
This has the drawback that the capacitance C P that can be determined from the DC voltage E 1 obtained from the multiplier circuit 8 cannot be made highly accurate.

依つて本発明は斯る欠点のない新規な容量素子
の静電容量測定装置を提案せんとするもので、以
下詳述する所より明らかとなるであろう。
Therefore, the present invention aims to propose a novel capacitance measuring device for a capacitive element that does not have such drawbacks, and this will become clear from the detailed description below.

第2図は本願第1番目の発明による容量素子の
静電容量測定装置の一例を示し、第1図との対応
部分には同一符号を附して示すも、第1図にて前
述せる(1)式で表わされる交流定電圧e0の得られる
交流定電圧源1を有し、それに、静電容量CP
コンダクタンスgとの並列等価回路で表わされる
被測定容量素子2を通じて、第1図にて前述せる
と同様に演算増幅器4及び抵抗RSよりなる電流
―電圧変換回路3の入力側が接続され、而してこ
の電流―電圧変換回路3の出力側より、第1図に
て前述せると同様に前述せる(2)式で表わされる、
被測定容量素子2の静電容量CPに比例した交流
電圧及びコンダクタンスgに比例した交流電圧の
和の交流電圧e1が得られる様になされている。
FIG. 2 shows an example of an apparatus for measuring the capacitance of a capacitive element according to the first invention of the present application, and corresponding parts to those in FIG. It has an AC constant voltage source 1 that can obtain an AC constant voltage e 0 expressed by equation 1 ) , and a first The input side of the current-voltage conversion circuit 3 consisting of the operational amplifier 4 and the resistor R S is connected in the same way as described above in the figure, and the output side of the current-voltage conversion circuit 3 is connected as described above in FIG. 1. Similarly, it can be expressed by equation (2) mentioned above,
The AC voltage e 1 is the sum of an AC voltage proportional to the capacitance C P of the capacitive element 2 to be measured and an AC voltage proportional to the conductance g.

又交流定電圧源1に、第1図にて前述せると同
様に演算増幅器6、抵抗R1及び容量C1よりなる
移相回路5の入力側が接続され、而してこの移相
回路5の出力側より、第1図にて前述せると同様
に前述せる(3)式で表わされる交流定電圧e0に対し
て90゜の位相差を有する交流電圧e3が得られる様
になされている。
Also, the input side of a phase shift circuit 5 consisting of an operational amplifier 6, a resistor R 1 and a capacitor C 1 is connected to the AC constant voltage source 1 as described above in FIG. From the output side, an AC voltage e 3 having a phase difference of 90° with respect to the AC constant voltage e 0 expressed by equation (3) described above is obtained in the same way as shown in FIG. 1. .

而して電流―電圧変換回路3よりの交流電圧e1
が第1図にて前述せると同様に必要に応じて極性
反転を伴う増幅器7を通じて乗算回路本体10及
び低域波器11よりなる乗算回路8の一方の入
力側に供給され、一方乗算回路8の他方の入力側
に移相回路5より得られる交流電圧e3が第1図に
て前述せると同様に必要に応じて増幅器9を通じ
て供給され、依つて乗算回路8より、その乗算回
路本体10にて前述せる(5)式で表わされる出力e4
が得られる過程を経て、前述せる(4)式で表わされ
る直流電圧E1が得られる様になされている。
Therefore, the AC voltage e 1 from the current-voltage conversion circuit 3
is supplied to one input side of a multiplier circuit 8 consisting of a multiplier circuit main body 10 and a low-frequency amplifier 11 through an amplifier 7 with polarity inversion if necessary, as described above in FIG. The alternating current voltage e3 obtained from the phase shift circuit 5 is supplied to the other input side of the multiplier circuit 8 through the amplifier 9 as described above in FIG. The output e 4 expressed by equation (5) mentioned above in
Through the process of obtaining , the DC voltage E 1 expressed by the above-mentioned equation (4) is obtained.

又電流―電圧変換回路3より得られる交流電圧
e1が必要に応じて上述せる増幅器7を通じて他の
乗算回路12の一方の入力端子に供給され、一方
乗算回路12の他方の入力端子に交流定電圧源1
よりの交流定電圧e0が必要に応じて増幅器13を
通じて供給され、依つて乗算回路12より交流電
圧e0及びe1に基き、 E2=K g/2 ………(6) で表わされる被測定容量素子2のコンダクタンス
gに比例した直流電圧E2が得られる様になされ
ている。この場合乗算回路12は e5=K0e0・K1e1=K0E0sinωt・K1E0RS(ωCPcosωt+gsinωt) =K ωPsin2ωt/2+K g(1−cos2ωt)/2 =K g/2+K (ωCsin2ωt−gcos2ωt)/2………
(7) で表わされる(但しK0及びK1は定数)、交流電圧
e0に基く出力及び交流電圧e1に基く出力の積の出
力e5の得られる様に構成された乗算回路本体14
と、その出力側に接続された出力e5に基き(6)式で
表わされる直流電圧F2の得られる様に構成され
た低域波器15とよりなる。
Also, the AC voltage obtained from the current-voltage conversion circuit 3
e 1 is supplied to one input terminal of another multiplier circuit 12 through the above-mentioned amplifier 7 as necessary, and the other input terminal of the multiplier circuit 12 is supplied with an AC constant voltage source 1.
An alternating current constant voltage e 0 is supplied as necessary through the amplifier 13, and therefore, based on the alternating current voltages e 0 and e 1 from the multiplier circuit 12, E 2 =K 0 K 1 E 0 2 R S g/2 . . . . . . (6) A DC voltage E 2 proportional to the conductance g of the capacitive element 2 to be measured is obtained as shown in (6). In this case, the multiplier circuit 12 is e 5 =K 0 e 0・K 1 e 1 =K 0 E 0 sinωt・K 1 E 0 R S (ωC P cosωt+gsinωt) =K 0 K 1 E 0 2 R S ω C Psin2ωt/ 2+K 0 K 1 E 0 2 R S g (1-cos2ωt)/2 = K 0 K 1 E 0 2 R S g/2+K 0 K 1 E 0 2 R S (ωC P sin2ωt-gcos2ωt)/2...
(7) (where K 0 and K 1 are constants), AC voltage
Multiplier circuit main body 14 configured to obtain output e 5 which is the product of the output based on e 0 and the output based on AC voltage e 1
and a low frequency wave generator 15 connected to its output side and configured to obtain a DC voltage F 2 expressed by equation (6) based on the output e 5 .

更に電流―電圧変換回路3より得られる交流電
圧e1が必要に応じて極性反転を伴う増幅器7を通
じて交流―直流変換回路20に供給され、これよ
り交流電圧e1に基き、 E3∝K4|e1| =K4|−E0RS(ωCPcosωt+gsinωt)| =K4E0RS(ω2C g2)〓 =K4E0RS|Y| ………(8) で表わされる(但しK4は定数)被測定容量素子
2のアドミタンス|Y|に比例した直流電圧E3
が得られる様になされている。
Further, the AC voltage e 1 obtained from the current-voltage conversion circuit 3 is supplied to the AC-DC conversion circuit 20 through the amplifier 7 with polarity reversal as required, and from this, based on the AC voltage e 1 , E 3 ∝K 4 |e 1 | =K 4 |−E 0 R S (ωC P cosωt+gsinωt)| =K 4 E 0 R S2 C 2 P g 2 ) = K 4 E 0 R S |Y| ………( 8) (where K 4 is a constant) DC voltage E 3 proportional to admittance |Y| of capacitive element 2 to be measured
It is designed so that you can get

尚更に交流定電圧源1より得られる交流定電圧
e0が必要に応じて増幅器21を通じて他の交流―
直流変換回路22に供給され、これより交流定電
圧e0に基き、 E4∝K5|e| =K5|E0sinωt| =K5E0 ………(9) で表わされる(但しK5は定数)、交流定電圧e0
振幅E0に比例した直流電圧E4が得られる様にな
されている。
Furthermore, the AC constant voltage obtained from the AC constant voltage source 1
e 0 is connected to other alternating current through amplifier 21 as necessary.
It is supplied to the DC conversion circuit 22, and from this, based on the AC constant voltage e 0 , it is expressed as E 4 ∝K 5 |e| =K 5 |E 0 sinωt| =K 5 E 0 (9) (however, K 5 is a constant), so that a DC voltage E 4 proportional to the amplitude E 0 of the AC constant voltage e 0 can be obtained.

而して乗算回路8及び12より得られる直流電
圧E1及びE2が演算回路23の乗算回路24に供
給され、これより直流電圧E1及びF2に基き、 E/E=K g/2・2R
/K =K/K・g/C =s/ω =tanδ =D ………(10) で表わされる被測定容量素子2の損失Dを表わす
出力Q1が得られる様になされている。
The DC voltages E 1 and E 2 obtained from the multiplier circuits 8 and 12 are supplied to the multiplier circuit 24 of the arithmetic circuit 23, and based on the DC voltages E 1 and F 2 , E 2 /E 1 =K 0 K 1 E 0 2 R S g/2・2R 1 C 1
/K 1 K 3 E 0 2 R S CP = K 0 R 1 C 1 /K 3・g/ CP = s/ω 0 CP = tan δ = D ......(10) Capacitance to be measured The arrangement is such that an output Q1 representing the loss D of the element 2 is obtained.

又交流―直流変換回路20及び22より得られ
る直流電圧E3及びE4が演算回路23の他の除算
回路25に供給され、これより直流電圧E3及び
E4に基き、 E/E=K|Y|/K =K/K・RS|Y| =K7RS|Y| ………(11) で表わされる被測定容量素子2のアドミタンス|
Y|を表わす出力Q2が得られる様になされてい
る。
Further, the DC voltages E 3 and E 4 obtained from the AC-DC conversion circuits 20 and 22 are supplied to another division circuit 25 of the arithmetic circuit 23, from which the DC voltages E 3 and E 4 are
Based on E 4 , E 3 /E 4 =K 4 E 0 R S |Y| /K 5 E 0 =K 4 /K 5・R S |Y| =K 7 R S |Y| ………(11 ) The admittance of the capacitive element 2 to be measured is expressed as |
An output Q2 representing Y| is obtained.

更に除算回路24及び25より得られる出力Q
1及びQ2が演算器26に供給され、これより出
力Q1及びQ2に基き、既知の交流定電圧e0の角
周波数ωを用いて、 |Y|/ω(1+D)〓=C ………(12) で表わされる被測定容量素子2の静電容量CP
表わす出力Q3が得られる様になされている。尚
演算器26にて出力Q1及びQ2に基き(12)式の出
力Q3が得られることは、出力Q1を表わす(10)式
中のK0,K3,R1及びC1が既知であり、従つてω
が既知であること、出力Q2を表わす(11)式中の
K7及びRSが既知であることにより、理解されよ
う。
Furthermore, the output Q obtained from the division circuits 24 and 25
1 and Q2 are supplied to the calculator 26, and based on the outputs Q1 and Q2, using the known angular frequency ω of the constant AC voltage e 0 , |Y|/ω(1+D 2 )== CP ... ...(12) An output Q3 representing the electrostatic capacitance C P of the capacitive element 2 to be measured expressed as follows is obtained. Note that the fact that the output Q3 of equation (12) is obtained in the arithmetic unit 26 based on the outputs Q1 and Q2 is because K 0 , K 3 , R 1 and C 1 in equation (10) representing the output Q1 are known. , therefore ω
0 is known, and in equation (11) representing the output Q2,
It will be understood that K 7 and R S are known.

以上が本願第1番目の発明による容量素子の静
電容量測定装置の一例であるが、斯る容量素子の
静電容量測定装置の場合、演算回路23の演算器
26より得られる出力Q3にて被測定容量素子2
の並列等価回路でみた静電容量CPを判知し得る
ものであるが、出力Q3は除算回路25より得ら
れる被測定容量素子2のアドミタンス|Y|を表
わす出力Q2と除算回路25より得られる被測定
容量素子2の損失Dを表わす出力Q1とに基き上
述せる(12)式に基く演算がなされるものである。
The above is an example of the capacitance measuring device for a capacitive element according to the first invention of the present application. Capacitive element to be measured 2
The capacitance C P seen from the parallel equivalent circuit of can be determined, but the output Q3 is the result of the output Q2 representing the admittance |Y| of the capacitive element 2 to be measured obtained from the divider circuit 25 and the output Q2 obtained from the divider circuit 25. The calculation based on the above-mentioned equation (12) is performed based on the output Q1 representing the loss D of the capacitive element 2 to be measured.

従つて本願第1番目の発明の一例によれば、被
測定容量素子2の静電容量CPを、被測定容量素
子2のアドミタンス|Y|と被測定容量素子2の
損失Dとに基き、求める様に構成されているもの
である。
Therefore, according to an example of the first invention of the present application, the capacitance C P of the capacitive element 2 to be measured is determined based on the admittance |Y| of the capacitive element 2 to be measured and the loss D of the capacitive element 2 to be measured, It is configured as desired.

所で出力Q2は、電流―電圧変換回路3に交流
定電圧e0の得られる交流定電圧源1側より被測定
容量素子2を通じて交流電流が供給されることに
基きその電流―電圧変換回路3より得られる交流
電圧e1を単に交流―直流変換回路20にて直流電
圧に変換せるに相当せる直流電圧E3と、交流定
電圧源1より得られる交流定電圧e0を単に交流―
直流変換回路22にて直流電圧に変換せるに相当
せる直流電圧E4とによる単に除算回路25にて
除算されてなる、出力Q2が交流定電圧e0の振幅
E0に依存せざるものとして得てなる出力という
ものであり、従つて出力Q2は高い精度を有する
ものとして構成するに困難を伴う乗算回路を含む
回路より得られるものでないものである。依つて
出力Q2はこれを高精度で得ることが容易に出来
るものである。
Here, the output Q2 is generated by the current-voltage conversion circuit 3 based on the fact that the AC current is supplied to the current-voltage conversion circuit 3 from the AC constant voltage source 1 side from which the AC constant voltage e 0 is obtained through the capacitive element 2 to be measured. The AC voltage e 1 obtained from the above is simply converted into a DC voltage E 3 which corresponds to converting the AC voltage e 1 into a DC voltage in the AC-DC conversion circuit 20, and the AC constant voltage e 0 obtained from the AC constant voltage source 1 is simply converted into an AC voltage E 3 which corresponds to converting the AC voltage e 1 obtained from the
The output Q2 is simply divided by the dividing circuit 25 by the DC voltage E4 equivalent to that converted into a DC voltage by the DC conversion circuit 22, and the output Q2 is the amplitude of the AC constant voltage e0.
It is an output that can be obtained without depending on E 0 , and therefore the output Q2 cannot be obtained from a circuit that includes a multiplication circuit that is difficult to construct with high precision. Therefore, the output Q2 can be easily obtained with high precision.

従つて本願第1番目の発明の一例によれば、被
測定容量素子2の静電容量CPを被測定容量素子
2のアドミタンス|Y|と被測定容量素子2の損
失Dとに基き求める様に構成されていると上述せ
る、そのアドミタンス|Y|を高精度で得ること
が出来るものである。
Therefore, according to an example of the first invention of the present application, the capacitance C P of the capacitive element 2 to be measured is determined based on the admittance |Y| of the capacitive element 2 to be measured and the loss D of the capacitive element 2 to be measured. If configured as above, the admittance |Y| can be obtained with high precision.

又出力Q1は、電流―電圧変換回路3より得ら
れる交流電圧e1と移相回路5より得られる交流定
電圧源1より得られる交流定電圧e0に対して90゜
の位相差を有する交流電圧e3とによる乗算回路8
にて乗算されてなる交流電圧e4の直流分E1と、電
流―電圧変換回路3より得られる交流電圧e1と交
流定電圧源1より得られる交流定電圧e0とによる
乗算回路12にて乗算されてなる交流電圧e5の直
流分E2とによる除算回路24にて除算されてな
る直流出力というものであり、従つて出力Q1は
高い精度を有するものとして構成するに困難な乗
算回路を含む回路より得られるものである。依つ
て出力Q1はこれを高精度で得ることが容易に出
来るとは云い得ないものである。
The output Q1 is an AC voltage having a phase difference of 90° with respect to the AC voltage e 1 obtained from the current-voltage conversion circuit 3 and the AC constant voltage e 0 obtained from the AC constant voltage source 1 obtained from the phase shift circuit 5. Multiplying circuit 8 with voltage e 3
The multiplier circuit 12 is composed of the DC component E 1 of the AC voltage e 4 multiplied by the AC voltage e 1 obtained from the current-voltage conversion circuit 3 and the AC constant voltage e 0 obtained from the AC constant voltage source 1 The output Q1 is a DC output obtained by dividing the AC voltage e 5 multiplied by the DC component E 2 by the division circuit 24. Therefore, the output Q1 is a multiplication circuit that is difficult to configure with high precision. This can be obtained from a circuit containing Therefore, it cannot be said that it is easy to obtain the output Q1 with high precision.

従つて本願第1番目の発明の一例によれば、被
測定容量素子2の静電容量CPを被測定容量素子
2のアドミタンス|Y|と被測定容量素子2の損
失Dとに基き求める様に構成されていると上述せ
る、その損失Dを高精度で得ることが困難なもの
である。
Therefore, according to an example of the first invention of the present application, the capacitance C P of the capacitive element 2 to be measured is determined based on the admittance |Y| of the capacitive element 2 to be measured and the loss D of the capacitive element 2 to be measured. If the configuration is as follows, it is difficult to obtain the loss D described above with high precision.

然し乍な被測定容量素子2の損失Dは一般にD
≪1なる関係を有するので、その損失Dを高精度
で得ることが困難であつても、左程問題はなく、
このことは、被測定容量素子2の静電容量CP
被測定容量素子2のアドミタンス|Y|と被測定
容量素子2の損失Dとに基き求める様に構成され
ていると上述せる、その損失Dは、今述べた静電
容量CPを求めるにつき(12)式に示す如くD2として
用いられ、そしてこの場合Dが≪1なる関係を有
するので尚更である。依つて本願第1番目の発明
による容量素子の静電容量測定装置の一例によれ
ば、演算回路23から得られる出力Q3により判
知し得る静電容量CPを高い精度を有するものと
することが出来るという大なる特徴を有するもの
である。
However, the loss D of the capacitive element 2 to be measured is generally D
Since there is a relationship of ≪1, even if it is difficult to obtain the loss D with high precision, there is no problem as much as on the left,
This means that the capacitance C P of the capacitive element 2 to be measured is determined based on the admittance |Y| of the capacitive element 2 to be measured and the loss D of the capacitive element 2 to be measured. The loss D is used as D 2 as shown in equation (12) when calculating the capacitance C P just described, and this is especially true since in this case D has a relationship of <<1. According to an example of the device for measuring the capacitance of a capacitive element according to the first invention of the present application, the capacitance C P that can be determined from the output Q3 obtained from the arithmetic circuit 23 is made to have high accuracy. It has the great feature of being able to do

次に第3図を伴なつて本願2番目の発明による
容量素子の静電容量測定装置の一例を詳述する
に、第2図との対応部分には同一符号を附して詳
細説明はこれを省略するも、第2図にて上述せる
構成に於て、その増幅器7の出力側と乗算回路8
及び12の一方の入力側間に入力電圧のレベルの
変化によるも略々一定レベルを有する出力電圧の
得られる様になされた演算回路31が介挿され、
依つてこの増幅回路31より、交流電圧e1に基
き、 e2=K2E0RS(ωCPcosωt+gsinωt)
………(2)′ で表わされる略々一定レベルを有する交流電圧e2
が得られる様になされていること、これに応じて
乗算回路8より前述せる(5)式で表わされる出力e4
が乗算回路本体10で得られる過程を経て得られ
る前述せる(4)式で表わされる直流電圧E1に代
え、前述せる(5)式に準じた e4′=e2・K3e3=K2E0RS(ωCPcosωt+gsinωt)・K3/RωCcosωt) =K (1+cos2ωt)/2R+K gsin2ωt/2
ωC =K /2R+K 2R+K (ω
cos2ωt+gsin2ωt)/2RωC………(5)′ で表わされる出力e4が乗算回路本体10で得られ
る過程を経て、前述せる(4)式に準じた E1′=K /2R………(4
)′ で表わされる直流電圧E1′が得られること、又乗
算回路12より、前述せる(7)式で表わされる出力
e5が乗算回路本体14で得られる過程を経て得ら
れる前述せる(6)式で表わされる直流電圧E2に代
え、前述せる(7)式に準じた e5′=e2・K0e0=K2E0RS(ωCPcosωt+gsinωt)・K0E0sinωt =K ωCsin2ωt/2+K g(1−cos2ωt)/2 =K g/2+K (ωCsin2ωt−gcos2ωt)/2………
(7)′ で表わされる出力e5′が乗算回路本体14で得ら
れる過程を経て、前述せる(6)式に準じた E2′=K g/2 ………(6)′ で表わされる直流電圧E2′が得られることを除い
ては第2図の場合と同様の構成を有する。
Next, an example of an apparatus for measuring the capacitance of a capacitive element according to the second invention of the present application will be described in detail with reference to FIG. 3. Parts corresponding to those in FIG. Although omitted, in the configuration described above in FIG. 2, the output side of the amplifier 7 and the multiplier circuit 8
and 12, an arithmetic circuit 31 is inserted between one input side of the circuit 12, and is configured to obtain an output voltage having a substantially constant level even when the level of the input voltage changes;
Therefore, from this amplifier circuit 31, based on the AC voltage e 1 , e 2 =K 2 E 0 R S (ωC P cosωt + gsinωt)
......(2) An alternating current voltage e 2 with a nearly constant level expressed as ′
Accordingly, the output e 4 from the multiplier circuit 8 expressed by the equation (5) mentioned above is
In place of the DC voltage E 1 expressed by the above-mentioned equation (4) obtained through the process of obtaining in the multiplier circuit main body 10, e 4 ′=e 2・K 3 e 3 = according to the above-mentioned equation (5) K 2 E 0 R S (ωC P cosωt + gsinωt)・K 3 E 0 /R 1 ωC 1 cosωt) = K 2 K 3 E 0 2 P S C P (1 + cos2ωt) / 2R 1 C 1 +K 2 K 3 E 0 2 R S gsin2ωt/2
R 1 ωC 1 =K 2 K 3 E 0 2 R S C P /2R 1 C 1 +K 2 K 3 E 0 2 R S C P 2R 1 C 1 +K 2 K 3 E 0 2 R S
C P cos2ωt+gsin2ωt)/2R 1 ωC 1 ......(5)' Through the process in which the output e 4 expressed as 3 E 0 2 R S C P /2R 1 C 1 ………(4
)' can be obtained, and from the multiplier circuit 12 , the output expressed by equation (7) mentioned above can be obtained.
Instead of the DC voltage E 2 expressed by the above-mentioned equation (6) obtained through the process of obtaining e 5 in the multiplier circuit main body 14 , e 5 ′=e 2・K 0 e according to the above-mentioned equation (7) 0 = K 2 E 0 R S (ωC P cosωt + gsinωt)・K 0 E 0 sinωt = K 0 K 2 E 0 2 R S ωC P sin2ωt/2+K 0 K 2 E 0 2 R S g (1-cos2ωt)/2 =K 0 K 2 E 0 2 R S g/2+K 0 K 2 E 0 2 R S ( ωCP sin2ωt−gcos2ωt)/2……
After the process in which the output e 5 ' expressed by (7)' is obtained in the multiplier circuit main body 14, E 2 '=K 0 K 2 E 0 2 R S g/2 according to the above-mentioned equation (6)... It has the same configuration as the case in FIG. 2 except that a DC voltage E 2 ' expressed by (6)' is obtained.

尚増幅回路31より得られる交流電圧e2が一定
レベルを有するということは、 |e2|=K2E0RS(ω2CP 2+g2)〓………(13) で表わされる交流電圧e2の絶対値|e2|が略々一
定のレベルを有するということであるが、斯る交
流電圧e2が得られる様になされた増幅回路31
は、被測定容量素子2の静電容量CP及びコンダ
クタンスgが予定の範囲内で変化しても、即ち(9)
式のCP及びgが予定の範囲内で変化しても、こ
れに応じて係数K2(増幅度)が変化して、交流
電圧e2が略々一定レベルで得られる様になされた
所謂AGC機能を有する増幅回路の構成でなる。
又演算回路23の除算回路24より得られる出力
Q1は、それが乗算回路8及び12より得られる
直流電圧E1′及びE2′による除算回路24にて前述
せる(10)式に準じて除算されてなる出力であるの
で、第2図の場合の演算回路23の除算回路24
より得られる出力Q1と同じ出力Q1として得ら
れ、又この為演算回路23の演算器26より得ら
れる出力Q3は、第2図の場合の演算回路23の
演算器26より得られる出力Q3と同じ出力Q3
として得られるものである。
It should be noted that the fact that the AC voltage e 2 obtained from the amplifier circuit 31 has a constant level is expressed as |e 2 |=K 2 E 0 R S2 C P 2 +g 2 ) = (13) This means that the absolute value |e 2 | of the AC voltage e 2 has a substantially constant level, and the amplifier circuit 31 is designed to obtain such an AC voltage e 2 .
Even if the capacitance C P and conductance g of the capacitive element 2 to be measured change within the expected range, that is, (9)
Even if C P and g in the equation change within the expected range, the coefficient K 2 (amplification degree) changes accordingly, so that the AC voltage e 2 can be obtained at a substantially constant level. It consists of an amplifier circuit with AGC function.
Further, the output Q1 obtained from the division circuit 24 of the arithmetic circuit 23 is divided by the DC voltages E 1 ' and E 2 ' obtained from the multiplication circuits 8 and 12 in the division circuit 24 according to equation (10) described above. Therefore, the division circuit 24 of the arithmetic circuit 23 in the case of FIG.
Therefore, the output Q3 obtained from the arithmetic unit 26 of the arithmetic circuit 23 is the same as the output Q3 obtained from the arithmetic unit 26 of the arithmetic circuit 23 in the case of FIG. Output Q3
This is obtained as follows.

以上が本願第2番目の発明による容量素子の静
電容量測定装置の一例であるが、斯る容量素子の
静電容量測定装置の場合、それが上述せる事項を
除いては第2図にて上述せる本願第1番目の発明
による容量素子の静電容量測定装置の一例と同様
であつて、演算回路23の除算回路24より得ら
れる被測定容量素子2の損失Dを表わす出力Q
1、除算回路25より得られる被測定容量素子2
のアドミタンス|Y|を表わす出力Q2、及び演
算器26より得られる被測定容量素子2の静電容
量CPを表わす出力Q3が第2図の場合と同じ出
力であることにより、第2図の場合と同様に、演
算回路23から得られる出力Q3により判知し得
る被測定容量素子2の静電容量CPを高い精度を
有するものとすることが出来るという特徴を有す
るものである。但しこの場合除算回路24より得
られる出力Q1が被測定容量素子2の静電容量C
P及びコンダクタンスgの値に関せず高分解能で
得られるので、出力Q3より判知し得る被測定容
量素子2の静電容量CPをその値に関せず第2図
にて上述せる本願第1番目の発明による場合に比
し高分解能を有するものとすることが出来るもの
である。
The above is an example of the capacitance measuring device for a capacitive element according to the second invention of the present application. The output Q representing the loss D of the capacitive element 2 to be measured obtained from the division circuit 24 of the arithmetic circuit 23 is similar to the example of the capacitive element capacitance measuring device according to the first invention of the present application described above.
1. Capacitive element to be measured 2 obtained from the division circuit 25
Since the output Q2 representing the admittance |Y| of Similarly to the above case, the capacitance C P of the capacitive element 2 to be measured, which can be determined from the output Q3 obtained from the arithmetic circuit 23, can be determined with high precision. However, in this case, the output Q1 obtained from the dividing circuit 24 is the capacitance C of the capacitive element 2 to be measured.
In this application, the capacitance C P of the capacitive element 2 to be measured, which can be determined from the output Q3, can be obtained with high resolution regardless of the values of P and conductance g, and is described above in FIG. It is possible to have higher resolution than the case according to the first invention.

今その理由を述べるに、それは、出力Q1が乗
算回路8及び12より得られる(4)′及び(6)′式に
夫々示されている直流電圧E′1及びE′2による除算
回路24にて除算されてなる出力であり、而して
その直流電圧E1′及びE2′の得られる乗算回路8及
び12に対する夫々交流電圧e3及びe0と乗算され
る交流電圧が、被測定容量素子2の静電容量CP
及びコンダクタンスgの値に関せず略々一定レベ
ルをとる交流電圧e2である為、乗算回路8及び1
2より夫々直流電圧E1′及びE2′を被測定容量素子
2の静電容量CP及びコンダクタンスgの値に関
せず高分解能で得る様になすことが、乗算回路8
及び12に対する夫々交流電圧e3及びe0と乗算さ
れる交流電圧が、被測定容量素子2の静電容量C
P及びコンダクタンスgの値に応じて変化するレ
ベルをとる交流電圧e1である第2図にて上述せる
本願第1番目の発明の場合に比し、容易であり、
依つて出力Q1を被測定容量素子2の静電容量C
P及びコンダクタンスgの値に関せず第2図にて
上述せる本願第1番目の発明の場合に比し、高分
解能で得る様になすことが容易であるからであ
る。
To explain the reason now, it is because the output Q1 is obtained from the multiplier circuits 8 and 12 and is divided into the divider circuit 24 by the DC voltages E' 1 and E' 2 shown in equations (4)' and (6)', respectively. The output obtained by dividing the DC voltages E 1 ' and E 2 ' by the AC voltages e 3 and e 0 for the multiplier circuits 8 and 12, respectively, is the output of the capacitance to be measured. Capacitance C P of element 2
Since the alternating current voltage e 2 is at an approximately constant level regardless of the value of the conductance g, the multiplier circuits 8 and 1
2, the multiplier circuit 8 can obtain the DC voltages E 1 ′ and E 2 ′ with high resolution regardless of the values of the capacitance C P and conductance g of the capacitive element 2 to be measured.
The AC voltages multiplied by the AC voltages e 3 and e 0 for and 12, respectively, are the capacitance C of the capacitive element 2 to be measured.
This is easier than the case of the first invention of the present application described above in FIG .
Therefore, the output Q1 is the capacitance C of the capacitive element 2 to be measured.
This is because, regardless of the values of P and conductance g, it is easier to obtain higher resolution than in the case of the first invention of the present application described above with reference to FIG.

尚上述に於ては、演算回路23の演算器26よ
り(10)及び(11)式で表わされる出力Q1及びQ2に基
き、(12)式で表わされる出力Q3を得、これにて被
測定容量素子2を静電容量CPとコンダクタンス
gとの並列等価回路で表わすときその静電容量C
Pを判知し得る様にした場合を述べたものである
が、演算回路23の演算器26より(10)及び(11)式で
表わされる出力Q1及びQ2に基き、 |Y|(1+D)〓/ω=CP(1+D2)=CS……
(12)′ で表わされる出力を得、これにて被測定容量素子
2を静電容量CSと抵抗との直列等価回路で表わ
すときその静電容量CSを判知し得る様にするこ
とも出来るものである。
In the above description, based on the outputs Q1 and Q2 expressed by the expressions (10) and (11) from the arithmetic unit 26 of the arithmetic circuit 23, the output Q3 expressed by the expression (12) is obtained. When capacitive element 2 is expressed as a parallel equivalent circuit with capacitance C P and conductance g, its capacitance C
This describes the case where P can be determined. Based on the outputs Q1 and Q2 expressed by equations (10) and (11) from the arithmetic unit 26 of the arithmetic circuit 23, |Y|(1+D 2 )〓/ω=C P (1+D 2 )=C S ……
(12) Obtain the output represented by ', and use this to make it possible to determine the capacitance C S when the capacitive element 2 to be measured is represented by a series equivalent circuit of a capacitance C S and a resistor. It is also possible.

又乗算回路8及び12の夫々と除算回路24と
の間、交流―直流変換回路20及び22の夫夫と
除算回路25との間、除算回路24及び25の
夫々と演算器26との間に夫々必要に応じて増幅
回路を介挿することも出来、又乗算回路8及び1
2をその乗算回路本体10及び14をして同期検
波回路本体に代えた同期検波回路に置換せる構成
とすることも出来、その他本発明の精神を脱する
ことなしに種々の変型変更をなし得るであろう。
Also, between each of the multiplication circuits 8 and 12 and the division circuit 24, between the husbands of the AC-DC conversion circuits 20 and 22 and the division circuit 25, and between each of the division circuits 24 and 25 and the arithmetic unit 26. Amplifying circuits can be inserted in each case as necessary, and multiplier circuits 8 and 1 can also be inserted.
2 can be constructed such that the multiplier circuit bodies 10 and 14 are replaced with a synchronous detection circuit in place of the synchronous detection circuit body, and various other modifications and changes can be made without departing from the spirit of the present invention. Will.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の容量素子の静電容量測定装置を
示す系統図、第2図は本願第1番目の発明による
容量素子の静電容量測定装置の一例を示す系統
図、第3図は本願第2番目の発明による容量素子
の静電容量測定装置の一例を示す系統図である。 図中、1は交流定電圧源、2は被測定容量素
子、CPは静電容量、gはコンダクタンス、3は
電流―電圧変換回路、5は移相回路、8及び12
は乗算回路、10及び14は乗算回路本体、11
及び15は低域波器、20及び22は交流―直
流変換回路、23は演算回路、24及び25は除
算回路、26は演算器、31は増幅回路を夫々示
す。
FIG. 1 is a system diagram showing a conventional capacitance measuring device for a capacitive element, FIG. 2 is a system diagram showing an example of a capacitance measuring device for a capacitive element according to the first invention of the present application, and FIG. 3 is a system diagram showing an example of a capacitance measuring device of the present invention. FIG. 7 is a system diagram showing an example of a capacitance measuring device for a capacitive element according to a second invention. In the figure, 1 is an AC constant voltage source, 2 is a capacitive element to be measured, C P is capacitance, g is conductance, 3 is a current-voltage conversion circuit, 5 is a phase shift circuit, 8 and 12
is a multiplication circuit, 10 and 14 are multiplication circuit bodies, 11
20 and 22 are AC-DC conversion circuits, 23 is an arithmetic circuit, 24 and 25 are division circuits, 26 is an arithmetic unit, and 31 is an amplifier circuit, respectively.

Claims (1)

【特許請求の範囲】 1 交流定電圧源と、 被測定容量素子を通じて上記交流定電圧源に接
続され、上記交流定電圧源側より上記被測定容量
素子を通じて供給される交流電流に基き上記被測
定容量素子の静電容量に比例した交流電圧及びコ
ンダクタンスに比例した交流電圧の和の第1の交
流電圧を得る様になされた電流―電圧変換回路
と、 上記交流定電圧源より得られる交流定電圧に基
きこれに対して90゜の位相差を有する第3の交流
電圧を得る様になされた移相回路と、 上記第1及び第3の交流電圧に基き上記被測定
容量素子の静電容量に比例した第1の直流電圧を
得る様になされた第1の乗算回路又は同期検波回
路と、 上記交流定電圧源より得られる交流電圧と上記
第1の交流電圧とに基き上記被測定容量素子のコ
ンダクタンスに比例した第2の直流電圧を得る様
になされた第2の乗算回路又は同期検波回路と、 上記第1の交流電圧に基き上記被測定容量素子
のアドミタンスに比例した第3の直流電圧を得る
様になされた交流―直流変換回路と、 上記第1、第2及び第3の直流電圧に基き上記
被測定容量素子の静電容量を表わす出力を得る様
になされた演算回路とを具備する事を特徴とする
容量素子の静電容量測定装置。 2 交流定電圧源と、 被測定容量素子を通じて上記交流定電圧源に接
続され、上記交流定電圧源側より上記被測定容量
素子を通じて供給される交流電流に基き上記被測
定容量素子の静電容量に比例した交流電圧及びコ
ンダクタンスに比例した交流電圧の和の第1の交
流電圧を得る様になされた電流―電圧変換回路
と、 上記第1の交流電圧に基き一定レベルを有する
第2の交流電圧を得る様になされた増巾回路と、 上記交流定電圧源より得られる交流定電圧に基
きこれに対して90゜の位相差を有する第3の交流
電圧を得る様になされた移相回路と、 上記第2及び第3の交流電圧に基き上記被測定
容量素子の静電容量に比例した第1の直流電圧を
得る様になされた第1の乗算回路又は同期検波回
路と、 上記交流定電圧源より得られる交流電圧と上記
第2の交流電圧とに基き上記被測定容量素子のコ
ンダクタンスに比例した第2の直流電圧を得る様
になされた第2の乗算回路又は同期検波回路と、 上記第1の交流電圧に基き上記被測定容量素子
のアドミタンスに比例した第3の直流電圧を得る
様になされた交流―直流変換回路と、 上記第1,第2及び第3の直流電圧に基き上記
被測定容量素子の静電容量を表わす出力を得る様
になされた演算回路とを具備する事を特徴とする
容量素子の静電容量測定装置。
[Scope of Claims] 1. An AC constant voltage source, which is connected to the AC constant voltage source through a capacitive element to be measured, and which is connected to the AC constant voltage source through the capacitive element to be measured based on the AC current supplied from the AC constant voltage source side through the capacitive element to be measured. a current-voltage conversion circuit configured to obtain a first alternating current voltage that is the sum of an alternating current voltage proportional to the capacitance of the capacitive element and an alternating current voltage proportional to the conductance; and an alternating current constant voltage obtained from the above alternating current constant voltage source. a phase shift circuit configured to obtain a third alternating current voltage having a phase difference of 90 degrees with respect to the first alternating voltage; a first multiplier circuit or a synchronous detection circuit configured to obtain a proportional first DC voltage; and a first multiplier circuit or a synchronous detection circuit configured to obtain a proportional first DC voltage; a second multiplier circuit or a synchronous detection circuit configured to obtain a second DC voltage proportional to the conductance; and a third DC voltage proportional to the admittance of the capacitive element to be measured based on the first AC voltage. and an arithmetic circuit configured to obtain an output representing the capacitance of the capacitive element to be measured based on the first, second, and third DC voltages. A capacitance measuring device for a capacitive element, which is characterized by: 2 connected to the AC constant voltage source through an AC constant voltage source and a capacitive element to be measured, and measuring the capacitance of the capacitive element to be measured based on the AC current supplied from the AC constant voltage source through the capacitive element to be measured; a current-voltage conversion circuit configured to obtain a first alternating voltage that is the sum of an alternating current voltage proportional to conductance and an alternating current voltage proportional to conductance; and a second alternating current voltage having a constant level based on the first alternating voltage. an amplification circuit configured to obtain a third AC voltage having a phase difference of 90° with respect to the AC constant voltage obtained from the AC constant voltage source; , a first multiplier circuit or a synchronous detection circuit configured to obtain a first DC voltage proportional to the capacitance of the capacitive element to be measured based on the second and third AC voltages, and the AC constant voltage a second multiplier circuit or a synchronous detection circuit configured to obtain a second DC voltage proportional to the conductance of the capacitive element to be measured based on the AC voltage obtained from the source and the second AC voltage; an AC-DC conversion circuit configured to obtain a third DC voltage proportional to the admittance of the capacitive element to be measured based on the first AC voltage; 1. A capacitance measuring device for a capacitive element, comprising: an arithmetic circuit configured to obtain an output representing the capacitance of the capacitive element to be measured.
JP1627580A 1980-02-13 1980-02-13 Measuring apparatus for electrostatic capacity for capacity element Granted JPS56112660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1627580A JPS56112660A (en) 1980-02-13 1980-02-13 Measuring apparatus for electrostatic capacity for capacity element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1627580A JPS56112660A (en) 1980-02-13 1980-02-13 Measuring apparatus for electrostatic capacity for capacity element

Publications (2)

Publication Number Publication Date
JPS56112660A JPS56112660A (en) 1981-09-05
JPS6245500B2 true JPS6245500B2 (en) 1987-09-28

Family

ID=11911988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1627580A Granted JPS56112660A (en) 1980-02-13 1980-02-13 Measuring apparatus for electrostatic capacity for capacity element

Country Status (1)

Country Link
JP (1) JPS56112660A (en)

Also Published As

Publication number Publication date
JPS56112660A (en) 1981-09-05

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